Trait JTAGAccess

pub trait JTAGAccess: DebugProbe {
    // Required methods
    fn scan_chain(&mut self) -> Result<(), DebugProbeError>;
    fn tap_reset(&mut self) -> Result<(), DebugProbeError>;
    fn set_idle_cycles(&mut self, idle_cycles: u8);
    fn idle_cycles(&self) -> u8;
    fn write_register(
        &mut self,
        address: u32,
        data: &[u8],
        len: u32,
    ) -> Result<Vec<u8>, DebugProbeError>;
    fn write_dr(
        &mut self,
        data: &[u8],
        len: u32,
    ) -> Result<Vec<u8>, DebugProbeError>;

    // Provided methods
    fn read_register(
        &mut self,
        address: u32,
        len: u32,
    ) -> Result<Vec<u8>, DebugProbeError> { ... }
    fn write_register_batch(
        &mut self,
        writes: &JtagCommandQueue,
    ) -> Result<DeferredResultSet, BatchExecutionError> { ... }
}

Low-Level Access to the JTAG protocol

This trait should be implemented by all probes which offer low-level access to the JTAG protocol, i.e. direction control over the bytes sent and received.

Required Methods

fn scan_chain(&mut self) -> Result<(), DebugProbeError>

Scans IDCODE and IR length information about the devices on the JTAG chain.

If configured, this will use the data from DebugProbe::set_scan_chain. Otherwise, it will try to measure and extract IR lengths by driving the JTAG interface.

The measured scan chain will be stored in the probe’s internal state.

fn tap_reset(&mut self) -> Result<(), DebugProbeError>

Executes a TAP reset.

fn set_idle_cycles(&mut self, idle_cycles: u8)

For RISC-V, and possibly other interfaces, the JTAG interface has to remain in the idle state for several cycles between consecutive accesses to the DR register.

This function configures the number of idle cycles which are inserted after each access.

fn idle_cycles(&self) -> u8

Return the currently configured idle cycles.

fn write_register( &mut self, address: u32, data: &[u8], len: u32, ) -> Result<Vec<u8>, DebugProbeError>

Write to a JTAG register

This function will perform a write to the IR register, if necessary, to select the correct register, and then to the DR register, to transmit the data. The data shifted out of the DR register will be returned.

fn write_dr( &mut self, data: &[u8], len: u32, ) -> Result<Vec<u8>, DebugProbeError>

Shift a value into the DR JTAG register

The data shifted out of the DR register will be returned.

Provided Methods

fn read_register( &mut self, address: u32, len: u32, ) -> Result<Vec<u8>, DebugProbeError>

Read a JTAG register.

This function emulates a read by performing a write with all zeros to the DR.

fn write_register_batch( &mut self, writes: &JtagCommandQueue, ) -> Result<DeferredResultSet, BatchExecutionError>

Executes a sequence of JTAG commands.

Implementors

impl JTAGAccess for WchLink

Wrap WCH-Link’s USB based DMI access as a fake JTAGAccess

impl<Probe: DebugProbe + RawJtagIo + 'static> JTAGAccess for Probe