#[repr(u8)]pub enum Opcode {
Show 62 variants
Ret = 0,
Call = 1,
Jump = 2,
BrIf = 3,
BrIfNot = 4,
BrIfXeq32 = 5,
BrIfXneq32 = 6,
BrIfXslt32 = 7,
BrIfXslteq32 = 8,
BrIfXult32 = 9,
BrIfXulteq32 = 10,
Xmov = 11,
Fmov = 12,
Vmov = 13,
Xconst8 = 14,
Xconst16 = 15,
Xconst32 = 16,
Xconst64 = 17,
Xadd32 = 18,
Xadd64 = 19,
Xeq64 = 20,
Xneq64 = 21,
Xslt64 = 22,
Xslteq64 = 23,
Xult64 = 24,
Xulteq64 = 25,
Xeq32 = 26,
Xneq32 = 27,
Xslt32 = 28,
Xslteq32 = 29,
Xult32 = 30,
Xulteq32 = 31,
Load32U = 32,
Load32S = 33,
Load64 = 34,
Load32UOffset8 = 35,
Load32SOffset8 = 36,
Load64Offset8 = 37,
Load32UOffset64 = 38,
Load32SOffset64 = 39,
Load64Offset64 = 40,
Store32 = 41,
Store64 = 42,
Store32SOffset8 = 43,
Store64Offset8 = 44,
Store32SOffset64 = 45,
Store64Offset64 = 46,
PushFrame = 47,
PopFrame = 48,
XPush32 = 49,
XPush32Many = 50,
XPush64 = 51,
XPush64Many = 52,
XPop32 = 53,
XPop32Many = 54,
XPop64 = 55,
XPop64Many = 56,
BitcastIntFromFloat32 = 57,
BitcastIntFromFloat64 = 58,
BitcastFloatFromInt32 = 59,
BitcastFloatFromInt64 = 60,
ExtendedOp = 61,
}
Expand description
An opcode without its immediates and operands.
Variants§
Ret = 0
Transfer control the address in the lr
register.
Call = 1
Transfer control to the PC at the given offset and set the lr
register to the PC just after this instruction.
Jump = 2
Unconditionally transfer control to the PC at the given offset.
BrIf = 3
Conditionally transfer control to the given PC offset if cond
contains a non-zero value.
BrIfNot = 4
Conditionally transfer control to the given PC offset if cond
contains a zero value.
BrIfXeq32 = 5
Branch if a == b
.
BrIfXneq32 = 6
Branch if a !=
b.
BrIfXslt32 = 7
Branch if signed a < b
.
BrIfXslteq32 = 8
Branch if signed a <= b
.
BrIfXult32 = 9
Branch if unsigned a < b
.
BrIfXulteq32 = 10
Branch if unsigned a <= b
.
Xmov = 11
Move between x
registers.
Fmov = 12
Move between f
registers.
Vmov = 13
Move between v
registers.
Xconst8 = 14
Set dst = sign_extend(imm8)
.
Xconst16 = 15
Set dst = sign_extend(imm16)
.
Xconst32 = 16
Set dst = sign_extend(imm32)
.
Xconst64 = 17
Set dst = imm64
.
Xadd32 = 18
32-bit wrapping addition: low32(dst) = low32(src1) + low32(src2)
.
The upper 32-bits of dst
are unmodified.
Xadd64 = 19
64-bit wrapping addition: dst = src1 + src2
.
Xeq64 = 20
64-bit equality.
Xneq64 = 21
64-bit inequality.
Xslt64 = 22
64-bit signed less-than.
Xslteq64 = 23
64-bit signed less-than-equal.
Xult64 = 24
64-bit unsigned less-than.
Xulteq64 = 25
64-bit unsigned less-than-equal.
Xeq32 = 26
32-bit equality.
Xneq32 = 27
32-bit inequality.
Xslt32 = 28
32-bit signed less-than.
Xslteq32 = 29
32-bit signed less-than-equal.
Xult32 = 30
32-bit unsigned less-than.
Xulteq32 = 31
32-bit unsigned less-than-equal.
Load32U = 32
dst = zero_extend(load32(ptr))
Load32S = 33
dst = sign_extend(load32(ptr))
Load64 = 34
dst = load64(ptr)
Load32UOffset8 = 35
dst = zero_extend(load32(ptr + offset8))
Load32SOffset8 = 36
dst = sign_extend(load32(ptr + offset8))
Load64Offset8 = 37
dst = load64(ptr + offset8)
Load32UOffset64 = 38
dst = zero_extend(load32(ptr + offset64))
Load32SOffset64 = 39
dst = sign_extend(load32(ptr + offset64))
Load64Offset64 = 40
dst = load64(ptr + offset64)
Store32 = 41
*ptr = low32(src)
Store64 = 42
*ptr = src
Store32SOffset8 = 43
*(ptr + sign_extend(offset8)) = low32(src)
Store64Offset8 = 44
*(ptr + sign_extend(offset8)) = src
Store32SOffset64 = 45
*(ptr + sign_extend(offset64)) = low32(src)
Store64Offset64 = 46
*(ptr + sign_extend(offset64)) = src
PushFrame = 47
push lr; push fp; fp = sp
PopFrame = 48
sp = fp; pop fp; pop lr
XPush32 = 49
*sp = low32(src); sp += 4
XPush32Many = 50
for src in srcs { xpush32 src }
XPush64 = 51
*sp = src; sp += 8
XPush64Many = 52
for src in srcs { xpush64 src }
XPop32 = 53
*dst = *sp; sp -= 4
XPop32Many = 54
for dst in dsts.rev() { xpop32 dst }
XPop64 = 55
*dst = *sp; sp -= 8
XPop64Many = 56
for dst in dsts.rev() { xpop64 dst }
BitcastIntFromFloat32 = 57
low32(dst) = bitcast low32(src) as i32
BitcastIntFromFloat64 = 58
dst = bitcast src as i64
BitcastFloatFromInt32 = 59
low32(dst) = bitcast low32(src) as f32
BitcastFloatFromInt64 = 60
dst = bitcast src as f64
ExtendedOp = 61
The extended-op opcode. An ExtendedOpcode
follows this opcode.
Implementations§
Source§impl Opcode
impl Opcode
Sourcepub fn new(byte: u8) -> Option<Self>
pub fn new(byte: u8) -> Option<Self>
Create a new Opcode
from the given byte.
Returns None
if byte
is not a valid opcode.
Sourcepub unsafe fn unchecked_new(byte: u8) -> Self
pub unsafe fn unchecked_new(byte: u8) -> Self
Like new
but does not check whether byte
is a valid opcode.
§Safety
It is unsafe to pass a byte
that is not a valid opcode.
Trait Implementations§
Source§impl Ord for Opcode
impl Ord for Opcode
Source§impl PartialOrd for Opcode
impl PartialOrd for Opcode
impl Copy for Opcode
impl Eq for Opcode
impl StructuralPartialEq for Opcode
Auto Trait Implementations§
impl Freeze for Opcode
impl RefUnwindSafe for Opcode
impl Send for Opcode
impl Sync for Opcode
impl Unpin for Opcode
impl UnwindSafe for Opcode
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
Source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)