#[repr(u8)]pub enum Opcode {
Show 68 variants
Ret = 0,
Call = 1,
Jump = 2,
BrIf = 3,
BrIfNot = 4,
BrIfXeq32 = 5,
BrIfXneq32 = 6,
BrIfXslt32 = 7,
BrIfXslteq32 = 8,
BrIfXult32 = 9,
BrIfXulteq32 = 10,
BrIfXeq64 = 11,
BrIfXneq64 = 12,
BrIfXslt64 = 13,
BrIfXslteq64 = 14,
BrIfXult64 = 15,
BrIfXulteq64 = 16,
Xmov = 17,
Fmov = 18,
Vmov = 19,
Xconst8 = 20,
Xconst16 = 21,
Xconst32 = 22,
Xconst64 = 23,
Xadd32 = 24,
Xadd64 = 25,
Xeq64 = 26,
Xneq64 = 27,
Xslt64 = 28,
Xslteq64 = 29,
Xult64 = 30,
Xulteq64 = 31,
Xeq32 = 32,
Xneq32 = 33,
Xslt32 = 34,
Xslteq32 = 35,
Xult32 = 36,
Xulteq32 = 37,
Load32U = 38,
Load32S = 39,
Load64 = 40,
Load32UOffset8 = 41,
Load32SOffset8 = 42,
Load64Offset8 = 43,
Load32UOffset64 = 44,
Load32SOffset64 = 45,
Load64Offset64 = 46,
Store32 = 47,
Store64 = 48,
Store32SOffset8 = 49,
Store64Offset8 = 50,
Store32SOffset64 = 51,
Store64Offset64 = 52,
PushFrame = 53,
PopFrame = 54,
XPush32 = 55,
XPush32Many = 56,
XPush64 = 57,
XPush64Many = 58,
XPop32 = 59,
XPop32Many = 60,
XPop64 = 61,
XPop64Many = 62,
BitcastIntFromFloat32 = 63,
BitcastIntFromFloat64 = 64,
BitcastFloatFromInt32 = 65,
BitcastFloatFromInt64 = 66,
ExtendedOp = 67,
}
Expand description
An opcode without its immediates and operands.
Variants§
Ret = 0
Transfer control the address in the lr
register.
Call = 1
Transfer control to the PC at the given offset and set the lr
register to the PC just after this instruction.
Jump = 2
Unconditionally transfer control to the PC at the given offset.
BrIf = 3
Conditionally transfer control to the given PC offset if cond
contains a non-zero value.
BrIfNot = 4
Conditionally transfer control to the given PC offset if cond
contains a zero value.
BrIfXeq32 = 5
Branch if a == b
.
BrIfXneq32 = 6
Branch if a !=
b.
BrIfXslt32 = 7
Branch if signed a < b
.
BrIfXslteq32 = 8
Branch if signed a <= b
.
BrIfXult32 = 9
Branch if unsigned a < b
.
BrIfXulteq32 = 10
Branch if unsigned a <= b
.
BrIfXeq64 = 11
Branch if a == b
.
BrIfXneq64 = 12
Branch if a !=
b.
BrIfXslt64 = 13
Branch if signed a < b
.
BrIfXslteq64 = 14
Branch if signed a <= b
.
BrIfXult64 = 15
Branch if unsigned a < b
.
BrIfXulteq64 = 16
Branch if unsigned a <= b
.
Xmov = 17
Move between x
registers.
Fmov = 18
Move between f
registers.
Vmov = 19
Move between v
registers.
Xconst8 = 20
Set dst = sign_extend(imm8)
.
Xconst16 = 21
Set dst = sign_extend(imm16)
.
Xconst32 = 22
Set dst = sign_extend(imm32)
.
Xconst64 = 23
Set dst = imm64
.
Xadd32 = 24
32-bit wrapping addition: low32(dst) = low32(src1) + low32(src2)
.
The upper 32-bits of dst
are unmodified.
Xadd64 = 25
64-bit wrapping addition: dst = src1 + src2
.
Xeq64 = 26
64-bit equality.
Xneq64 = 27
64-bit inequality.
Xslt64 = 28
64-bit signed less-than.
Xslteq64 = 29
64-bit signed less-than-equal.
Xult64 = 30
64-bit unsigned less-than.
Xulteq64 = 31
64-bit unsigned less-than-equal.
Xeq32 = 32
32-bit equality.
Xneq32 = 33
32-bit inequality.
Xslt32 = 34
32-bit signed less-than.
Xslteq32 = 35
32-bit signed less-than-equal.
Xult32 = 36
32-bit unsigned less-than.
Xulteq32 = 37
32-bit unsigned less-than-equal.
Load32U = 38
dst = zero_extend(load32(ptr))
Load32S = 39
dst = sign_extend(load32(ptr))
Load64 = 40
dst = load64(ptr)
Load32UOffset8 = 41
dst = zero_extend(load32(ptr + offset8))
Load32SOffset8 = 42
dst = sign_extend(load32(ptr + offset8))
Load64Offset8 = 43
dst = load64(ptr + offset8)
Load32UOffset64 = 44
dst = zero_extend(load32(ptr + offset64))
Load32SOffset64 = 45
dst = sign_extend(load32(ptr + offset64))
Load64Offset64 = 46
dst = load64(ptr + offset64)
Store32 = 47
*ptr = low32(src)
Store64 = 48
*ptr = src
Store32SOffset8 = 49
*(ptr + sign_extend(offset8)) = low32(src)
Store64Offset8 = 50
*(ptr + sign_extend(offset8)) = src
Store32SOffset64 = 51
*(ptr + sign_extend(offset64)) = low32(src)
Store64Offset64 = 52
*(ptr + sign_extend(offset64)) = src
PushFrame = 53
push lr; push fp; fp = sp
PopFrame = 54
sp = fp; pop fp; pop lr
XPush32 = 55
*sp = low32(src); sp += 4
XPush32Many = 56
for src in srcs { xpush32 src }
XPush64 = 57
*sp = src; sp += 8
XPush64Many = 58
for src in srcs { xpush64 src }
XPop32 = 59
*dst = *sp; sp -= 4
XPop32Many = 60
for dst in dsts.rev() { xpop32 dst }
XPop64 = 61
*dst = *sp; sp -= 8
XPop64Many = 62
for dst in dsts.rev() { xpop64 dst }
BitcastIntFromFloat32 = 63
low32(dst) = bitcast low32(src) as i32
BitcastIntFromFloat64 = 64
dst = bitcast src as i64
BitcastFloatFromInt32 = 65
low32(dst) = bitcast low32(src) as f32
BitcastFloatFromInt64 = 66
dst = bitcast src as f64
ExtendedOp = 67
The extended-op opcode. An ExtendedOpcode
follows this opcode.
Implementations§
Source§impl Opcode
impl Opcode
Sourcepub fn new(byte: u8) -> Option<Self>
pub fn new(byte: u8) -> Option<Self>
Create a new Opcode
from the given byte.
Returns None
if byte
is not a valid opcode.
Sourcepub unsafe fn unchecked_new(byte: u8) -> Self
pub unsafe fn unchecked_new(byte: u8) -> Self
Like new
but does not check whether byte
is a valid opcode.
§Safety
It is unsafe to pass a byte
that is not a valid opcode.