pub enum DatType {
Null,
DataTLB,
InstructionTLB,
UnifiedTLB,
Unknown,
}
Expand description
Deterministic Address Translation cache type (EDX bits 04 – 00)
Variants§
Null
Null (indicates this sub-leaf is not valid).
DataTLB
InstructionTLB
UnifiedTLB
Some unified TLBs will allow a single TLB entry to satisfy data read/write and instruction fetches. Others will require separate entries (e.g., one loaded on data read/write and another loaded on an instruction fetch) . Please see the Intel® 64 and IA-32 Architectures Optimization Reference Manual for details of a particular product.