Expand description
Simple RISC-V SBI runtime primitives.
Structs§
- RISC-V SBI Base extension.
- Cold reboot as a reset type.
- Debug Console extension.
- SBI CPPC extension.
- Information about an SBI extension.
- Remote Fence extension.
- Hart mask structure in SBI function calls.
- Hart State Monitor extension.
- Inter-processor Interrupt extension.
- Nested Acceleration extension.
- No reason as a reset reason.
- Default non-retentive hart suspension.
- Physical slice wrapper with type annotation.
- Performance Monitoring Unit extension.
- System Reset extension.
- Default retentive hart suspension.
- SBI functions return type.
- Shared memory physical address raw pointer with type annotation.
- Shutdown as a reset type.
- Steal-time Accounting extension.
- System Suspend extension.
- Suspend to RAM as sleep type.
- System failure as a reset reason.
- Timer programmer extension.
- SBI specification version.
- Warm reboot as a reset type.
Traits§
- Flags to configure performance counter.
- An SBI extension.
- A valid reason for system reset.
- A valid type for system reset.
- A valid sleep type for system suspend.
- Flags to start performance counter.
- Flags to stop performance counter.
- A valid suspend type for hart state monitor.
Functions§
- Read bytes from the debug console into an output memory.
- Write bytes to the debug console from input memory.
- Write a single byte to the debug console.
- Probe whether the CPPC register is implemented or not by the platform.
- Read the CPPC register identified by given
cppc_reg_id
. - Read the upper 32-bit value of the CPPC register identified by
cppc_reg_id
. - Write 64-bit value to the CPPC register identified by given
cppc_reg_id
. - Return value of
marchid
register in the current environment. - Return value of
mimpid
register in the current environment. - Return the value of
mvendorid
register in the current environment. - Return the current SBI implementation ID.
- Return the current SBI implementation version.
- Return the current SBI specification version.
- Get the current status (or HSM state id) of the given hart.
- Start executing the given hart at specified address in supervisor-mode.
- Stop executing the calling hart in supervisor-mode.
- Put the calling hart into suspend or platform specific lower power states.
- Probe a nested acceleration feature.
- Set and enable the shared memory for nested acceleration on the calling hart.
- Synchronize CSRs in the nested acceleration shared memory.
- Synchronize HFENCEs in the nested acceleration shared memory.
- Synchronize CSRs and HFENCEs in the NACL shared memory and emulate the SRET instruction.
- Find and configure a counter from a set of counters.
- Provide the current value of a firmware counter.
- Provide the upper 32 bits from the value of a firmware counter.
- Get details about the specified counter.
- Start or enable a set of counters on the calling hart with the specified initial value.
- Stop or disable a set of counters on the calling hart.
- Returns the number of counters, both hardware and firmware.
- Probe information about one SBI extension from the current environment.
- Execute
FENCE.I
instruction on remote harts. - Execute
HFENCE.GVMA
instructions for all virtual machines on remote harts. - Execute virtual machine id based
HFENCE.GVMA
instructions on remote harts. - Execute
HFENCE.VVMA
for all address spaces in the current virtual machine on remote harts. - Execute address space based
HFENCE.VVMA
for current virtual machine on remote harts. - Execute
SFENCE.VMA
instructions for all address spaces on remote harts. - Execute address-space-based
SFENCE.VMA
instructions on remote harts. - Send an inter-processor interrupt to all harts defined in hart mask.
- Programs the clock for the next event after an absolute time.
- Prepare shared memory for steal-time accounting feature.
- Reset the system based on provided
reset_type
andreset_reason
. - Suspend the system based on provided
sleep_type
.