Struct stm32_metapac::fmc::regs::Bcr1

#[repr(transparent)]
pub struct Bcr1(pub u32);

SRAM/NOR-Flash chip-select control register 1

Tuple Fields

0: u32

Implementations

impl Bcr1

pub const fn mbken(&self) -> bool

Memory bank enable bit

pub fn set_mbken(&mut self, val: bool)

Memory bank enable bit

pub const fn muxen(&self) -> bool

Address/data multiplexing enable bit

pub fn set_muxen(&mut self, val: bool)

Address/data multiplexing enable bit

pub const fn mtyp(&self) -> Mtyp

Memory type

pub fn set_mtyp(&mut self, val: Mtyp)

Memory type

pub const fn mwid(&self) -> Mwid

Memory data bus width

pub fn set_mwid(&mut self, val: Mwid)

Memory data bus width

pub const fn faccen(&self) -> bool

Flash access enable

pub fn set_faccen(&mut self, val: bool)

Flash access enable

pub const fn bursten(&self) -> bool

Burst enable bit

pub fn set_bursten(&mut self, val: bool)

Burst enable bit

pub const fn waitpol(&self) -> Waitpol

Wait signal polarity bit

pub fn set_waitpol(&mut self, val: Waitpol)

Wait signal polarity bit

pub const fn waitcfg(&self) -> Waitcfg

Wait timing configuration

pub fn set_waitcfg(&mut self, val: Waitcfg)

Wait timing configuration

pub const fn wren(&self) -> bool

Write enable bit

pub fn set_wren(&mut self, val: bool)

Write enable bit

pub const fn waiten(&self) -> bool

Wait enable bit

pub fn set_waiten(&mut self, val: bool)

Wait enable bit

pub const fn extmod(&self) -> bool

Extended mode enable

pub fn set_extmod(&mut self, val: bool)

Extended mode enable

pub const fn asyncwait(&self) -> bool

Wait signal during asynchronous transfers

pub fn set_asyncwait(&mut self, val: bool)

Wait signal during asynchronous transfers

pub const fn cpsize(&self) -> Cpsize

CRAM page size

pub fn set_cpsize(&mut self, val: Cpsize)

CRAM page size

pub const fn cburstrw(&self) -> bool

Write burst enable

pub fn set_cburstrw(&mut self, val: bool)

Write burst enable

pub const fn cclken(&self) -> bool

Continuous clock enable

pub fn set_cclken(&mut self, val: bool)

Continuous clock enable

pub const fn wfdis(&self) -> bool

Write FIFO disable

pub fn set_wfdis(&mut self, val: bool)

Write FIFO disable

pub const fn bmap(&self) -> u8

FMC bank mapping These bits allows different to remap SDRAM bank2 or swap the FMC NOR/PSRAM and SDRAM banks.Refer to Table 10 for Note: The BMAP bits of the FMC_BCR2..4 registers are dont care. It is only enabled through the FMC_BCR1 register.

pub fn set_bmap(&mut self, val: u8)

FMC bank mapping These bits allows different to remap SDRAM bank2 or swap the FMC NOR/PSRAM and SDRAM banks.Refer to Table 10 for Note: The BMAP bits of the FMC_BCR2..4 registers are dont care. It is only enabled through the FMC_BCR1 register.

pub const fn fmcen(&self) -> bool

FMC controller enable

pub fn set_fmcen(&mut self, val: bool)

FMC controller enable

Trait Implementations

impl Clone for Bcr1

fn clone(&self) -> Bcr1

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Bcr1

fn default() -> Bcr1

Returns the “default value” for a type.

impl PartialEq for Bcr1

fn eq(&self, other: &Bcr1) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Bcr1

impl Eq for Bcr1

impl StructuralEq for Bcr1

impl StructuralPartialEq for Bcr1