Struct stm32_metapac::pwr::regs::Cr1

#[repr(transparent)]
pub struct Cr1(pub u32);

PWR control register 1

Tuple Fields

0: u32

Implementations

impl Cr1

pub const fn lpds(&self) -> bool

Low-power Deepsleep with SVOS3 (SVOS4 and SVOS5 always use low-power, regardless of the setting of this bit)

pub fn set_lpds(&mut self, val: bool)

Low-power Deepsleep with SVOS3 (SVOS4 and SVOS5 always use low-power, regardless of the setting of this bit)

pub const fn pvde(&self) -> bool

Programmable voltage detector enable

pub fn set_pvde(&mut self, val: bool)

Programmable voltage detector enable

pub const fn pls(&self) -> u8

Programmable voltage detector level selection These bits select the voltage threshold detected by the PVD. Note: Refer to Section Electrical characteristics of the product datasheet for more details.

pub fn set_pls(&mut self, val: u8)

Programmable voltage detector level selection These bits select the voltage threshold detected by the PVD. Note: Refer to Section Electrical characteristics of the product datasheet for more details.

pub const fn dbp(&self) -> bool

Disable backup domain write protection In reset state, the RCC_BDCR register, the RTC registers (including the backup registers), BREN and MOEN bits in PWR_CR2 register, are protected against parasitic write access. This bit must be set to enable write access to these registers.

pub fn set_dbp(&mut self, val: bool)

Disable backup domain write protection In reset state, the RCC_BDCR register, the RTC registers (including the backup registers), BREN and MOEN bits in PWR_CR2 register, are protected against parasitic write access. This bit must be set to enable write access to these registers.

pub const fn flps(&self) -> bool

Flash low-power mode in DStop mode This bit allows to obtain the best trade-off between low-power consumption and restart time when exiting from DStop mode. When it is set, the Flash memory enters low-power mode when D1 domain is in DStop mode.

pub fn set_flps(&mut self, val: bool)

Flash low-power mode in DStop mode This bit allows to obtain the best trade-off between low-power consumption and restart time when exiting from DStop mode. When it is set, the Flash memory enters low-power mode when D1 domain is in DStop mode.

pub const fn svos(&self) -> u8

System Stop mode voltage scaling selection These bits control the VCORE voltage level in system Stop mode, to obtain the best trade-off between power consumption and performance.

pub fn set_svos(&mut self, val: u8)

System Stop mode voltage scaling selection These bits control the VCORE voltage level in system Stop mode, to obtain the best trade-off between power consumption and performance.

pub const fn avden(&self) -> bool

Peripheral voltage monitor on VDDA enable

pub fn set_avden(&mut self, val: bool)

Peripheral voltage monitor on VDDA enable

pub const fn als(&self) -> u8

Analog voltage detector level selection These bits select the voltage threshold detected by the AVD.

pub fn set_als(&mut self, val: u8)

Analog voltage detector level selection These bits select the voltage threshold detected by the AVD.

Trait Implementations

impl Clone for Cr1

fn clone(&self) -> Cr1

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Cr1

fn default() -> Cr1

Returns the “default value” for a type.

impl PartialEq for Cr1

fn eq(&self, other: &Cr1) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Cr1

impl Eq for Cr1

impl StructuralEq for Cr1

impl StructuralPartialEq for Cr1