| ACCHI | |
| ACCLO | |
| ADC1_CHANNEL_0_GPIO_NUM | |
| ADC1_CHANNEL_1_GPIO_NUM | |
| ADC1_CHANNEL_2_GPIO_NUM | |
| ADC1_CHANNEL_3_GPIO_NUM | |
| ADC1_CHANNEL_4_GPIO_NUM | |
| ADC1_CHANNEL_5_GPIO_NUM | |
| ADC1_CHANNEL_6_GPIO_NUM | |
| ADC1_CHANNEL_7_GPIO_NUM | |
| ADC2_CHANNEL_0_GPIO_NUM | |
| ADC2_CHANNEL_1_GPIO_NUM | |
| ADC2_CHANNEL_2_GPIO_NUM | |
| ADC2_CHANNEL_3_GPIO_NUM | |
| ADC2_CHANNEL_4_GPIO_NUM | |
| ADC2_CHANNEL_5_GPIO_NUM | |
| ADC2_CHANNEL_6_GPIO_NUM | |
| ADC2_CHANNEL_7_GPIO_NUM | |
| ADC2_CHANNEL_8_GPIO_NUM | |
| ADC2_CHANNEL_9_GPIO_NUM | |
| ALIGNPAD | |
| ANT_SEL0_IDX | |
| ANT_SEL1_IDX | |
| ANT_SEL2_IDX | |
| ANT_SEL3_IDX | |
| ANT_SEL4_IDX | |
| ANT_SEL5_IDX | |
| ANT_SEL6_IDX | |
| ANT_SEL7_IDX | |
| APB_CLK_FREQ | |
| APB_CLK_FREQ_ROM | |
| APP_CPU_NUM | |
| ARG_MAX | |
| ATOMCTL | |
| BB_DIAG0_IDX | |
| BB_DIAG1_IDX | |
| BB_DIAG2_IDX | |
| BB_DIAG3_IDX | |
| BB_DIAG4_IDX | |
| BB_DIAG5_IDX | |
| BB_DIAG6_IDX | |
| BB_DIAG7_IDX | |
| BB_DIAG8_IDX | |
| BB_DIAG9_IDX | |
| BB_DIAG10_IDX | |
| BB_DIAG11_IDX | |
| BB_DIAG12_IDX | |
| BB_DIAG13_IDX | |
| BB_DIAG14_IDX | |
| BB_DIAG15_IDX | |
| BB_DIAG16_IDX | |
| BB_DIAG17_IDX | |
| BB_DIAG18_IDX | |
| BB_DIAG19_IDX | |
| BIT0 | |
| BIT1 | |
| BIT2 | |
| BIT3 | |
| BIT4 | |
| BIT5 | |
| BIT6 | |
| BIT7 | |
| BIT8 | |
| BIT9 | |
| BIT10 | |
| BIT11 | |
| BIT12 | |
| BIT13 | |
| BIT14 | |
| BIT15 | |
| BIT16 | |
| BIT17 | |
| BIT18 | |
| BIT19 | |
| BIT20 | |
| BIT21 | |
| BIT22 | |
| BIT23 | |
| BIT24 | |
| BIT25 | |
| BIT26 | |
| BIT27 | |
| BIT28 | |
| BIT29 | |
| BIT30 | |
| BIT31 | |
| BLE_AUDIO0_IRQ_IDX | |
| BLE_AUDIO1_IRQ_IDX | |
| BLE_AUDIO2_IRQ_IDX | |
| BLE_AUDIO_SYNC0_P_IDX | |
| BLE_AUDIO_SYNC1_P_IDX | |
| BLE_AUDIO_SYNC2_P_IDX | |
| BR | |
| BT_AUDIO0_IRQ_IDX | |
| BT_AUDIO1_IRQ_IDX | |
| BT_AUDIO2_IRQ_IDX | |
| BUFSIZ | |
| CALL0_ABI | |
| CAN_ALERT_ABOVE_ERR_WARN | |
| CAN_ALERT_ALL | |
| CAN_ALERT_AND_LOG | |
| CAN_ALERT_ARB_LOST | |
| CAN_ALERT_BELOW_ERR_WARN | |
| CAN_ALERT_BUS_ERROR | |
| CAN_ALERT_BUS_OFF | |
| CAN_ALERT_BUS_RECOVERED | |
| CAN_ALERT_ERR_ACTIVE | |
| CAN_ALERT_ERR_PASS | |
| CAN_ALERT_NONE | |
| CAN_ALERT_RECOVERY_IN_PROGRESS | |
| CAN_ALERT_RX_QUEUE_FULL | |
| CAN_ALERT_TX_FAILED | |
| CAN_ALERT_TX_IDLE | |
| CAN_ALERT_TX_SUCCESS | |
| CAN_BUS_OFF_ON_IDX | |
| CAN_CLKOUT_IDX | |
| CAN_EXTD_ID_MASK | |
| CAN_IO_UNUSED | |
| CAN_MAX_DATA_LEN | |
| CAN_MSG_FLAG_DLC_NON_COMP | |
| CAN_MSG_FLAG_EXTD | |
| CAN_MSG_FLAG_NONE | |
| CAN_MSG_FLAG_RTR | |
| CAN_MSG_FLAG_SELF | |
| CAN_MSG_FLAG_SS | |
| CAN_RX_IDX | |
| CAN_STD_ID_MASK | |
| CAN_TX_IDX | |
| CCOMPARE | |
| CCOMPARE_0 | |
| CCOMPARE_1 | |
| CCOMPARE_2 | |
| CCOUNT | |
| CLK_OUT1 | |
| CLK_OUT1_V | |
| CLK_OUT1_S | |
| CLK_OUT1_M | |
| CLK_OUT2 | |
| CLK_OUT2_V | |
| CLK_OUT2_S | |
| CLK_OUT2_M | |
| CLK_OUT3 | |
| CLK_OUT3_V | |
| CLK_OUT3_S | |
| CLK_OUT3_M | |
| CONFIG_ADC2_DISABLE_DAC | |
| CONFIG_ADC_CAL_EFUSE_TP_ENABLE | |
| CONFIG_ADC_CAL_EFUSE_VREF_ENABLE | |
| CONFIG_ADC_CAL_LUT_ENABLE | |
| CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V | |
| CONFIG_BOOTLOADER_WDT_ENABLE | |
| CONFIG_BOOTLOADER_WDT_TIME_MS | |
| CONFIG_BROWNOUT_DET | |
| CONFIG_BROWNOUT_DET_LVL | |
| CONFIG_BROWNOUT_DET_LVL_SEL_0 | |
| CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF | |
| CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF | |
| CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF | |
| CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE | |
| CONFIG_BT_RESERVE_DRAM | |
| CONFIG_CONSOLE_UART_BAUDRATE | |
| CONFIG_CONSOLE_UART_DEFAULT | |
| CONFIG_CONSOLE_UART_NUM | |
| CONFIG_DMA_RX_BUF_NUM | |
| CONFIG_DMA_TX_BUF_NUM | |
| CONFIG_EMAC_CHECK_LINK_PERIOD_MS | |
| CONFIG_EMAC_L2_TO_L3_RX_BUF_MODE | |
| CONFIG_EMAC_TASK_PRIORITY | |
| CONFIG_EMAC_TASK_STACK_SIZE | |
| CONFIG_ESP32_PHY_MAX_TX_POWER | |
| CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN | |
| CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER | |
| CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM | |
| CONFIG_ESP32_PANIC_PRINT_REBOOT | |
| CONFIG_ESP32_APPTRACE_LOCK_ENABLE | |
| CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC | |
| CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE | |
| CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM | |
| CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER | |
| CONFIG_ESP32_RTC_CLK_CAL_CYCLES | |
| CONFIG_ESP32_WIFI_TX_BA_WIN | |
| CONFIG_ESP32_WIFI_NVS_ENABLED | |
| CONFIG_ESP32_WIFI_MGMT_SBUF_NUM | |
| CONFIG_ESP32_WIFI_RX_BA_WIN | |
| CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY | |
| CONFIG_ESP32_APPTRACE_DEST_NONE | |
| CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM | |
| CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ | |
| CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE | |
| CONFIG_ESP32_XTAL_FREQ | |
| CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT | |
| CONFIG_ESP32_DEBUG_OCDAWARE | |
| CONFIG_ESP32_DEBUG_STUBS_ENABLE | |
| CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED | |
| CONFIG_ESP32_WIFI_TX_BUFFER_TYPE | |
| CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED | |
| CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT | |
| CONFIG_ESP32_WIFI_IRAM_OPT | |
| CONFIG_ESP32_DEFAULT_CPU_FREQ_160 | |
| CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 | |
| CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 | |
| CONFIG_ESP32_XTAL_FREQ_40 | |
| CONFIG_ESPTOOLPY_AFTER | |
| CONFIG_ESPTOOLPY_AFTER_RESET | |
| CONFIG_ESPTOOLPY_BAUD | |
| CONFIG_ESPTOOLPY_BAUD_115200B | |
| CONFIG_ESPTOOLPY_BAUD_OTHER_VAL | |
| CONFIG_ESPTOOLPY_BEFORE | |
| CONFIG_ESPTOOLPY_BEFORE_RESET | |
| CONFIG_ESPTOOLPY_COMPRESSED | |
| CONFIG_ESPTOOLPY_FLASHFREQ | |
| CONFIG_ESPTOOLPY_FLASHFREQ_40M | |
| CONFIG_ESPTOOLPY_FLASHMODE | |
| CONFIG_ESPTOOLPY_FLASHSIZE | |
| CONFIG_ESPTOOLPY_FLASHSIZE_2MB | |
| CONFIG_ESPTOOLPY_FLASHSIZE_DETECT | |
| CONFIG_ESPTOOLPY_PORT | |
| CONFIG_ESP_ERR_TO_NAME_LOOKUP | |
| CONFIG_ESP_GRATUITOUS_ARP | |
| CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS | |
| CONFIG_FATFS_CODEPAGE | |
| CONFIG_FATFS_CODEPAGE_437 | |
| CONFIG_FATFS_FS_LOCK | |
| CONFIG_FATFS_LFN_NONE | |
| CONFIG_FATFS_PER_FILE_CACHE | |
| CONFIG_FATFS_TIMEOUT_MS | |
| CONFIG_FLASHMODE_DIO | |
| CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS | |
| CONFIG_FREERTOS_ASSERT_FAIL_ABORT | |
| CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION | |
| CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY | |
| CONFIG_FREERTOS_CORETIMER_0 | |
| CONFIG_FREERTOS_HZ | |
| CONFIG_FREERTOS_IDLE_TASK_STACKSIZE | |
| CONFIG_FREERTOS_INTERRUPT_BACKTRACE | |
| CONFIG_FREERTOS_ISR_STACKSIZE | |
| CONFIG_FREERTOS_MAX_TASK_NAME_LEN | |
| CONFIG_FREERTOS_NO_AFFINITY | |
| CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE | |
| CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER | |
| CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS | |
| CONFIG_GARP_TMR_INTERVAL | |
| CONFIG_HEAP_POISONING_DISABLED | |
| CONFIG_HTTPD_MAX_REQ_HDR_LEN | |
| CONFIG_HTTPD_MAX_URI_LEN | |
| CONFIG_INT_WDT | |
| CONFIG_INT_WDT_CHECK_CPU1 | |
| CONFIG_INT_WDT_TIMEOUT_MS | |
| CONFIG_IPC_TASK_STACK_SIZE | |
| CONFIG_IP_LOST_TIMER_INTERVAL | |
| CONFIG_LIBSODIUM_USE_MBEDTLS_SHA | |
| CONFIG_LOG_BOOTLOADER_LEVEL | |
| CONFIG_LOG_BOOTLOADER_LEVEL_INFO | |
| CONFIG_LOG_COLORS | |
| CONFIG_LOG_DEFAULT_LEVEL | |
| CONFIG_LOG_DEFAULT_LEVEL_INFO | |
| CONFIG_LWIP_DHCPS_LEASE_UNIT | |
| CONFIG_LWIP_DHCPS_MAX_STATION_NUM | |
| CONFIG_LWIP_DHCP_DOES_ARP_CHECK | |
| CONFIG_LWIP_DHCP_MAX_NTP_SERVERS | |
| CONFIG_LWIP_LOOPBACK_MAX_PBUFS | |
| CONFIG_LWIP_MAX_ACTIVE_TCP | |
| CONFIG_LWIP_MAX_LISTENING_TCP | |
| CONFIG_LWIP_MAX_RAW_PCBS | |
| CONFIG_LWIP_MAX_SOCKETS | |
| CONFIG_LWIP_MAX_UDP_PCBS | |
| CONFIG_LWIP_NETIF_LOOPBACK | |
| CONFIG_LWIP_SO_REUSE | |
| CONFIG_LWIP_SO_REUSE_RXTOALL | |
| CONFIG_MAIN_TASK_STACK_SIZE | |
| CONFIG_MAKE_WARN_UNDEFINED_VARIABLES | |
| CONFIG_MBEDTLS_AES_C | |
| CONFIG_MBEDTLS_CCM_C | |
| CONFIG_MBEDTLS_ECDH_C | |
| CONFIG_MBEDTLS_ECDSA_C | |
| CONFIG_MBEDTLS_ECP_C | |
| CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED | |
| CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED | |
| CONFIG_MBEDTLS_ECP_NIST_OPTIM | |
| CONFIG_MBEDTLS_GCM_C | |
| CONFIG_MBEDTLS_HARDWARE_AES | |
| CONFIG_MBEDTLS_HAVE_TIME | |
| CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC | |
| CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA | |
| CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA | |
| CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA | |
| CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA | |
| CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA | |
| CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE | |
| CONFIG_MBEDTLS_KEY_EXCHANGE_RSA | |
| CONFIG_MBEDTLS_PEM_PARSE_C | |
| CONFIG_MBEDTLS_PEM_WRITE_C | |
| CONFIG_MBEDTLS_RC4_DISABLED | |
| CONFIG_MBEDTLS_SSL_ALPN | |
| CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN | |
| CONFIG_MBEDTLS_SSL_PROTO_TLS1 | |
| CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 | |
| CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 | |
| CONFIG_MBEDTLS_SSL_RENEGOTIATION | |
| CONFIG_MBEDTLS_SSL_SESSION_TICKETS | |
| CONFIG_MBEDTLS_TLS_CLIENT | |
| CONFIG_MBEDTLS_TLS_ENABLED | |
| CONFIG_MBEDTLS_TLS_SERVER | |
| CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT | |
| CONFIG_MBEDTLS_X509_CRL_PARSE_C | |
| CONFIG_MBEDTLS_X509_CSR_PARSE_C | |
| CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE | |
| CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT | |
| CONFIG_MB_CONTROLLER_STACK_SIZE | |
| CONFIG_MB_EVENT_QUEUE_TIMEOUT | |
| CONFIG_MB_QUEUE_LENGTH | |
| CONFIG_MB_SERIAL_BUF_SIZE | |
| CONFIG_MB_SERIAL_TASK_PRIO | |
| CONFIG_MB_SERIAL_TASK_STACK_SIZE | |
| CONFIG_MB_TIMER_GROUP | |
| CONFIG_MB_TIMER_INDEX | |
| CONFIG_MB_TIMER_PORT_ENABLED | |
| CONFIG_MDNS_MAX_SERVICES | |
| CONFIG_MONITOR_BAUD | |
| CONFIG_MONITOR_BAUD_115200B | |
| CONFIG_MONITOR_BAUD_OTHER_VAL | |
| CONFIG_MQTT_PROTOCOL_311 | |
| CONFIG_MQTT_TRANSPORT_SSL | |
| CONFIG_MQTT_TRANSPORT_WEBSOCKET | |
| CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE | |
| CONFIG_NEWLIB_STDIN_LINE_ENDING_CR | |
| CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF | |
| CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS | |
| CONFIG_OPENSSL_ASSERT_DO_NOTHING | |
| CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED | |
| CONFIG_OPTIMIZATION_LEVEL_DEBUG | |
| CONFIG_PARTITION_TABLE_CUSTOM_FILENAME | |
| CONFIG_PARTITION_TABLE_FILENAME | |
| CONFIG_PARTITION_TABLE_MD5 | |
| CONFIG_PARTITION_TABLE_OFFSET | |
| CONFIG_PARTITION_TABLE_SINGLE_APP | |
| CONFIG_PTHREAD_STACK_MIN | |
| CONFIG_PYTHON | |
| CONFIG_REDUCE_PHY_TX_POWER | |
| CONFIG_SPIFFS_CACHE | |
| CONFIG_SPIFFS_CACHE_WR | |
| CONFIG_SPIFFS_GC_MAX_RUNS | |
| CONFIG_SPIFFS_MAX_PARTITIONS | |
| CONFIG_SPIFFS_META_LENGTH | |
| CONFIG_SPIFFS_OBJ_NAME_LEN | |
| CONFIG_SPIFFS_PAGE_CHECK | |
| CONFIG_SPIFFS_PAGE_SIZE | |
| CONFIG_SPIFFS_USE_MAGIC | |
| CONFIG_SPIFFS_USE_MAGIC_LENGTH | |
| CONFIG_SPIFFS_USE_MTIME | |
| CONFIG_SPI_FLASH_ROM_DRIVER_PATCH | |
| CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS | |
| CONFIG_SPI_MASTER_ISR_IN_IRAM | |
| CONFIG_SPI_SLAVE_ISR_IN_IRAM | |
| CONFIG_STACK_CHECK_NONE | |
| CONFIG_SUPPORT_TERMIOS | |
| CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT | |
| CONFIG_SYSTEM_EVENT_QUEUE_SIZE | |
| CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE | |
| CONFIG_TASK_WDT | |
| CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 | |
| CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 | |
| CONFIG_TASK_WDT_TIMEOUT_S | |
| CONFIG_TCPIP_LWIP | |
| CONFIG_TCPIP_RECVMBOX_SIZE | |
| CONFIG_TCPIP_TASK_AFFINITY | |
| CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY | |
| CONFIG_TCPIP_TASK_STACK_SIZE | |
| CONFIG_TCP_MAXRTX | |
| CONFIG_TCP_MSL | |
| CONFIG_TCP_MSS | |
| CONFIG_TCP_OVERSIZE_MSS | |
| CONFIG_TCP_QUEUE_OOSEQ | |
| CONFIG_TCP_RECVMBOX_SIZE | |
| CONFIG_TCP_SND_BUF_DEFAULT | |
| CONFIG_TCP_SYNMAXRTX | |
| CONFIG_TCP_WND_DEFAULT | |
| CONFIG_TIMER_QUEUE_LENGTH | |
| CONFIG_TIMER_TASK_PRIORITY | |
| CONFIG_TIMER_TASK_STACK_DEPTH | |
| CONFIG_TIMER_TASK_STACK_SIZE | |
| CONFIG_TOOLPREFIX | |
| CONFIG_TRACEMEM_RESERVE_DRAM | |
| CONFIG_UDP_RECVMBOX_SIZE | |
| CONFIG_ULP_COPROC_RESERVE_MEM | |
| CONFIG_WL_SECTOR_SIZE | |
| CONFIG_WL_SECTOR_SIZE_4096 | |
| CORE_ID_APP | |
| CORE_ID_PRO | |
| CORE_STATE_SIGNATURE | |
| CPENABLE | |
| CPU_CLK_FREQ_ROM | |
| DAC_CHANNEL_1_GPIO_NUM | |
| DAC_CHANNEL_2_GPIO_NUM | |
| DBREAKA | |
| DBREAKA_0 | |
| DBREAKA_1 | |
| DBREAKC | |
| DBREAKC_0 | |
| DBREAKC_1 | |
| DBREAKC_LOADBREAK_MASK | |
| DBREAKC_LOADBREAK_SHIFT | |
| DBREAKC_MASK_MASK | |
| DBREAKC_MASK_SHIFT | |
| DBREAKC_STOREBREAK_MASK | |
| DBREAKC_STOREBREAK_SHIFT | |
| DDR | |
| DEBUGCAUSE | |
| DEBUGCAUSE_BREAKN_MASK | |
| DEBUGCAUSE_BREAKN_SHIFT | |
| DEBUGCAUSE_BREAK_MASK | |
| DEBUGCAUSE_BREAK_SHIFT | |
| DEBUGCAUSE_DBREAK_MASK | |
| DEBUGCAUSE_DBREAK_SHIFT | |
| DEBUGCAUSE_DEBUGINT_MASK | |
| DEBUGCAUSE_DEBUGINT_SHIFT | |
| DEBUGCAUSE_IBREAK_MASK | |
| DEBUGCAUSE_IBREAK_SHIFT | |
| DEBUGCAUSE_ICOUNT_MASK | |
| DEBUGCAUSE_ICOUNT_SHIFT | |
| DEPC | |
| DPORT_ACCESS_CHECK_APP_S | |
| DPORT_ACCESS_CHECK_APP_V | |
| DPORT_ACCESS_CHECK_PRO_S | |
| DPORT_ACCESS_CHECK_PRO_V | |
| DPORT_ACCESS_CHECK_REG | |
| DPORT_AGC_MEM_FORCE_PD_S | |
| DPORT_AGC_MEM_FORCE_PD_V | |
| DPORT_AGC_MEM_FORCE_PU_S | |
| DPORT_AGC_MEM_FORCE_PU_V | |
| DPORT_AHBLITE_ACCESS_DENY_S | |
| DPORT_AHBLITE_ACCESS_DENY_V | |
| DPORT_AHBLITE_IA_S | |
| DPORT_AHBLITE_IA_V | |
| DPORT_AHBLITE_MPU_TABLE_APB_CTRL_REG | |
| DPORT_AHBLITE_MPU_TABLE_BB_REG | |
| DPORT_AHBLITE_MPU_TABLE_BTMAC_REG | |
| DPORT_AHBLITE_MPU_TABLE_BT_BUFFER_REG | |
| DPORT_AHBLITE_MPU_TABLE_BT_REG | |
| DPORT_AHBLITE_MPU_TABLE_CAN_REG | |
| DPORT_AHBLITE_MPU_TABLE_EFUSE_REG | |
| DPORT_AHBLITE_MPU_TABLE_EMAC_REG | |
| DPORT_AHBLITE_MPU_TABLE_FE2_REG | |
| DPORT_AHBLITE_MPU_TABLE_FE_REG | |
| DPORT_AHBLITE_MPU_TABLE_GPIO_REG | |
| DPORT_AHBLITE_MPU_TABLE_HINF_REG | |
| DPORT_AHBLITE_MPU_TABLE_I2C_REG | |
| DPORT_AHBLITE_MPU_TABLE_I2C_EXT0_REG | |
| DPORT_AHBLITE_MPU_TABLE_I2C_EXT1_REG | |
| DPORT_AHBLITE_MPU_TABLE_I2S0_REG | |
| DPORT_AHBLITE_MPU_TABLE_I2S1_REG | |
| DPORT_AHBLITE_MPU_TABLE_IO_MUX_REG | |
| DPORT_AHBLITE_MPU_TABLE_LEDC_REG | |
| DPORT_AHBLITE_MPU_TABLE_MISC_REG | |
| DPORT_AHBLITE_MPU_TABLE_PCNT_REG | |
| DPORT_AHBLITE_MPU_TABLE_PWM0_REG | |
| DPORT_AHBLITE_MPU_TABLE_PWM1_REG | |
| DPORT_AHBLITE_MPU_TABLE_PWM2_REG | |
| DPORT_AHBLITE_MPU_TABLE_PWM3_REG | |
| DPORT_AHBLITE_MPU_TABLE_PWR_REG | |
| DPORT_AHBLITE_MPU_TABLE_RMT_REG | |
| DPORT_AHBLITE_MPU_TABLE_RTC_REG | |
| DPORT_AHBLITE_MPU_TABLE_RWBT_REG | |
| DPORT_AHBLITE_MPU_TABLE_SDIO_HOST_REG | |
| DPORT_AHBLITE_MPU_TABLE_SLCHOST_REG | |
| DPORT_AHBLITE_MPU_TABLE_SLC_REG | |
| DPORT_AHBLITE_MPU_TABLE_SPI0_REG | |
| DPORT_AHBLITE_MPU_TABLE_SPI1_REG | |
| DPORT_AHBLITE_MPU_TABLE_SPI2_REG | |
| DPORT_AHBLITE_MPU_TABLE_SPI3_REG | |
| DPORT_AHBLITE_MPU_TABLE_SPI_ENCRYPT_REG | |
| DPORT_AHBLITE_MPU_TABLE_TIMERGROUP1_REG | |
| DPORT_AHBLITE_MPU_TABLE_TIMERGROUP_REG | |
| DPORT_AHBLITE_MPU_TABLE_TIMER_REG | |
| DPORT_AHBLITE_MPU_TABLE_UART1_REG | |
| DPORT_AHBLITE_MPU_TABLE_UART2_REG | |
| DPORT_AHBLITE_MPU_TABLE_UART_REG | |
| DPORT_AHBLITE_MPU_TABLE_UHCI0_REG | |
| DPORT_AHBLITE_MPU_TABLE_UHCI1_REG | |
| DPORT_AHBLITE_MPU_TABLE_WDG_REG | |
| DPORT_AHBLITE_MPU_TABLE_WIFIMAC_REG | |
| DPORT_AHB_ACCESS_DENY_S | |
| DPORT_AHB_ACCESS_DENY_V | |
| DPORT_AHB_ACCESS_GRANT_0 | |
| DPORT_AHB_ACCESS_GRANT_0_V | |
| DPORT_AHB_ACCESS_GRANT_0_S | |
| DPORT_AHB_ACCESS_GRANT_1 | |
| DPORT_AHB_ACCESS_GRANT_1_V | |
| DPORT_AHB_ACCESS_GRANT_1_S | |
| DPORT_AHB_LITE_MASK_APPDPORT_S | |
| DPORT_AHB_LITE_MASK_APPDPORT_V | |
| DPORT_AHB_LITE_MASK_APP_S | |
| DPORT_AHB_LITE_MASK_APP_V | |
| DPORT_AHB_LITE_MASK_PRODPORT_S | |
| DPORT_AHB_LITE_MASK_PRODPORT_V | |
| DPORT_AHB_LITE_MASK_PRO_S | |
| DPORT_AHB_LITE_MASK_PRO_V | |
| DPORT_AHB_LITE_MASK_REG | |
| DPORT_AHB_LITE_MASK_SDIO_S | |
| DPORT_AHB_LITE_MASK_SDIO_V | |
| DPORT_AHB_LITE_SDHOST_PID_REG | |
| DPORT_AHB_LITE_SDHOST_PID_REG_S | |
| DPORT_AHB_LITE_SDHOST_PID_REG_V | |
| DPORT_AHB_MPU_TABLE_0_REG | |
| DPORT_AHB_MPU_TABLE_1_REG | |
| DPORT_AHB_SPI_REQ_S | |
| DPORT_AHB_SPI_REQ_V | |
| DPORT_APBCTRL_ACCESS_GRANT_CONFIG | |
| DPORT_APBCTRL_ACCESS_GRANT_CONFIG_S | |
| DPORT_APBCTRL_ACCESS_GRANT_CONFIG_V | |
| DPORT_APPCPU_BOOT_ADDR | |
| DPORT_APPCPU_BOOT_ADDR_S | |
| DPORT_APPCPU_BOOT_ADDR_V | |
| DPORT_APPCPU_CLKGATE_EN_S | |
| DPORT_APPCPU_CLKGATE_EN_V | |
| DPORT_APPCPU_CTRL_A_REG | |
| DPORT_APPCPU_CTRL_B_REG | |
| DPORT_APPCPU_CTRL_C_REG | |
| DPORT_APPCPU_CTRL_D_REG | |
| DPORT_APPCPU_RESETTING_S | |
| DPORT_APPCPU_RESETTING_V | |
| DPORT_APPCPU_RUNSTALL_S | |
| DPORT_APPCPU_RUNSTALL_V | |
| DPORT_APPDPORT_APB_MASK0 | |
| DPORT_APPDPORT_APB_MASK0_V | |
| DPORT_APPDPORT_APB_MASK0_S | |
| DPORT_APPDPORT_APB_MASK1 | |
| DPORT_APPDPORT_APB_MASK1_V | |
| DPORT_APPDPORT_APB_MASK1_S | |
| DPORT_APP_AHB_SPI_REQ_S | |
| DPORT_APP_AHB_SPI_REQ_V | |
| DPORT_APP_BB_INT_MAP | |
| DPORT_APP_BB_INT_MAP_REG | |
| DPORT_APP_BB_INT_MAP_S | |
| DPORT_APP_BB_INT_MAP_V | |
| DPORT_APP_BOOT_REMAP_CTRL_REG | |
| DPORT_APP_BOOT_REMAP_S | |
| DPORT_APP_BOOT_REMAP_V | |
| DPORT_APP_BT_BB_INT_MAP | |
| DPORT_APP_BT_BB_INT_MAP_REG | |
| DPORT_APP_BT_BB_INT_MAP_S | |
| DPORT_APP_BT_BB_INT_MAP_V | |
| DPORT_APP_BT_BB_NMI_MAP | |
| DPORT_APP_BT_BB_NMI_MAP_REG | |
| DPORT_APP_BT_BB_NMI_MAP_S | |
| DPORT_APP_BT_BB_NMI_MAP_V | |
| DPORT_APP_BT_MAC_INT_MAP | |
| DPORT_APP_BT_MAC_INT_MAP_REG | |
| DPORT_APP_BT_MAC_INT_MAP_S | |
| DPORT_APP_BT_MAC_INT_MAP_V | |
| DPORT_APP_CACHE_CTRL1_REG | |
| DPORT_APP_CACHE_CTRL_REG | |
| DPORT_APP_CACHE_ENABLE_S | |
| DPORT_APP_CACHE_ENABLE_V | |
| DPORT_APP_CACHE_FLUSH_DONE_S | |
| DPORT_APP_CACHE_FLUSH_DONE_V | |
| DPORT_APP_CACHE_FLUSH_ENA_S | |
| DPORT_APP_CACHE_FLUSH_ENA_V | |
| DPORT_APP_CACHE_IA | |
| DPORT_APP_CACHE_IA_INT_MAP | |
| DPORT_APP_CACHE_IA_INT_MAP_REG | |
| DPORT_APP_CACHE_IA_INT_MAP_S | |
| DPORT_APP_CACHE_IA_INT_MAP_V | |
| DPORT_APP_CACHE_IA_S | |
| DPORT_APP_CACHE_IA_V | |
| DPORT_APP_CACHE_IRAM0_PID_ERROR_V | |
| DPORT_APP_CACHE_IRAM0_PID_ERROR_S | |
| DPORT_APP_CACHE_LOCK_0_EN_V | |
| DPORT_APP_CACHE_LOCK_0_EN_S | |
| DPORT_APP_CACHE_LOCK_0_ADDR_REG | |
| DPORT_APP_CACHE_LOCK_0_ADDR_MAX | |
| DPORT_APP_CACHE_LOCK_0_ADDR_MIN | |
| DPORT_APP_CACHE_LOCK_0_ADDR_PRE | |
| DPORT_APP_CACHE_LOCK_0_ADDR_MAX_V | |
| DPORT_APP_CACHE_LOCK_0_ADDR_MAX_S | |
| DPORT_APP_CACHE_LOCK_0_ADDR_MIN_V | |
| DPORT_APP_CACHE_LOCK_0_ADDR_MIN_S | |
| DPORT_APP_CACHE_LOCK_0_ADDR_PRE_V | |
| DPORT_APP_CACHE_LOCK_0_ADDR_PRE_S | |
| DPORT_APP_CACHE_LOCK_1_EN_V | |
| DPORT_APP_CACHE_LOCK_1_EN_S | |
| DPORT_APP_CACHE_LOCK_1_ADDR_REG | |
| DPORT_APP_CACHE_LOCK_1_ADDR_MAX | |
| DPORT_APP_CACHE_LOCK_1_ADDR_MAX_V | |
| DPORT_APP_CACHE_LOCK_1_ADDR_MAX_S | |
| DPORT_APP_CACHE_LOCK_1_ADDR_MIN | |
| DPORT_APP_CACHE_LOCK_1_ADDR_MIN_V | |
| DPORT_APP_CACHE_LOCK_1_ADDR_MIN_S | |
| DPORT_APP_CACHE_LOCK_1_ADDR_PRE | |
| DPORT_APP_CACHE_LOCK_1_ADDR_PRE_V | |
| DPORT_APP_CACHE_LOCK_1_ADDR_PRE_S | |
| DPORT_APP_CACHE_LOCK_2_EN_V | |
| DPORT_APP_CACHE_LOCK_2_EN_S | |
| DPORT_APP_CACHE_LOCK_2_ADDR_REG | |
| DPORT_APP_CACHE_LOCK_2_ADDR_MAX | |
| DPORT_APP_CACHE_LOCK_2_ADDR_MAX_V | |
| DPORT_APP_CACHE_LOCK_2_ADDR_MAX_S | |
| DPORT_APP_CACHE_LOCK_2_ADDR_MIN | |
| DPORT_APP_CACHE_LOCK_2_ADDR_MIN_V | |
| DPORT_APP_CACHE_LOCK_2_ADDR_MIN_S | |
| DPORT_APP_CACHE_LOCK_2_ADDR_PRE | |
| DPORT_APP_CACHE_LOCK_2_ADDR_PRE_V | |
| DPORT_APP_CACHE_LOCK_2_ADDR_PRE_S | |
| DPORT_APP_CACHE_LOCK_3_EN_V | |
| DPORT_APP_CACHE_LOCK_3_EN_S | |
| DPORT_APP_CACHE_LOCK_3_ADDR_REG | |
| DPORT_APP_CACHE_LOCK_3_ADDR_MAX | |
| DPORT_APP_CACHE_LOCK_3_ADDR_MAX_V | |
| DPORT_APP_CACHE_LOCK_3_ADDR_MAX_S | |
| DPORT_APP_CACHE_LOCK_3_ADDR_MIN | |
| DPORT_APP_CACHE_LOCK_3_ADDR_MIN_V | |
| DPORT_APP_CACHE_LOCK_3_ADDR_MIN_S | |
| DPORT_APP_CACHE_LOCK_3_ADDR_PRE | |
| DPORT_APP_CACHE_LOCK_3_ADDR_PRE_V | |
| DPORT_APP_CACHE_LOCK_3_ADDR_PRE_S | |
| DPORT_APP_CACHE_MASK_DRAM1_V | |
| DPORT_APP_CACHE_MASK_DRAM1_S | |
| DPORT_APP_CACHE_MASK_DROM0_V | |
| DPORT_APP_CACHE_MASK_DROM0_S | |
| DPORT_APP_CACHE_MASK_IRAM0_V | |
| DPORT_APP_CACHE_MASK_IRAM0_S | |
| DPORT_APP_CACHE_MASK_IRAM1_V | |
| DPORT_APP_CACHE_MASK_IRAM1_S | |
| DPORT_APP_CACHE_MASK_IROM0_V | |
| DPORT_APP_CACHE_MASK_IROM0_S | |
| DPORT_APP_CACHE_MASK_OPSDRAM_S | |
| DPORT_APP_CACHE_MASK_OPSDRAM_V | |
| DPORT_APP_CACHE_MMU_IA_CLR_S | |
| DPORT_APP_CACHE_MMU_IA_CLR_V | |
| DPORT_APP_CACHE_MMU_IA_S | |
| DPORT_APP_CACHE_MMU_IA_V | |
| DPORT_APP_CACHE_MODE_S | |
| DPORT_APP_CACHE_MODE_V | |
| DPORT_APP_CACHE_STATE | |
| DPORT_APP_CACHE_STATE_S | |
| DPORT_APP_CACHE_STATE_V | |
| DPORT_APP_CACHE_TAG_FORCE_ON_S | |
| DPORT_APP_CACHE_TAG_FORCE_ON_V | |
| DPORT_APP_CACHE_TAG_PD_S | |
| DPORT_APP_CACHE_TAG_PD_V | |
| DPORT_APP_CACHE_VADDR | |
| DPORT_APP_CACHE_VADDR_S | |
| DPORT_APP_CACHE_VADDR_V | |
| DPORT_APP_CAN_INT_MAP | |
| DPORT_APP_CAN_INT_MAP_REG | |
| DPORT_APP_CAN_INT_MAP_S | |
| DPORT_APP_CAN_INT_MAP_V | |
| DPORT_APP_CMMU_FLASH_PAGE_MODE | |
| DPORT_APP_CMMU_FLASH_PAGE_MODE_S | |
| DPORT_APP_CMMU_FLASH_PAGE_MODE_V | |
| DPORT_APP_CMMU_FORCE_ON_S | |
| DPORT_APP_CMMU_FORCE_ON_V | |
| DPORT_APP_CMMU_PD_S | |
| DPORT_APP_CMMU_PD_V | |
| DPORT_APP_CMMU_SRAM_PAGE_MODE | |
| DPORT_APP_CMMU_SRAM_PAGE_MODE_S | |
| DPORT_APP_CMMU_SRAM_PAGE_MODE_V | |
| DPORT_APP_CPU_DISABLED_CACHE_IA | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_DRAM1_V | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_DRAM1_S | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_DROM0_V | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_DROM0_S | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_IRAM0_V | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_IRAM0_S | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_IRAM1_V | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_IRAM1_S | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_IROM0_V | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_IROM0_S | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_OPPOSITE_S | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_OPPOSITE_V | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_S | |
| DPORT_APP_CPU_DISABLED_CACHE_IA_V | |
| DPORT_APP_CPU_INTR_FROM_CPU_0_MAP | |
| DPORT_APP_CPU_INTR_FROM_CPU_0_MAP_V | |
| DPORT_APP_CPU_INTR_FROM_CPU_0_MAP_S | |
| DPORT_APP_CPU_INTR_FROM_CPU_0_MAP_REG | |
| DPORT_APP_CPU_INTR_FROM_CPU_1_MAP_REG | |
| DPORT_APP_CPU_INTR_FROM_CPU_1_MAP | |
| DPORT_APP_CPU_INTR_FROM_CPU_1_MAP_V | |
| DPORT_APP_CPU_INTR_FROM_CPU_1_MAP_S | |
| DPORT_APP_CPU_INTR_FROM_CPU_2_MAP_REG | |
| DPORT_APP_CPU_INTR_FROM_CPU_2_MAP | |
| DPORT_APP_CPU_INTR_FROM_CPU_2_MAP_V | |
| DPORT_APP_CPU_INTR_FROM_CPU_2_MAP_S | |
| DPORT_APP_CPU_INTR_FROM_CPU_3_MAP_REG | |
| DPORT_APP_CPU_INTR_FROM_CPU_3_MAP | |
| DPORT_APP_CPU_INTR_FROM_CPU_3_MAP_V | |
| DPORT_APP_CPU_INTR_FROM_CPU_3_MAP_S | |
| DPORT_APP_CPU_PDEBUG_ENABLE_S | |
| DPORT_APP_CPU_PDEBUG_ENABLE_V | |
| DPORT_APP_CPU_RECORDING_S | |
| DPORT_APP_CPU_RECORDING_V | |
| DPORT_APP_CPU_RECORD_CTRL_REG | |
| DPORT_APP_CPU_RECORD_DISABLE_S | |
| DPORT_APP_CPU_RECORD_DISABLE_V | |
| DPORT_APP_CPU_RECORD_ENABLE_S | |
| DPORT_APP_CPU_RECORD_ENABLE_V | |
| DPORT_APP_CPU_RECORD_PDEBUGDATA_REG | |
| DPORT_APP_CPU_RECORD_PDEBUGINST_REG | |
| DPORT_APP_CPU_RECORD_PDEBUGLS0STAT_REG | |
| DPORT_APP_CPU_RECORD_PDEBUGLS0ADDR_REG | |
| DPORT_APP_CPU_RECORD_PDEBUGLS0DATA_REG | |
| DPORT_APP_CPU_RECORD_PDEBUGPC_REG | |
| DPORT_APP_CPU_RECORD_PDEBUGSTATUS_REG | |
| DPORT_APP_CPU_RECORD_PID_REG | |
| DPORT_APP_CPU_RECORD_STATUS_REG | |
| DPORT_APP_CTAG_RAM_RDATA | |
| DPORT_APP_CTAG_RAM_RDATA_S | |
| DPORT_APP_CTAG_RAM_RDATA_V | |
| DPORT_APP_DCACHE_DBUG0_REG | |
| DPORT_APP_DCACHE_DBUG1_REG | |
| DPORT_APP_DCACHE_DBUG2_REG | |
| DPORT_APP_DCACHE_DBUG3_REG | |
| DPORT_APP_DCACHE_DBUG4_REG | |
| DPORT_APP_DCACHE_DBUG5_REG | |
| DPORT_APP_DCACHE_DBUG6_REG | |
| DPORT_APP_DCACHE_DBUG7_REG | |
| DPORT_APP_DCACHE_DBUG8_REG | |
| DPORT_APP_DCACHE_DBUG9_REG | |
| DPORT_APP_DPORT_APB_MASK0_REG | |
| DPORT_APP_DPORT_APB_MASK1_REG | |
| DPORT_APP_DRAM1ADDR0_IA | |
| DPORT_APP_DRAM1ADDR0_IA_V | |
| DPORT_APP_DRAM1ADDR0_IA_S | |
| DPORT_APP_DRAM_HL_S | |
| DPORT_APP_DRAM_HL_V | |
| DPORT_APP_DRAM_SPLIT_S | |
| DPORT_APP_DRAM_SPLIT_V | |
| DPORT_APP_DROM0ADDR0_IA | |
| DPORT_APP_DROM0ADDR0_IA_V | |
| DPORT_APP_DROM0ADDR0_IA_S | |
| DPORT_APP_EFUSE_INT_MAP | |
| DPORT_APP_EFUSE_INT_MAP_REG | |
| DPORT_APP_EFUSE_INT_MAP_S | |
| DPORT_APP_EFUSE_INT_MAP_V | |
| DPORT_APP_EMAC_INT_MAP | |
| DPORT_APP_EMAC_INT_MAP_REG | |
| DPORT_APP_EMAC_INT_MAP_S | |
| DPORT_APP_EMAC_INT_MAP_V | |
| DPORT_APP_GPIO_INTERRUPT_APP_MAP | |
| DPORT_APP_GPIO_INTERRUPT_APP_MAP_S | |
| DPORT_APP_GPIO_INTERRUPT_APP_MAP_V | |
| DPORT_APP_GPIO_INTERRUPT_APP_NMI_MAP | |
| DPORT_APP_GPIO_INTERRUPT_APP_NMI_MAP_S | |
| DPORT_APP_GPIO_INTERRUPT_APP_NMI_MAP_V | |
| DPORT_APP_GPIO_INTERRUPT_MAP_REG | |
| DPORT_APP_GPIO_INTERRUPT_NMI_MAP_REG | |
| DPORT_APP_I2C_EXT0_INTR_MAP | |
| DPORT_APP_I2C_EXT0_INTR_MAP_V | |
| DPORT_APP_I2C_EXT0_INTR_MAP_S | |
| DPORT_APP_I2C_EXT0_INTR_MAP_REG | |
| DPORT_APP_I2C_EXT1_INTR_MAP_REG | |
| DPORT_APP_I2C_EXT1_INTR_MAP | |
| DPORT_APP_I2C_EXT1_INTR_MAP_V | |
| DPORT_APP_I2C_EXT1_INTR_MAP_S | |
| DPORT_APP_I2S0_INT_MAP | |
| DPORT_APP_I2S0_INT_MAP_V | |
| DPORT_APP_I2S0_INT_MAP_S | |
| DPORT_APP_I2S0_INT_MAP_REG | |
| DPORT_APP_I2S1_INT_MAP_REG | |
| DPORT_APP_I2S1_INT_MAP | |
| DPORT_APP_I2S1_INT_MAP_V | |
| DPORT_APP_I2S1_INT_MAP_S | |
| DPORT_APP_INTRUSION_CTRL_REG | |
| DPORT_APP_INTRUSION_RECORD | |
| DPORT_APP_INTRUSION_RECORD_RESET_N_S | |
| DPORT_APP_INTRUSION_RECORD_RESET_N_V | |
| DPORT_APP_INTRUSION_RECORD_S | |
| DPORT_APP_INTRUSION_RECORD_V | |
| DPORT_APP_INTRUSION_STATUS_REG | |
| DPORT_APP_INTR_STATUS_0 | |
| DPORT_APP_INTR_STATUS_0_V | |
| DPORT_APP_INTR_STATUS_0_S | |
| DPORT_APP_INTR_STATUS_0_REG | |
| DPORT_APP_INTR_STATUS_1_REG | |
| DPORT_APP_INTR_STATUS_1 | |
| DPORT_APP_INTR_STATUS_1_V | |
| DPORT_APP_INTR_STATUS_1_S | |
| DPORT_APP_INTR_STATUS_2_REG | |
| DPORT_APP_INTR_STATUS_2 | |
| DPORT_APP_INTR_STATUS_2_V | |
| DPORT_APP_INTR_STATUS_2_S | |
| DPORT_APP_IRAM0ADDR_IA | |
| DPORT_APP_IRAM0ADDR_IA_V | |
| DPORT_APP_IRAM0ADDR_IA_S | |
| DPORT_APP_IRAM1ADDR_IA | |
| DPORT_APP_IRAM1ADDR_IA_V | |
| DPORT_APP_IRAM1ADDR_IA_S | |
| DPORT_APP_IROM0ADDR_IA | |
| DPORT_APP_IROM0ADDR_IA_V | |
| DPORT_APP_IROM0ADDR_IA_S | |
| DPORT_APP_LEDC_INT_MAP | |
| DPORT_APP_LEDC_INT_MAP_REG | |
| DPORT_APP_LEDC_INT_MAP_S | |
| DPORT_APP_LEDC_INT_MAP_V | |
| DPORT_APP_MAC_INTR_MAP | |
| DPORT_APP_MAC_INTR_MAP_REG | |
| DPORT_APP_MAC_INTR_MAP_S | |
| DPORT_APP_MAC_INTR_MAP_V | |
| DPORT_APP_MAC_NMI_MAP | |
| DPORT_APP_MAC_NMI_MAP_REG | |
| DPORT_APP_MAC_NMI_MAP_S | |
| DPORT_APP_MAC_NMI_MAP_V | |
| DPORT_APP_MMU_IA_INT_MAP | |
| DPORT_APP_MMU_IA_INT_MAP_REG | |
| DPORT_APP_MMU_IA_INT_MAP_S | |
| DPORT_APP_MMU_IA_INT_MAP_V | |
| DPORT_APP_MMU_RDATA | |
| DPORT_APP_MMU_RDATA_S | |
| DPORT_APP_MMU_RDATA_V | |
| DPORT_APP_MPU_IA_INT_MAP | |
| DPORT_APP_MPU_IA_INT_MAP_REG | |
| DPORT_APP_MPU_IA_INT_MAP_S | |
| DPORT_APP_MPU_IA_INT_MAP_V | |
| DPORT_APP_OPSDRAMADDR_IA | |
| DPORT_APP_OPSDRAMADDR_IA_S | |
| DPORT_APP_OPSDRAMADDR_IA_V | |
| DPORT_APP_OUT_VECBASE_REG | |
| DPORT_APP_OUT_VECBASE_REG_S | |
| DPORT_APP_OUT_VECBASE_REG_V | |
| DPORT_APP_OUT_VECBASE_SEL | |
| DPORT_APP_OUT_VECBASE_SEL_S | |
| DPORT_APP_OUT_VECBASE_SEL_V | |
| DPORT_APP_PCNT_INTR_MAP | |
| DPORT_APP_PCNT_INTR_MAP_REG | |
| DPORT_APP_PCNT_INTR_MAP_S | |
| DPORT_APP_PCNT_INTR_MAP_V | |
| DPORT_APP_PWM0_INTR_MAP | |
| DPORT_APP_PWM0_INTR_MAP_V | |
| DPORT_APP_PWM0_INTR_MAP_S | |
| DPORT_APP_PWM0_INTR_MAP_REG | |
| DPORT_APP_PWM1_INTR_MAP_REG | |
| DPORT_APP_PWM1_INTR_MAP | |
| DPORT_APP_PWM1_INTR_MAP_V | |
| DPORT_APP_PWM1_INTR_MAP_S | |
| DPORT_APP_PWM2_INTR_MAP_REG | |
| DPORT_APP_PWM2_INTR_MAP | |
| DPORT_APP_PWM2_INTR_MAP_V | |
| DPORT_APP_PWM2_INTR_MAP_S | |
| DPORT_APP_PWM3_INTR_MAP_REG | |
| DPORT_APP_PWM3_INTR_MAP | |
| DPORT_APP_PWM3_INTR_MAP_V | |
| DPORT_APP_PWM3_INTR_MAP_S | |
| DPORT_APP_RMT_INTR_MAP | |
| DPORT_APP_RMT_INTR_MAP_REG | |
| DPORT_APP_RMT_INTR_MAP_S | |
| DPORT_APP_RMT_INTR_MAP_V | |
| DPORT_APP_ROM_FO_S | |
| DPORT_APP_ROM_FO_V | |
| DPORT_APP_ROM_IA_S | |
| DPORT_APP_ROM_IA_V | |
| DPORT_APP_ROM_MPU_AD_S | |
| DPORT_APP_ROM_MPU_AD_V | |
| DPORT_APP_ROM_MPU_ENA_S | |
| DPORT_APP_ROM_MPU_ENA_V | |
| DPORT_APP_ROM_PD_S | |
| DPORT_APP_ROM_PD_V | |
| DPORT_APP_RSA_INTR_MAP | |
| DPORT_APP_RSA_INTR_MAP_REG | |
| DPORT_APP_RSA_INTR_MAP_S | |
| DPORT_APP_RSA_INTR_MAP_V | |
| DPORT_APP_RTC_CORE_INTR_MAP | |
| DPORT_APP_RTC_CORE_INTR_MAP_REG | |
| DPORT_APP_RTC_CORE_INTR_MAP_S | |
| DPORT_APP_RTC_CORE_INTR_MAP_V | |
| DPORT_APP_RWBLE_IRQ_MAP | |
| DPORT_APP_RWBLE_IRQ_MAP_REG | |
| DPORT_APP_RWBLE_IRQ_MAP_S | |
| DPORT_APP_RWBLE_IRQ_MAP_V | |
| DPORT_APP_RWBLE_NMI_MAP | |
| DPORT_APP_RWBLE_NMI_MAP_REG | |
| DPORT_APP_RWBLE_NMI_MAP_S | |
| DPORT_APP_RWBLE_NMI_MAP_V | |
| DPORT_APP_RWBT_IRQ_MAP | |
| DPORT_APP_RWBT_IRQ_MAP_REG | |
| DPORT_APP_RWBT_IRQ_MAP_S | |
| DPORT_APP_RWBT_IRQ_MAP_V | |
| DPORT_APP_RWBT_NMI_MAP | |
| DPORT_APP_RWBT_NMI_MAP_REG | |
| DPORT_APP_RWBT_NMI_MAP_S | |
| DPORT_APP_RWBT_NMI_MAP_V | |
| DPORT_APP_RX_END_S | |
| DPORT_APP_RX_END_V | |
| DPORT_APP_SDIO_HOST_INTERRUPT_MAP | |
| DPORT_APP_SDIO_HOST_INTERRUPT_MAP_REG | |
| DPORT_APP_SDIO_HOST_INTERRUPT_MAP_S | |
| DPORT_APP_SDIO_HOST_INTERRUPT_MAP_V | |
| DPORT_APP_SINGLE_IRAM_ENA_S | |
| DPORT_APP_SINGLE_IRAM_ENA_V | |
| DPORT_APP_SLAVE_REQ_S | |
| DPORT_APP_SLAVE_REQ_V | |
| DPORT_APP_SLAVE_WDATA_V_S | |
| DPORT_APP_SLAVE_WDATA_V_V | |
| DPORT_APP_SLAVE_WR_S | |
| DPORT_APP_SLAVE_WR_V | |
| DPORT_APP_SLC0_INTR_MAP | |
| DPORT_APP_SLC0_INTR_MAP_V | |
| DPORT_APP_SLC0_INTR_MAP_S | |
| DPORT_APP_SLC0_INTR_MAP_REG | |
| DPORT_APP_SLC1_INTR_MAP_REG | |
| DPORT_APP_SLC1_INTR_MAP | |
| DPORT_APP_SLC1_INTR_MAP_V | |
| DPORT_APP_SLC1_INTR_MAP_S | |
| DPORT_APP_SPI1_DMA_INT_MAP_REG | |
| DPORT_APP_SPI1_DMA_INT_MAP | |
| DPORT_APP_SPI1_DMA_INT_MAP_V | |
| DPORT_APP_SPI1_DMA_INT_MAP_S | |
| DPORT_APP_SPI2_DMA_INT_MAP_REG | |
| DPORT_APP_SPI2_DMA_INT_MAP | |
| DPORT_APP_SPI2_DMA_INT_MAP_V | |
| DPORT_APP_SPI2_DMA_INT_MAP_S | |
| DPORT_APP_SPI3_DMA_INT_MAP_REG | |
| DPORT_APP_SPI3_DMA_INT_MAP | |
| DPORT_APP_SPI3_DMA_INT_MAP_V | |
| DPORT_APP_SPI3_DMA_INT_MAP_S | |
| DPORT_APP_SPI_INTR_0_MAP | |
| DPORT_APP_SPI_INTR_0_MAP_V | |
| DPORT_APP_SPI_INTR_0_MAP_S | |
| DPORT_APP_SPI_INTR_0_MAP_REG | |
| DPORT_APP_SPI_INTR_1_MAP_REG | |
| DPORT_APP_SPI_INTR_1_MAP | |
| DPORT_APP_SPI_INTR_1_MAP_V | |
| DPORT_APP_SPI_INTR_1_MAP_S | |
| DPORT_APP_SPI_INTR_2_MAP_REG | |
| DPORT_APP_SPI_INTR_2_MAP | |
| DPORT_APP_SPI_INTR_2_MAP_V | |
| DPORT_APP_SPI_INTR_2_MAP_S | |
| DPORT_APP_SPI_INTR_3_MAP_REG | |
| DPORT_APP_SPI_INTR_3_MAP | |
| DPORT_APP_SPI_INTR_3_MAP_V | |
| DPORT_APP_SPI_INTR_3_MAP_S | |
| DPORT_APP_TG1_WDT_LEVEL_INT_MAP_REG | |
| DPORT_APP_TG1_WDT_LEVEL_INT_MAP | |
| DPORT_APP_TG1_WDT_LEVEL_INT_MAP_V | |
| DPORT_APP_TG1_WDT_LEVEL_INT_MAP_S | |
| DPORT_APP_TG1_LACT_LEVEL_INT_MAP_REG | |
| DPORT_APP_TG1_LACT_LEVEL_INT_MAP | |
| DPORT_APP_TG1_LACT_LEVEL_INT_MAP_V | |
| DPORT_APP_TG1_LACT_LEVEL_INT_MAP_S | |
| DPORT_APP_TG1_WDT_EDGE_INT_MAP_REG | |
| DPORT_APP_TG1_WDT_EDGE_INT_MAP | |
| DPORT_APP_TG1_WDT_EDGE_INT_MAP_V | |
| DPORT_APP_TG1_WDT_EDGE_INT_MAP_S | |
| DPORT_APP_TG1_LACT_EDGE_INT_MAP_REG | |
| DPORT_APP_TG1_LACT_EDGE_INT_MAP | |
| DPORT_APP_TG1_LACT_EDGE_INT_MAP_V | |
| DPORT_APP_TG1_LACT_EDGE_INT_MAP_S | |
| DPORT_APP_TG1_T0_EDGE_INT_MAP | |
| DPORT_APP_TG1_T0_LEVEL_INT_MAP | |
| DPORT_APP_TG1_T0_EDGE_INT_MAP_V | |
| DPORT_APP_TG1_T0_EDGE_INT_MAP_S | |
| DPORT_APP_TG1_T0_LEVEL_INT_MAP_V | |
| DPORT_APP_TG1_T0_LEVEL_INT_MAP_S | |
| DPORT_APP_TG1_T0_EDGE_INT_MAP_REG | |
| DPORT_APP_TG1_T0_LEVEL_INT_MAP_REG | |
| DPORT_APP_TG1_T1_LEVEL_INT_MAP_REG | |
| DPORT_APP_TG1_T1_LEVEL_INT_MAP | |
| DPORT_APP_TG1_T1_LEVEL_INT_MAP_V | |
| DPORT_APP_TG1_T1_LEVEL_INT_MAP_S | |
| DPORT_APP_TG1_T1_EDGE_INT_MAP_REG | |
| DPORT_APP_TG1_T1_EDGE_INT_MAP | |
| DPORT_APP_TG1_T1_EDGE_INT_MAP_V | |
| DPORT_APP_TG1_T1_EDGE_INT_MAP_S | |
| DPORT_APP_TG_LACT_EDGE_INT_MAP | |
| DPORT_APP_TG_LACT_EDGE_INT_MAP_REG | |
| DPORT_APP_TG_LACT_EDGE_INT_MAP_S | |
| DPORT_APP_TG_LACT_EDGE_INT_MAP_V | |
| DPORT_APP_TG_LACT_LEVEL_INT_MAP | |
| DPORT_APP_TG_LACT_LEVEL_INT_MAP_REG | |
| DPORT_APP_TG_LACT_LEVEL_INT_MAP_S | |
| DPORT_APP_TG_LACT_LEVEL_INT_MAP_V | |
| DPORT_APP_TG_T0_EDGE_INT_MAP | |
| DPORT_APP_TG_T0_LEVEL_INT_MAP | |
| DPORT_APP_TG_T0_EDGE_INT_MAP_V | |
| DPORT_APP_TG_T0_EDGE_INT_MAP_S | |
| DPORT_APP_TG_T0_LEVEL_INT_MAP_V | |
| DPORT_APP_TG_T0_LEVEL_INT_MAP_S | |
| DPORT_APP_TG_T0_EDGE_INT_MAP_REG | |
| DPORT_APP_TG_T0_LEVEL_INT_MAP_REG | |
| DPORT_APP_TG_T1_LEVEL_INT_MAP_REG | |
| DPORT_APP_TG_T1_LEVEL_INT_MAP | |
| DPORT_APP_TG_T1_LEVEL_INT_MAP_V | |
| DPORT_APP_TG_T1_LEVEL_INT_MAP_S | |
| DPORT_APP_TG_T1_EDGE_INT_MAP_REG | |
| DPORT_APP_TG_T1_EDGE_INT_MAP | |
| DPORT_APP_TG_T1_EDGE_INT_MAP_V | |
| DPORT_APP_TG_T1_EDGE_INT_MAP_S | |
| DPORT_APP_TG_WDT_EDGE_INT_MAP | |
| DPORT_APP_TG_WDT_EDGE_INT_MAP_REG | |
| DPORT_APP_TG_WDT_EDGE_INT_MAP_S | |
| DPORT_APP_TG_WDT_EDGE_INT_MAP_V | |
| DPORT_APP_TG_WDT_LEVEL_INT_MAP | |
| DPORT_APP_TG_WDT_LEVEL_INT_MAP_REG | |
| DPORT_APP_TG_WDT_LEVEL_INT_MAP_S | |
| DPORT_APP_TG_WDT_LEVEL_INT_MAP_V | |
| DPORT_APP_TIMER_INT1_MAP_REG | |
| DPORT_APP_TIMER_INT1_MAP | |
| DPORT_APP_TIMER_INT1_MAP_V | |
| DPORT_APP_TIMER_INT1_MAP_S | |
| DPORT_APP_TIMER_INT2_MAP_REG | |
| DPORT_APP_TIMER_INT2_MAP | |
| DPORT_APP_TIMER_INT2_MAP_V | |
| DPORT_APP_TIMER_INT2_MAP_S | |
| DPORT_APP_TRACEMEM_ENA_REG | |
| DPORT_APP_TRACEMEM_ENA_S | |
| DPORT_APP_TRACEMEM_ENA_V | |
| DPORT_APP_TX_END_S | |
| DPORT_APP_TX_END_V | |
| DPORT_APP_UART1_INTR_MAP_REG | |
| DPORT_APP_UART1_INTR_MAP | |
| DPORT_APP_UART1_INTR_MAP_V | |
| DPORT_APP_UART1_INTR_MAP_S | |
| DPORT_APP_UART2_INTR_MAP_REG | |
| DPORT_APP_UART2_INTR_MAP | |
| DPORT_APP_UART2_INTR_MAP_V | |
| DPORT_APP_UART2_INTR_MAP_S | |
| DPORT_APP_UART_INTR_MAP | |
| DPORT_APP_UART_INTR_MAP_REG | |
| DPORT_APP_UART_INTR_MAP_S | |
| DPORT_APP_UART_INTR_MAP_V | |
| DPORT_APP_UHCI0_INTR_MAP | |
| DPORT_APP_UHCI0_INTR_MAP_V | |
| DPORT_APP_UHCI0_INTR_MAP_S | |
| DPORT_APP_UHCI0_INTR_MAP_REG | |
| DPORT_APP_UHCI1_INTR_MAP_REG | |
| DPORT_APP_UHCI1_INTR_MAP | |
| DPORT_APP_UHCI1_INTR_MAP_V | |
| DPORT_APP_UHCI1_INTR_MAP_S | |
| DPORT_APP_VECBASE_CTRL_REG | |
| DPORT_APP_VECBASE_SET_REG | |
| DPORT_APP_WDG_INT_MAP | |
| DPORT_APP_WDG_INT_MAP_REG | |
| DPORT_APP_WDG_INT_MAP_S | |
| DPORT_APP_WDG_INT_MAP_V | |
| DPORT_APP_WR_BAK_TO_READ_S | |
| DPORT_APP_WR_BAK_TO_READ_V | |
| DPORT_ARB_IA | |
| DPORT_ARB_IA_S | |
| DPORT_ARB_IA_V | |
| DPORT_BB_ACCESS_GRANT_CONFIG | |
| DPORT_BB_ACCESS_GRANT_CONFIG_S | |
| DPORT_BB_ACCESS_GRANT_CONFIG_V | |
| DPORT_BTBUFFER_ACCESS_GRANT_CONFIG | |
| DPORT_BTBUFFER_ACCESS_GRANT_CONFIG_S | |
| DPORT_BTBUFFER_ACCESS_GRANT_CONFIG_V | |
| DPORT_BTEXTWAKEUP_REQ_S | |
| DPORT_BTEXTWAKEUP_REQ_V | |
| DPORT_BTMAC_ACCESS_GRANT_CONFIG | |
| DPORT_BTMAC_ACCESS_GRANT_CONFIG_S | |
| DPORT_BTMAC_ACCESS_GRANT_CONFIG_V | |
| DPORT_BT_ACCESS_GRANT_CONFIG | |
| DPORT_BT_ACCESS_GRANT_CONFIG_S | |
| DPORT_BT_ACCESS_GRANT_CONFIG_V | |
| DPORT_BT_LPCK_DIV_A | |
| DPORT_BT_LPCK_DIV_A_S | |
| DPORT_BT_LPCK_DIV_A_V | |
| DPORT_BT_LPCK_DIV_B | |
| DPORT_BT_LPCK_DIV_B_S | |
| DPORT_BT_LPCK_DIV_B_V | |
| DPORT_BT_LPCK_DIV_FRAC_REG | |
| DPORT_BT_LPCK_DIV_INT_REG | |
| DPORT_BT_LPCK_DIV_NUM | |
| DPORT_BT_LPCK_DIV_NUM_S | |
| DPORT_BT_LPCK_DIV_NUM_V | |
| DPORT_CACHE_IA_INT_APP_DRAM1_V | |
| DPORT_CACHE_IA_INT_APP_DRAM1_S | |
| DPORT_CACHE_IA_INT_APP_DROM0_V | |
| DPORT_CACHE_IA_INT_APP_DROM0_S | |
| DPORT_CACHE_IA_INT_APP_IRAM0_V | |
| DPORT_CACHE_IA_INT_APP_IRAM0_S | |
| DPORT_CACHE_IA_INT_APP_IRAM1_V | |
| DPORT_CACHE_IA_INT_APP_IRAM1_S | |
| DPORT_CACHE_IA_INT_APP_IROM0_V | |
| DPORT_CACHE_IA_INT_APP_IROM0_S | |
| DPORT_CACHE_IA_INT_APP_OPPOSITE_S | |
| DPORT_CACHE_IA_INT_APP_OPPOSITE_V | |
| DPORT_CACHE_IA_INT_EN | |
| DPORT_CACHE_IA_INT_EN_REG | |
| DPORT_CACHE_IA_INT_EN_S | |
| DPORT_CACHE_IA_INT_EN_V | |
| DPORT_CACHE_IA_INT_PRO_DRAM1_V | |
| DPORT_CACHE_IA_INT_PRO_DRAM1_S | |
| DPORT_CACHE_IA_INT_PRO_DROM0_V | |
| DPORT_CACHE_IA_INT_PRO_DROM0_S | |
| DPORT_CACHE_IA_INT_PRO_IRAM0_V | |
| DPORT_CACHE_IA_INT_PRO_IRAM0_S | |
| DPORT_CACHE_IA_INT_PRO_IRAM1_V | |
| DPORT_CACHE_IA_INT_PRO_IRAM1_S | |
| DPORT_CACHE_IA_INT_PRO_IROM0_V | |
| DPORT_CACHE_IA_INT_PRO_IROM0_S | |
| DPORT_CACHE_IA_INT_PRO_OPPOSITE_S | |
| DPORT_CACHE_IA_INT_PRO_OPPOSITE_V | |
| DPORT_CACHE_MUX_MODE | |
| DPORT_CACHE_MUX_MODE_REG | |
| DPORT_CACHE_MUX_MODE_S | |
| DPORT_CACHE_MUX_MODE_V | |
| DPORT_CAN_ACCESS_GRANT_CONFIG | |
| DPORT_CAN_ACCESS_GRANT_CONFIG_S | |
| DPORT_CAN_ACCESS_GRANT_CONFIG_V | |
| DPORT_CORE_RST_EN_REG | |
| DPORT_CPUPERIOD_SEL | |
| DPORT_CPUPERIOD_SEL_80 | |
| DPORT_CPUPERIOD_SEL_160 | |
| DPORT_CPUPERIOD_SEL_240 | |
| DPORT_CPUPERIOD_SEL_S | |
| DPORT_CPUPERIOD_SEL_V | |
| DPORT_CPU_INTR_FROM_CPU_0_V | |
| DPORT_CPU_INTR_FROM_CPU_0_S | |
| DPORT_CPU_INTR_FROM_CPU_0_REG | |
| DPORT_CPU_INTR_FROM_CPU_1_REG | |
| DPORT_CPU_INTR_FROM_CPU_1_V | |
| DPORT_CPU_INTR_FROM_CPU_1_S | |
| DPORT_CPU_INTR_FROM_CPU_2_REG | |
| DPORT_CPU_INTR_FROM_CPU_2_V | |
| DPORT_CPU_INTR_FROM_CPU_2_S | |
| DPORT_CPU_INTR_FROM_CPU_3_REG | |
| DPORT_CPU_INTR_FROM_CPU_3_V | |
| DPORT_CPU_INTR_FROM_CPU_3_S | |
| DPORT_CPU_PER_CONF_REG | |
| DPORT_DATE | |
| DPORT_DATE_REG | |
| DPORT_DATE_S | |
| DPORT_DATE_V | |
| DPORT_DMMU_PAGE_MODE | |
| DPORT_DMMU_PAGE_MODE_REG | |
| DPORT_DMMU_PAGE_MODE_S | |
| DPORT_DMMU_PAGE_MODE_V | |
| DPORT_DMMU_TABLE0 | |
| DPORT_DMMU_TABLE0_V | |
| DPORT_DMMU_TABLE0_S | |
| DPORT_DMMU_TABLE0_REG | |
| DPORT_DMMU_TABLE1_REG | |
| DPORT_DMMU_TABLE1 | |
| DPORT_DMMU_TABLE1_V | |
| DPORT_DMMU_TABLE1_S | |
| DPORT_DMMU_TABLE2_REG | |
| DPORT_DMMU_TABLE2 | |
| DPORT_DMMU_TABLE2_V | |
| DPORT_DMMU_TABLE2_S | |
| DPORT_DMMU_TABLE3_REG | |
| DPORT_DMMU_TABLE3 | |
| DPORT_DMMU_TABLE3_V | |
| DPORT_DMMU_TABLE3_S | |
| DPORT_DMMU_TABLE4_REG | |
| DPORT_DMMU_TABLE4 | |
| DPORT_DMMU_TABLE4_V | |
| DPORT_DMMU_TABLE4_S | |
| DPORT_DMMU_TABLE5_REG | |
| DPORT_DMMU_TABLE5 | |
| DPORT_DMMU_TABLE5_V | |
| DPORT_DMMU_TABLE5_S | |
| DPORT_DMMU_TABLE6_REG | |
| DPORT_DMMU_TABLE6 | |
| DPORT_DMMU_TABLE6_V | |
| DPORT_DMMU_TABLE6_S | |
| DPORT_DMMU_TABLE7_REG | |
| DPORT_DMMU_TABLE7 | |
| DPORT_DMMU_TABLE7_V | |
| DPORT_DMMU_TABLE7_S | |
| DPORT_DMMU_TABLE8_REG | |
| DPORT_DMMU_TABLE8 | |
| DPORT_DMMU_TABLE8_V | |
| DPORT_DMMU_TABLE8_S | |
| DPORT_DMMU_TABLE9_REG | |
| DPORT_DMMU_TABLE9 | |
| DPORT_DMMU_TABLE9_V | |
| DPORT_DMMU_TABLE9_S | |
| DPORT_DMMU_TABLE10_REG | |
| DPORT_DMMU_TABLE10 | |
| DPORT_DMMU_TABLE10_V | |
| DPORT_DMMU_TABLE10_S | |
| DPORT_DMMU_TABLE11_REG | |
| DPORT_DMMU_TABLE11 | |
| DPORT_DMMU_TABLE11_V | |
| DPORT_DMMU_TABLE11_S | |
| DPORT_DMMU_TABLE12_REG | |
| DPORT_DMMU_TABLE12 | |
| DPORT_DMMU_TABLE12_V | |
| DPORT_DMMU_TABLE12_S | |
| DPORT_DMMU_TABLE13_REG | |
| DPORT_DMMU_TABLE13 | |
| DPORT_DMMU_TABLE13_V | |
| DPORT_DMMU_TABLE13_S | |
| DPORT_DMMU_TABLE14_REG | |
| DPORT_DMMU_TABLE14 | |
| DPORT_DMMU_TABLE14_V | |
| DPORT_DMMU_TABLE14_S | |
| DPORT_DMMU_TABLE15_REG | |
| DPORT_DMMU_TABLE15 | |
| DPORT_DMMU_TABLE15_V | |
| DPORT_DMMU_TABLE15_S | |
| DPORT_DPORT_DATE_VERSION | |
| DPORT_EFUSE_ACCESS_GRANT_CONFIG | |
| DPORT_EFUSE_ACCESS_GRANT_CONFIG_S | |
| DPORT_EFUSE_ACCESS_GRANT_CONFIG_V | |
| DPORT_EMAC_ACCESS_GRANT_CONFIG | |
| DPORT_EMAC_ACCESS_GRANT_CONFIG_S | |
| DPORT_EMAC_ACCESS_GRANT_CONFIG_V | |
| DPORT_FAST_CLK_RTC_SEL_S | |
| DPORT_FAST_CLK_RTC_SEL_V | |
| DPORT_FE2_ACCESS_GRANT_CONFIG | |
| DPORT_FE2_ACCESS_GRANT_CONFIG_V | |
| DPORT_FE2_ACCESS_GRANT_CONFIG_S | |
| DPORT_FE_ACCESS_GRANT_CONFIG | |
| DPORT_FE_ACCESS_GRANT_CONFIG_S | |
| DPORT_FE_ACCESS_GRANT_CONFIG_V | |
| DPORT_FLASH_MMU_TABLE_INVALID_VAL | |
| DPORT_FLASH_MMU_TABLE_SIZE | |
| DPORT_FRONT_END_MEM_PD_REG | |
| DPORT_GPIO_ACCESS_GRANT_CONFIG | |
| DPORT_GPIO_ACCESS_GRANT_CONFIG_S | |
| DPORT_GPIO_ACCESS_GRANT_CONFIG_V | |
| DPORT_HINF_ACCESS_GRANT_CONFIG | |
| DPORT_HINF_ACCESS_GRANT_CONFIG_S | |
| DPORT_HINF_ACCESS_GRANT_CONFIG_V | |
| DPORT_HOST_INF_SEL_REG | |
| DPORT_I2C_ACCESS_GRANT_CONFIG | |
| DPORT_I2C_ACCESS_GRANT_CONFIG_V | |
| DPORT_I2C_ACCESS_GRANT_CONFIG_S | |
| DPORT_I2CEXT0_ACCESS_GRANT_CONFIG | |
| DPORT_I2CEXT0_ACCESS_GRANT_CONFIG_V | |
| DPORT_I2CEXT0_ACCESS_GRANT_CONFIG_S | |
| DPORT_I2CEXT1_ACCESS_GRANT_CONFIG | |
| DPORT_I2CEXT1_ACCESS_GRANT_CONFIG_V | |
| DPORT_I2CEXT1_ACCESS_GRANT_CONFIG_S | |
| DPORT_I2S0_ACCESS_GRANT_CONFIG | |
| DPORT_I2S0_ACCESS_GRANT_CONFIG_V | |
| DPORT_I2S0_ACCESS_GRANT_CONFIG_S | |
| DPORT_I2S1_ACCESS_GRANT_CONFIG | |
| DPORT_I2S1_ACCESS_GRANT_CONFIG_V | |
| DPORT_I2S1_ACCESS_GRANT_CONFIG_S | |
| DPORT_IMMU_PAGE_MODE | |
| DPORT_IMMU_PAGE_MODE_REG | |
| DPORT_IMMU_PAGE_MODE_S | |
| DPORT_IMMU_PAGE_MODE_V | |
| DPORT_IMMU_TABLE0 | |
| DPORT_IMMU_TABLE0_V | |
| DPORT_IMMU_TABLE0_S | |
| DPORT_IMMU_TABLE0_REG | |
| DPORT_IMMU_TABLE1_REG | |
| DPORT_IMMU_TABLE1 | |
| DPORT_IMMU_TABLE1_V | |
| DPORT_IMMU_TABLE1_S | |
| DPORT_IMMU_TABLE2_REG | |
| DPORT_IMMU_TABLE2 | |
| DPORT_IMMU_TABLE2_V | |
| DPORT_IMMU_TABLE2_S | |
| DPORT_IMMU_TABLE3_REG | |
| DPORT_IMMU_TABLE3 | |
| DPORT_IMMU_TABLE3_V | |
| DPORT_IMMU_TABLE3_S | |
| DPORT_IMMU_TABLE4_REG | |
| DPORT_IMMU_TABLE4 | |
| DPORT_IMMU_TABLE4_V | |
| DPORT_IMMU_TABLE4_S | |
| DPORT_IMMU_TABLE5_REG | |
| DPORT_IMMU_TABLE5 | |
| DPORT_IMMU_TABLE5_V | |
| DPORT_IMMU_TABLE5_S | |
| DPORT_IMMU_TABLE6_REG | |
| DPORT_IMMU_TABLE6 | |
| DPORT_IMMU_TABLE6_V | |
| DPORT_IMMU_TABLE6_S | |
| DPORT_IMMU_TABLE7_REG | |
| DPORT_IMMU_TABLE7 | |
| DPORT_IMMU_TABLE7_V | |
| DPORT_IMMU_TABLE7_S | |
| DPORT_IMMU_TABLE8_REG | |
| DPORT_IMMU_TABLE8 | |
| DPORT_IMMU_TABLE8_V | |
| DPORT_IMMU_TABLE8_S | |
| DPORT_IMMU_TABLE9_REG | |
| DPORT_IMMU_TABLE9 | |
| DPORT_IMMU_TABLE9_V | |
| DPORT_IMMU_TABLE9_S | |
| DPORT_IMMU_TABLE10_REG | |
| DPORT_IMMU_TABLE10 | |
| DPORT_IMMU_TABLE10_V | |
| DPORT_IMMU_TABLE10_S | |
| DPORT_IMMU_TABLE11_REG | |
| DPORT_IMMU_TABLE11 | |
| DPORT_IMMU_TABLE11_V | |
| DPORT_IMMU_TABLE11_S | |
| DPORT_IMMU_TABLE12_REG | |
| DPORT_IMMU_TABLE12 | |
| DPORT_IMMU_TABLE12_V | |
| DPORT_IMMU_TABLE12_S | |
| DPORT_IMMU_TABLE13_REG | |
| DPORT_IMMU_TABLE13 | |
| DPORT_IMMU_TABLE13_V | |
| DPORT_IMMU_TABLE13_S | |
| DPORT_IMMU_TABLE14_REG | |
| DPORT_IMMU_TABLE14 | |
| DPORT_IMMU_TABLE14_V | |
| DPORT_IMMU_TABLE14_S | |
| DPORT_IMMU_TABLE15_REG | |
| DPORT_IMMU_TABLE15 | |
| DPORT_IMMU_TABLE15_V | |
| DPORT_IMMU_TABLE15_S | |
| DPORT_INTERNAL_SRAM_DMMU_ENA_S | |
| DPORT_INTERNAL_SRAM_DMMU_ENA_V | |
| DPORT_INTERNAL_SRAM_IA | |
| DPORT_INTERNAL_SRAM_IA_S | |
| DPORT_INTERNAL_SRAM_IA_V | |
| DPORT_INTERNAL_SRAM_IMMU_ENA_S | |
| DPORT_INTERNAL_SRAM_IMMU_ENA_V | |
| DPORT_INTERNAL_SRAM_MMU_AD | |
| DPORT_INTERNAL_SRAM_MMU_AD_S | |
| DPORT_INTERNAL_SRAM_MMU_AD_V | |
| DPORT_INTERNAL_SRAM_MMU_MISS | |
| DPORT_INTERNAL_SRAM_MMU_MISS_S | |
| DPORT_INTERNAL_SRAM_MMU_MISS_V | |
| DPORT_INTERNAL_SRAM_MMU_MULTI_HIT | |
| DPORT_INTERNAL_SRAM_MMU_MULTI_HIT_S | |
| DPORT_INTERNAL_SRAM_MMU_MULTI_HIT_V | |
| DPORT_IOMUX_ACCESS_GRANT_CONFIG | |
| DPORT_IOMUX_ACCESS_GRANT_CONFIG_S | |
| DPORT_IOMUX_ACCESS_GRANT_CONFIG_V | |
| DPORT_IRAM_DRAM_AHB_SEL_REG | |
| DPORT_LEDC_ACCESS_GRANT_CONFIG | |
| DPORT_LEDC_ACCESS_GRANT_CONFIG_S | |
| DPORT_LEDC_ACCESS_GRANT_CONFIG_V | |
| DPORT_LINK_DEVICE_SEL | |
| DPORT_LINK_DEVICE_SEL_S | |
| DPORT_LINK_DEVICE_SEL_V | |
| DPORT_LOWSPEED_CLK_SEL_S | |
| DPORT_LOWSPEED_CLK_SEL_V | |
| DPORT_LPCLK_SEL_8M_V | |
| DPORT_LPCLK_SEL_8M_S | |
| DPORT_LPCLK_SEL_RTC_SLOW_S | |
| DPORT_LPCLK_SEL_RTC_SLOW_V | |
| DPORT_LPCLK_SEL_XTAL32K_V | |
| DPORT_LPCLK_SEL_XTAL32K_S | |
| DPORT_LPCLK_SEL_XTAL_S | |
| DPORT_LPCLK_SEL_XTAL_V | |
| DPORT_LSLP_MEM_PD_MASK_S | |
| DPORT_LSLP_MEM_PD_MASK_V | |
| DPORT_MAC_DUMP_MODE | |
| DPORT_MAC_DUMP_MODE_S | |
| DPORT_MAC_DUMP_MODE_V | |
| DPORT_MASK_AHB_S | |
| DPORT_MASK_AHB_V | |
| DPORT_MASK_APP_DRAM_S | |
| DPORT_MASK_APP_DRAM_V | |
| DPORT_MASK_APP_IRAM_S | |
| DPORT_MASK_APP_IRAM_V | |
| DPORT_MASK_PRO_DRAM_S | |
| DPORT_MASK_PRO_DRAM_V | |
| DPORT_MASK_PRO_IRAM_S | |
| DPORT_MASK_PRO_IRAM_V | |
| DPORT_MEM_ACCESS_DBUG0_REG | |
| DPORT_MEM_ACCESS_DBUG1_REG | |
| DPORT_MEM_PD_MASK_REG | |
| DPORT_MISC_ACCESS_GRANT_CONFIG | |
| DPORT_MISC_ACCESS_GRANT_CONFIG_S | |
| DPORT_MISC_ACCESS_GRANT_CONFIG_V | |
| DPORT_MMU_IA_INT_EN | |
| DPORT_MMU_IA_INT_EN_REG | |
| DPORT_MMU_IA_INT_EN_S | |
| DPORT_MMU_IA_INT_EN_V | |
| DPORT_MPU_IA_INT_EN | |
| DPORT_MPU_IA_INT_EN_REG | |
| DPORT_MPU_IA_INT_EN_S | |
| DPORT_MPU_IA_INT_EN_V | |
| DPORT_PBUS_MEM_FORCE_PD_S | |
| DPORT_PBUS_MEM_FORCE_PD_V | |
| DPORT_PBUS_MEM_FORCE_PU_S | |
| DPORT_PBUS_MEM_FORCE_PU_V | |
| DPORT_PCNT_ACCESS_GRANT_CONFIG | |
| DPORT_PCNT_ACCESS_GRANT_CONFIG_S | |
| DPORT_PCNT_ACCESS_GRANT_CONFIG_V | |
| DPORT_PERIP_CLK_EN | |
| DPORT_PERIP_CLK_EN_REG | |
| DPORT_PERIP_CLK_EN_S | |
| DPORT_PERIP_CLK_EN_V | |
| DPORT_PERIP_RST | |
| DPORT_PERIP_RST_EN_REG | |
| DPORT_PERIP_RST_S | |
| DPORT_PERIP_RST_V | |
| DPORT_PERI_CLK_EN | |
| DPORT_PERI_CLK_EN_REG | |
| DPORT_PERI_CLK_EN_S | |
| DPORT_PERI_CLK_EN_V | |
| DPORT_PERI_EN_AES | |
| DPORT_PERI_EN_DIGITAL_SIGNATURE | |
| DPORT_PERI_EN_RSA | |
| DPORT_PERI_EN_SECUREBOOT | |
| DPORT_PERI_EN_SHA | |
| DPORT_PERI_IO_SWAP | |
| DPORT_PERI_IO_SWAP_S | |
| DPORT_PERI_IO_SWAP_V | |
| DPORT_PERI_RST_EN | |
| DPORT_PERI_RST_EN_REG | |
| DPORT_PERI_RST_EN_S | |
| DPORT_PERI_RST_EN_V | |
| DPORT_PIDGEN_IA | |
| DPORT_PIDGEN_IA_S | |
| DPORT_PIDGEN_IA_V | |
| DPORT_PRODPORT_APB_MASK0 | |
| DPORT_PRODPORT_APB_MASK0_V | |
| DPORT_PRODPORT_APB_MASK0_S | |
| DPORT_PRODPORT_APB_MASK1 | |
| DPORT_PRODPORT_APB_MASK1_V | |
| DPORT_PRODPORT_APB_MASK1_S | |
| DPORT_PRO_AHB_SPI_REQ_S | |
| DPORT_PRO_AHB_SPI_REQ_V | |
| DPORT_PRO_BB_INT_MAP | |
| DPORT_PRO_BB_INT_MAP_REG | |
| DPORT_PRO_BB_INT_MAP_S | |
| DPORT_PRO_BB_INT_MAP_V | |
| DPORT_PRO_BOOT_REMAP_CTRL_REG | |
| DPORT_PRO_BOOT_REMAP_S | |
| DPORT_PRO_BOOT_REMAP_V | |
| DPORT_PRO_BT_BB_INT_MAP | |
| DPORT_PRO_BT_BB_INT_MAP_REG | |
| DPORT_PRO_BT_BB_INT_MAP_S | |
| DPORT_PRO_BT_BB_INT_MAP_V | |
| DPORT_PRO_BT_BB_NMI_MAP | |
| DPORT_PRO_BT_BB_NMI_MAP_REG | |
| DPORT_PRO_BT_BB_NMI_MAP_S | |
| DPORT_PRO_BT_BB_NMI_MAP_V | |
| DPORT_PRO_BT_MAC_INT_MAP | |
| DPORT_PRO_BT_MAC_INT_MAP_REG | |
| DPORT_PRO_BT_MAC_INT_MAP_S | |
| DPORT_PRO_BT_MAC_INT_MAP_V | |
| DPORT_PRO_CACHE_CTRL1_REG | |
| DPORT_PRO_CACHE_CTRL_REG | |
| DPORT_PRO_CACHE_ENABLE_S | |
| DPORT_PRO_CACHE_ENABLE_V | |
| DPORT_PRO_CACHE_FLUSH_DONE_S | |
| DPORT_PRO_CACHE_FLUSH_DONE_V | |
| DPORT_PRO_CACHE_FLUSH_ENA_S | |
| DPORT_PRO_CACHE_FLUSH_ENA_V | |
| DPORT_PRO_CACHE_IA | |
| DPORT_PRO_CACHE_IA_INT_MAP | |
| DPORT_PRO_CACHE_IA_INT_MAP_REG | |
| DPORT_PRO_CACHE_IA_INT_MAP_S | |
| DPORT_PRO_CACHE_IA_INT_MAP_V | |
| DPORT_PRO_CACHE_IA_S | |
| DPORT_PRO_CACHE_IA_V | |
| DPORT_PRO_CACHE_IRAM0_PID_ERROR_V | |
| DPORT_PRO_CACHE_IRAM0_PID_ERROR_S | |
| DPORT_PRO_CACHE_LOCK_0_EN_V | |
| DPORT_PRO_CACHE_LOCK_0_EN_S | |
| DPORT_PRO_CACHE_LOCK_0_ADDR_REG | |
| DPORT_PRO_CACHE_LOCK_0_ADDR_MAX | |
| DPORT_PRO_CACHE_LOCK_0_ADDR_MIN | |
| DPORT_PRO_CACHE_LOCK_0_ADDR_PRE | |
| DPORT_PRO_CACHE_LOCK_0_ADDR_MAX_V | |
| DPORT_PRO_CACHE_LOCK_0_ADDR_MAX_S | |
| DPORT_PRO_CACHE_LOCK_0_ADDR_MIN_V | |
| DPORT_PRO_CACHE_LOCK_0_ADDR_MIN_S | |
| DPORT_PRO_CACHE_LOCK_0_ADDR_PRE_V | |
| DPORT_PRO_CACHE_LOCK_0_ADDR_PRE_S | |
| DPORT_PRO_CACHE_LOCK_1_EN_V | |
| DPORT_PRO_CACHE_LOCK_1_EN_S | |
| DPORT_PRO_CACHE_LOCK_1_ADDR_REG | |
| DPORT_PRO_CACHE_LOCK_1_ADDR_MAX | |
| DPORT_PRO_CACHE_LOCK_1_ADDR_MAX_V | |
| DPORT_PRO_CACHE_LOCK_1_ADDR_MAX_S | |
| DPORT_PRO_CACHE_LOCK_1_ADDR_MIN | |
| DPORT_PRO_CACHE_LOCK_1_ADDR_MIN_V | |
| DPORT_PRO_CACHE_LOCK_1_ADDR_MIN_S | |
| DPORT_PRO_CACHE_LOCK_1_ADDR_PRE | |
| DPORT_PRO_CACHE_LOCK_1_ADDR_PRE_V | |
| DPORT_PRO_CACHE_LOCK_1_ADDR_PRE_S | |
| DPORT_PRO_CACHE_LOCK_2_EN_V | |
| DPORT_PRO_CACHE_LOCK_2_EN_S | |
| DPORT_PRO_CACHE_LOCK_2_ADDR_REG | |
| DPORT_PRO_CACHE_LOCK_2_ADDR_MAX | |
| DPORT_PRO_CACHE_LOCK_2_ADDR_MAX_V | |
| DPORT_PRO_CACHE_LOCK_2_ADDR_MAX_S | |
| DPORT_PRO_CACHE_LOCK_2_ADDR_MIN | |
| DPORT_PRO_CACHE_LOCK_2_ADDR_MIN_V | |
| DPORT_PRO_CACHE_LOCK_2_ADDR_MIN_S | |
| DPORT_PRO_CACHE_LOCK_2_ADDR_PRE | |
| DPORT_PRO_CACHE_LOCK_2_ADDR_PRE_V | |
| DPORT_PRO_CACHE_LOCK_2_ADDR_PRE_S | |
| DPORT_PRO_CACHE_LOCK_3_EN_V | |
| DPORT_PRO_CACHE_LOCK_3_EN_S | |
| DPORT_PRO_CACHE_LOCK_3_ADDR_REG | |
| DPORT_PRO_CACHE_LOCK_3_ADDR_MAX | |
| DPORT_PRO_CACHE_LOCK_3_ADDR_MAX_V | |
| DPORT_PRO_CACHE_LOCK_3_ADDR_MAX_S | |
| DPORT_PRO_CACHE_LOCK_3_ADDR_MIN | |
| DPORT_PRO_CACHE_LOCK_3_ADDR_MIN_V | |
| DPORT_PRO_CACHE_LOCK_3_ADDR_MIN_S | |
| DPORT_PRO_CACHE_LOCK_3_ADDR_PRE | |
| DPORT_PRO_CACHE_LOCK_3_ADDR_PRE_V | |
| DPORT_PRO_CACHE_LOCK_3_ADDR_PRE_S | |
| DPORT_PRO_CACHE_MASK_DRAM1_V | |
| DPORT_PRO_CACHE_MASK_DRAM1_S | |
| DPORT_PRO_CACHE_MASK_DROM0_V | |
| DPORT_PRO_CACHE_MASK_DROM0_S | |
| DPORT_PRO_CACHE_MASK_IRAM0_V | |
| DPORT_PRO_CACHE_MASK_IRAM0_S | |
| DPORT_PRO_CACHE_MASK_IRAM1_V | |
| DPORT_PRO_CACHE_MASK_IRAM1_S | |
| DPORT_PRO_CACHE_MASK_IROM0_V | |
| DPORT_PRO_CACHE_MASK_IROM0_S | |
| DPORT_PRO_CACHE_MASK_OPSDRAM_S | |
| DPORT_PRO_CACHE_MASK_OPSDRAM_V | |
| DPORT_PRO_CACHE_MMU_IA_CLR_S | |
| DPORT_PRO_CACHE_MMU_IA_CLR_V | |
| DPORT_PRO_CACHE_MMU_IA_S | |
| DPORT_PRO_CACHE_MMU_IA_V | |
| DPORT_PRO_CACHE_MODE_S | |
| DPORT_PRO_CACHE_MODE_V | |
| DPORT_PRO_CACHE_STATE | |
| DPORT_PRO_CACHE_STATE_S | |
| DPORT_PRO_CACHE_STATE_V | |
| DPORT_PRO_CACHE_TAG_FORCE_ON_S | |
| DPORT_PRO_CACHE_TAG_FORCE_ON_V | |
| DPORT_PRO_CACHE_TAG_PD_S | |
| DPORT_PRO_CACHE_TAG_PD_V | |
| DPORT_PRO_CACHE_VADDR | |
| DPORT_PRO_CACHE_VADDR_S | |
| DPORT_PRO_CACHE_VADDR_V | |
| DPORT_PRO_CAN_INT_MAP | |
| DPORT_PRO_CAN_INT_MAP_REG | |
| DPORT_PRO_CAN_INT_MAP_S | |
| DPORT_PRO_CAN_INT_MAP_V | |
| DPORT_PRO_CMMU_FLASH_PAGE_MODE | |
| DPORT_PRO_CMMU_FLASH_PAGE_MODE_S | |
| DPORT_PRO_CMMU_FLASH_PAGE_MODE_V | |
| DPORT_PRO_CMMU_FORCE_ON_S | |
| DPORT_PRO_CMMU_FORCE_ON_V | |
| DPORT_PRO_CMMU_PD_S | |
| DPORT_PRO_CMMU_PD_V | |
| DPORT_PRO_CMMU_SRAM_PAGE_MODE | |
| DPORT_PRO_CMMU_SRAM_PAGE_MODE_S | |
| DPORT_PRO_CMMU_SRAM_PAGE_MODE_V | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_DRAM1_V | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_DRAM1_S | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_DROM0_V | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_DROM0_S | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_IRAM0_V | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_IRAM0_S | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_IRAM1_V | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_IRAM1_S | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_IROM0_V | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_IROM0_S | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_OPPOSITE_S | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_OPPOSITE_V | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_S | |
| DPORT_PRO_CPU_DISABLED_CACHE_IA_V | |
| DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP | |
| DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP_V | |
| DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP_S | |
| DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP_REG | |
| DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP_REG | |
| DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP | |
| DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP_V | |
| DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP_S | |
| DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP_REG | |
| DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP | |
| DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP_V | |
| DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP_S | |
| DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP_REG | |
| DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP | |
| DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP_V | |
| DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP_S | |
| DPORT_PRO_CPU_PDEBUG_ENABLE_S | |
| DPORT_PRO_CPU_PDEBUG_ENABLE_V | |
| DPORT_PRO_CPU_RECORDING_S | |
| DPORT_PRO_CPU_RECORDING_V | |
| DPORT_PRO_CPU_RECORD_CTRL_REG | |
| DPORT_PRO_CPU_RECORD_DISABLE_S | |
| DPORT_PRO_CPU_RECORD_DISABLE_V | |
| DPORT_PRO_CPU_RECORD_ENABLE_S | |
| DPORT_PRO_CPU_RECORD_ENABLE_V | |
| DPORT_PRO_CPU_RECORD_PDEBUGDATA_REG | |
| DPORT_PRO_CPU_RECORD_PDEBUGINST_REG | |
| DPORT_PRO_CPU_RECORD_PDEBUGLS0STAT_REG | |
| DPORT_PRO_CPU_RECORD_PDEBUGLS0ADDR_REG | |
| DPORT_PRO_CPU_RECORD_PDEBUGLS0DATA_REG | |
| DPORT_PRO_CPU_RECORD_PDEBUGPC_REG | |
| DPORT_PRO_CPU_RECORD_PDEBUGSTATUS_REG | |
| DPORT_PRO_CPU_RECORD_PID_REG | |
| DPORT_PRO_CPU_RECORD_STATUS_REG | |
| DPORT_PRO_CTAG_RAM_RDATA | |
| DPORT_PRO_CTAG_RAM_RDATA_S | |
| DPORT_PRO_CTAG_RAM_RDATA_V | |
| DPORT_PRO_DCACHE_DBUG0_REG | |
| DPORT_PRO_DCACHE_DBUG1_REG | |
| DPORT_PRO_DCACHE_DBUG2_REG | |
| DPORT_PRO_DCACHE_DBUG3_REG | |
| DPORT_PRO_DCACHE_DBUG4_REG | |
| DPORT_PRO_DCACHE_DBUG5_REG | |
| DPORT_PRO_DCACHE_DBUG6_REG | |
| DPORT_PRO_DCACHE_DBUG7_REG | |
| DPORT_PRO_DCACHE_DBUG8_REG | |
| DPORT_PRO_DCACHE_DBUG9_REG | |
| DPORT_PRO_DPORT_APB_MASK0_REG | |
| DPORT_PRO_DPORT_APB_MASK1_REG | |
| DPORT_PRO_DRAM1ADDR0_IA | |
| DPORT_PRO_DRAM1ADDR0_IA_V | |
| DPORT_PRO_DRAM1ADDR0_IA_S | |
| DPORT_PRO_DRAM_HL_S | |
| DPORT_PRO_DRAM_HL_V | |
| DPORT_PRO_DRAM_SPLIT_S | |
| DPORT_PRO_DRAM_SPLIT_V | |
| DPORT_PRO_DROM0ADDR0_IA | |
| DPORT_PRO_DROM0ADDR0_IA_V | |
| DPORT_PRO_DROM0ADDR0_IA_S | |
| DPORT_PRO_EFUSE_INT_MAP | |
| DPORT_PRO_EFUSE_INT_MAP_REG | |
| DPORT_PRO_EFUSE_INT_MAP_S | |
| DPORT_PRO_EFUSE_INT_MAP_V | |
| DPORT_PRO_EMAC_INT_MAP | |
| DPORT_PRO_EMAC_INT_MAP_REG | |
| DPORT_PRO_EMAC_INT_MAP_S | |
| DPORT_PRO_EMAC_INT_MAP_V | |
| DPORT_PRO_GPIO_INTERRUPT_MAP_REG | |
| DPORT_PRO_GPIO_INTERRUPT_NMI_MAP_REG | |
| DPORT_PRO_GPIO_INTERRUPT_PRO_MAP | |
| DPORT_PRO_GPIO_INTERRUPT_PRO_MAP_S | |
| DPORT_PRO_GPIO_INTERRUPT_PRO_MAP_V | |
| DPORT_PRO_GPIO_INTERRUPT_PRO_NMI_MAP | |
| DPORT_PRO_GPIO_INTERRUPT_PRO_NMI_MAP_S | |
| DPORT_PRO_GPIO_INTERRUPT_PRO_NMI_MAP_V | |
| DPORT_PRO_I2C_EXT0_INTR_MAP | |
| DPORT_PRO_I2C_EXT0_INTR_MAP_V | |
| DPORT_PRO_I2C_EXT0_INTR_MAP_S | |
| DPORT_PRO_I2C_EXT0_INTR_MAP_REG | |
| DPORT_PRO_I2C_EXT1_INTR_MAP_REG | |
| DPORT_PRO_I2C_EXT1_INTR_MAP | |
| DPORT_PRO_I2C_EXT1_INTR_MAP_V | |
| DPORT_PRO_I2C_EXT1_INTR_MAP_S | |
| DPORT_PRO_I2S0_INT_MAP | |
| DPORT_PRO_I2S0_INT_MAP_V | |
| DPORT_PRO_I2S0_INT_MAP_S | |
| DPORT_PRO_I2S0_INT_MAP_REG | |
| DPORT_PRO_I2S1_INT_MAP_REG | |
| DPORT_PRO_I2S1_INT_MAP | |
| DPORT_PRO_I2S1_INT_MAP_V | |
| DPORT_PRO_I2S1_INT_MAP_S | |
| DPORT_PRO_INTRUSION_CTRL_REG | |
| DPORT_PRO_INTRUSION_RECORD | |
| DPORT_PRO_INTRUSION_RECORD_RESET_N_S | |
| DPORT_PRO_INTRUSION_RECORD_RESET_N_V | |
| DPORT_PRO_INTRUSION_RECORD_S | |
| DPORT_PRO_INTRUSION_RECORD_V | |
| DPORT_PRO_INTRUSION_STATUS_REG | |
| DPORT_PRO_INTR_STATUS_0 | |
| DPORT_PRO_INTR_STATUS_0_V | |
| DPORT_PRO_INTR_STATUS_0_S | |
| DPORT_PRO_INTR_STATUS_0_REG | |
| DPORT_PRO_INTR_STATUS_1_REG | |
| DPORT_PRO_INTR_STATUS_1 | |
| DPORT_PRO_INTR_STATUS_1_V | |
| DPORT_PRO_INTR_STATUS_1_S | |
| DPORT_PRO_INTR_STATUS_2_REG | |
| DPORT_PRO_INTR_STATUS_2 | |
| DPORT_PRO_INTR_STATUS_2_V | |
| DPORT_PRO_INTR_STATUS_2_S | |
| DPORT_PRO_IRAM0ADDR_IA | |
| DPORT_PRO_IRAM0ADDR_IA_V | |
| DPORT_PRO_IRAM0ADDR_IA_S | |
| DPORT_PRO_IRAM1ADDR_IA | |
| DPORT_PRO_IRAM1ADDR_IA_V | |
| DPORT_PRO_IRAM1ADDR_IA_S | |
| DPORT_PRO_IROM0ADDR_IA | |
| DPORT_PRO_IROM0ADDR_IA_V | |
| DPORT_PRO_IROM0ADDR_IA_S | |
| DPORT_PRO_LEDC_INT_MAP | |
| DPORT_PRO_LEDC_INT_MAP_REG | |
| DPORT_PRO_LEDC_INT_MAP_S | |
| DPORT_PRO_LEDC_INT_MAP_V | |
| DPORT_PRO_MAC_INTR_MAP | |
| DPORT_PRO_MAC_INTR_MAP_REG | |
| DPORT_PRO_MAC_INTR_MAP_S | |
| DPORT_PRO_MAC_INTR_MAP_V | |
| DPORT_PRO_MAC_NMI_MAP | |
| DPORT_PRO_MAC_NMI_MAP_REG | |
| DPORT_PRO_MAC_NMI_MAP_S | |
| DPORT_PRO_MAC_NMI_MAP_V | |
| DPORT_PRO_MMU_IA_INT_MAP | |
| DPORT_PRO_MMU_IA_INT_MAP_REG | |
| DPORT_PRO_MMU_IA_INT_MAP_S | |
| DPORT_PRO_MMU_IA_INT_MAP_V | |
| DPORT_PRO_MMU_RDATA | |
| DPORT_PRO_MMU_RDATA_S | |
| DPORT_PRO_MMU_RDATA_V | |
| DPORT_PRO_MPU_IA_INT_MAP | |
| DPORT_PRO_MPU_IA_INT_MAP_REG | |
| DPORT_PRO_MPU_IA_INT_MAP_S | |
| DPORT_PRO_MPU_IA_INT_MAP_V | |
| DPORT_PRO_OPSDRAMADDR_IA | |
| DPORT_PRO_OPSDRAMADDR_IA_S | |
| DPORT_PRO_OPSDRAMADDR_IA_V | |
| DPORT_PRO_OUT_VECBASE_REG | |
| DPORT_PRO_OUT_VECBASE_REG_S | |
| DPORT_PRO_OUT_VECBASE_REG_V | |
| DPORT_PRO_OUT_VECBASE_SEL | |
| DPORT_PRO_OUT_VECBASE_SEL_S | |
| DPORT_PRO_OUT_VECBASE_SEL_V | |
| DPORT_PRO_PCNT_INTR_MAP | |
| DPORT_PRO_PCNT_INTR_MAP_REG | |
| DPORT_PRO_PCNT_INTR_MAP_S | |
| DPORT_PRO_PCNT_INTR_MAP_V | |
| DPORT_PRO_PWM0_INTR_MAP | |
| DPORT_PRO_PWM0_INTR_MAP_V | |
| DPORT_PRO_PWM0_INTR_MAP_S | |
| DPORT_PRO_PWM0_INTR_MAP_REG | |
| DPORT_PRO_PWM1_INTR_MAP_REG | |
| DPORT_PRO_PWM1_INTR_MAP | |
| DPORT_PRO_PWM1_INTR_MAP_V | |
| DPORT_PRO_PWM1_INTR_MAP_S | |
| DPORT_PRO_PWM2_INTR_MAP_REG | |
| DPORT_PRO_PWM2_INTR_MAP | |
| DPORT_PRO_PWM2_INTR_MAP_V | |
| DPORT_PRO_PWM2_INTR_MAP_S | |
| DPORT_PRO_PWM3_INTR_MAP_REG | |
| DPORT_PRO_PWM3_INTR_MAP | |
| DPORT_PRO_PWM3_INTR_MAP_V | |
| DPORT_PRO_PWM3_INTR_MAP_S | |
| DPORT_PRO_RMT_INTR_MAP | |
| DPORT_PRO_RMT_INTR_MAP_REG | |
| DPORT_PRO_RMT_INTR_MAP_S | |
| DPORT_PRO_RMT_INTR_MAP_V | |
| DPORT_PRO_ROM_FO_S | |
| DPORT_PRO_ROM_FO_V | |
| DPORT_PRO_ROM_IA_S | |
| DPORT_PRO_ROM_IA_V | |
| DPORT_PRO_ROM_MPU_AD_S | |
| DPORT_PRO_ROM_MPU_AD_V | |
| DPORT_PRO_ROM_MPU_ENA_S | |
| DPORT_PRO_ROM_MPU_ENA_V | |
| DPORT_PRO_ROM_PD_S | |
| DPORT_PRO_ROM_PD_V | |
| DPORT_PRO_RSA_INTR_MAP | |
| DPORT_PRO_RSA_INTR_MAP_REG | |
| DPORT_PRO_RSA_INTR_MAP_S | |
| DPORT_PRO_RSA_INTR_MAP_V | |
| DPORT_PRO_RTC_CORE_INTR_MAP | |
| DPORT_PRO_RTC_CORE_INTR_MAP_REG | |
| DPORT_PRO_RTC_CORE_INTR_MAP_S | |
| DPORT_PRO_RTC_CORE_INTR_MAP_V | |
| DPORT_PRO_RWBLE_IRQ_MAP | |
| DPORT_PRO_RWBLE_IRQ_MAP_REG | |
| DPORT_PRO_RWBLE_IRQ_MAP_S | |
| DPORT_PRO_RWBLE_IRQ_MAP_V | |
| DPORT_PRO_RWBLE_NMI_MAP | |
| DPORT_PRO_RWBLE_NMI_MAP_REG | |
| DPORT_PRO_RWBLE_NMI_MAP_S | |
| DPORT_PRO_RWBLE_NMI_MAP_V | |
| DPORT_PRO_RWBT_IRQ_MAP | |
| DPORT_PRO_RWBT_IRQ_MAP_REG | |
| DPORT_PRO_RWBT_IRQ_MAP_S | |
| DPORT_PRO_RWBT_IRQ_MAP_V | |
| DPORT_PRO_RWBT_NMI_MAP | |
| DPORT_PRO_RWBT_NMI_MAP_REG | |
| DPORT_PRO_RWBT_NMI_MAP_S | |
| DPORT_PRO_RWBT_NMI_MAP_V | |
| DPORT_PRO_RX_END_S | |
| DPORT_PRO_RX_END_V | |
| DPORT_PRO_SDIO_HOST_INTERRUPT_MAP | |
| DPORT_PRO_SDIO_HOST_INTERRUPT_MAP_REG | |
| DPORT_PRO_SDIO_HOST_INTERRUPT_MAP_S | |
| DPORT_PRO_SDIO_HOST_INTERRUPT_MAP_V | |
| DPORT_PRO_SINGLE_IRAM_ENA_S | |
| DPORT_PRO_SINGLE_IRAM_ENA_V | |
| DPORT_PRO_SLAVE_REQ_S | |
| DPORT_PRO_SLAVE_REQ_V | |
| DPORT_PRO_SLAVE_WDATA_V_S | |
| DPORT_PRO_SLAVE_WDATA_V_V | |
| DPORT_PRO_SLAVE_WR_S | |
| DPORT_PRO_SLAVE_WR_V | |
| DPORT_PRO_SLC0_INTR_MAP | |
| DPORT_PRO_SLC0_INTR_MAP_V | |
| DPORT_PRO_SLC0_INTR_MAP_S | |
| DPORT_PRO_SLC0_INTR_MAP_REG | |
| DPORT_PRO_SLC1_INTR_MAP_REG | |
| DPORT_PRO_SLC1_INTR_MAP | |
| DPORT_PRO_SLC1_INTR_MAP_V | |
| DPORT_PRO_SLC1_INTR_MAP_S | |
| DPORT_PRO_SPI1_DMA_INT_MAP_REG | |
| DPORT_PRO_SPI1_DMA_INT_MAP | |
| DPORT_PRO_SPI1_DMA_INT_MAP_V | |
| DPORT_PRO_SPI1_DMA_INT_MAP_S | |
| DPORT_PRO_SPI2_DMA_INT_MAP_REG | |
| DPORT_PRO_SPI2_DMA_INT_MAP | |
| DPORT_PRO_SPI2_DMA_INT_MAP_V | |
| DPORT_PRO_SPI2_DMA_INT_MAP_S | |
| DPORT_PRO_SPI3_DMA_INT_MAP_REG | |
| DPORT_PRO_SPI3_DMA_INT_MAP | |
| DPORT_PRO_SPI3_DMA_INT_MAP_V | |
| DPORT_PRO_SPI3_DMA_INT_MAP_S | |
| DPORT_PRO_SPI_INTR_0_MAP | |
| DPORT_PRO_SPI_INTR_0_MAP_V | |
| DPORT_PRO_SPI_INTR_0_MAP_S | |
| DPORT_PRO_SPI_INTR_0_MAP_REG | |
| DPORT_PRO_SPI_INTR_1_MAP_REG | |
| DPORT_PRO_SPI_INTR_1_MAP | |
| DPORT_PRO_SPI_INTR_1_MAP_V | |
| DPORT_PRO_SPI_INTR_1_MAP_S | |
| DPORT_PRO_SPI_INTR_2_MAP_REG | |
| DPORT_PRO_SPI_INTR_2_MAP | |
| DPORT_PRO_SPI_INTR_2_MAP_V | |
| DPORT_PRO_SPI_INTR_2_MAP_S | |
| DPORT_PRO_SPI_INTR_3_MAP_REG | |
| DPORT_PRO_SPI_INTR_3_MAP | |
| DPORT_PRO_SPI_INTR_3_MAP_V | |
| DPORT_PRO_SPI_INTR_3_MAP_S | |
| DPORT_PRO_TG1_WDT_LEVEL_INT_MAP_REG | |
| DPORT_PRO_TG1_WDT_LEVEL_INT_MAP | |
| DPORT_PRO_TG1_WDT_LEVEL_INT_MAP_V | |
| DPORT_PRO_TG1_WDT_LEVEL_INT_MAP_S | |
| DPORT_PRO_TG1_LACT_LEVEL_INT_MAP_REG | |
| DPORT_PRO_TG1_LACT_LEVEL_INT_MAP | |
| DPORT_PRO_TG1_LACT_LEVEL_INT_MAP_V | |
| DPORT_PRO_TG1_LACT_LEVEL_INT_MAP_S | |
| DPORT_PRO_TG1_WDT_EDGE_INT_MAP_REG | |
| DPORT_PRO_TG1_WDT_EDGE_INT_MAP | |
| DPORT_PRO_TG1_WDT_EDGE_INT_MAP_V | |
| DPORT_PRO_TG1_WDT_EDGE_INT_MAP_S | |
| DPORT_PRO_TG1_LACT_EDGE_INT_MAP_REG | |
| DPORT_PRO_TG1_LACT_EDGE_INT_MAP | |
| DPORT_PRO_TG1_LACT_EDGE_INT_MAP_V | |
| DPORT_PRO_TG1_LACT_EDGE_INT_MAP_S | |
| DPORT_PRO_TG1_T0_EDGE_INT_MAP | |
| DPORT_PRO_TG1_T0_LEVEL_INT_MAP | |
| DPORT_PRO_TG1_T0_EDGE_INT_MAP_V | |
| DPORT_PRO_TG1_T0_EDGE_INT_MAP_S | |
| DPORT_PRO_TG1_T0_LEVEL_INT_MAP_V | |
| DPORT_PRO_TG1_T0_LEVEL_INT_MAP_S | |
| DPORT_PRO_TG1_T0_EDGE_INT_MAP_REG | |
| DPORT_PRO_TG1_T0_LEVEL_INT_MAP_REG | |
| DPORT_PRO_TG1_T1_LEVEL_INT_MAP_REG | |
| DPORT_PRO_TG1_T1_LEVEL_INT_MAP | |
| DPORT_PRO_TG1_T1_LEVEL_INT_MAP_V | |
| DPORT_PRO_TG1_T1_LEVEL_INT_MAP_S | |
| DPORT_PRO_TG1_T1_EDGE_INT_MAP_REG | |
| DPORT_PRO_TG1_T1_EDGE_INT_MAP | |
| DPORT_PRO_TG1_T1_EDGE_INT_MAP_V | |
| DPORT_PRO_TG1_T1_EDGE_INT_MAP_S | |
| DPORT_PRO_TG_LACT_EDGE_INT_MAP | |
| DPORT_PRO_TG_LACT_EDGE_INT_MAP_REG | |
| DPORT_PRO_TG_LACT_EDGE_INT_MAP_S | |
| DPORT_PRO_TG_LACT_EDGE_INT_MAP_V | |
| DPORT_PRO_TG_LACT_LEVEL_INT_MAP | |
| DPORT_PRO_TG_LACT_LEVEL_INT_MAP_REG | |
| DPORT_PRO_TG_LACT_LEVEL_INT_MAP_S | |
| DPORT_PRO_TG_LACT_LEVEL_INT_MAP_V | |
| DPORT_PRO_TG_T0_EDGE_INT_MAP | |
| DPORT_PRO_TG_T0_LEVEL_INT_MAP | |
| DPORT_PRO_TG_T0_EDGE_INT_MAP_V | |
| DPORT_PRO_TG_T0_EDGE_INT_MAP_S | |
| DPORT_PRO_TG_T0_LEVEL_INT_MAP_V | |
| DPORT_PRO_TG_T0_LEVEL_INT_MAP_S | |
| DPORT_PRO_TG_T0_EDGE_INT_MAP_REG | |
| DPORT_PRO_TG_T0_LEVEL_INT_MAP_REG | |
| DPORT_PRO_TG_T1_LEVEL_INT_MAP_REG | |
| DPORT_PRO_TG_T1_LEVEL_INT_MAP | |
| DPORT_PRO_TG_T1_LEVEL_INT_MAP_V | |
| DPORT_PRO_TG_T1_LEVEL_INT_MAP_S | |
| DPORT_PRO_TG_T1_EDGE_INT_MAP_REG | |
| DPORT_PRO_TG_T1_EDGE_INT_MAP | |
| DPORT_PRO_TG_T1_EDGE_INT_MAP_V | |
| DPORT_PRO_TG_T1_EDGE_INT_MAP_S | |
| DPORT_PRO_TG_WDT_EDGE_INT_MAP | |
| DPORT_PRO_TG_WDT_EDGE_INT_MAP_REG | |
| DPORT_PRO_TG_WDT_EDGE_INT_MAP_S | |
| DPORT_PRO_TG_WDT_EDGE_INT_MAP_V | |
| DPORT_PRO_TG_WDT_LEVEL_INT_MAP | |
| DPORT_PRO_TG_WDT_LEVEL_INT_MAP_REG | |
| DPORT_PRO_TG_WDT_LEVEL_INT_MAP_S | |
| DPORT_PRO_TG_WDT_LEVEL_INT_MAP_V | |
| DPORT_PRO_TIMER_INT1_MAP_REG | |
| DPORT_PRO_TIMER_INT1_MAP | |
| DPORT_PRO_TIMER_INT1_MAP_V | |
| DPORT_PRO_TIMER_INT1_MAP_S | |
| DPORT_PRO_TIMER_INT2_MAP_REG | |
| DPORT_PRO_TIMER_INT2_MAP | |
| DPORT_PRO_TIMER_INT2_MAP_V | |
| DPORT_PRO_TIMER_INT2_MAP_S | |
| DPORT_PRO_TRACEMEM_ENA_REG | |
| DPORT_PRO_TRACEMEM_ENA_S | |
| DPORT_PRO_TRACEMEM_ENA_V | |
| DPORT_PRO_TX_END_S | |
| DPORT_PRO_TX_END_V | |
| DPORT_PRO_UART1_INTR_MAP_REG | |
| DPORT_PRO_UART1_INTR_MAP | |
| DPORT_PRO_UART1_INTR_MAP_V | |
| DPORT_PRO_UART1_INTR_MAP_S | |
| DPORT_PRO_UART2_INTR_MAP_REG | |
| DPORT_PRO_UART2_INTR_MAP | |
| DPORT_PRO_UART2_INTR_MAP_V | |
| DPORT_PRO_UART2_INTR_MAP_S | |
| DPORT_PRO_UART_INTR_MAP | |
| DPORT_PRO_UART_INTR_MAP_REG | |
| DPORT_PRO_UART_INTR_MAP_S | |
| DPORT_PRO_UART_INTR_MAP_V | |
| DPORT_PRO_UHCI0_INTR_MAP | |
| DPORT_PRO_UHCI0_INTR_MAP_V | |
| DPORT_PRO_UHCI0_INTR_MAP_S | |
| DPORT_PRO_UHCI0_INTR_MAP_REG | |
| DPORT_PRO_UHCI1_INTR_MAP_REG | |
| DPORT_PRO_UHCI1_INTR_MAP | |
| DPORT_PRO_UHCI1_INTR_MAP_V | |
| DPORT_PRO_UHCI1_INTR_MAP_S | |
| DPORT_PRO_VECBASE_CTRL_REG | |
| DPORT_PRO_VECBASE_SET_REG | |
| DPORT_PRO_WDG_INT_MAP | |
| DPORT_PRO_WDG_INT_MAP_REG | |
| DPORT_PRO_WDG_INT_MAP_S | |
| DPORT_PRO_WDG_INT_MAP_V | |
| DPORT_PRO_WR_BAK_TO_READ_S | |
| DPORT_PRO_WR_BAK_TO_READ_V | |
| DPORT_PWM0_ACCESS_GRANT_CONFIG | |
| DPORT_PWM0_ACCESS_GRANT_CONFIG_V | |
| DPORT_PWM0_ACCESS_GRANT_CONFIG_S | |
| DPORT_PWM1_ACCESS_GRANT_CONFIG | |
| DPORT_PWM1_ACCESS_GRANT_CONFIG_V | |
| DPORT_PWM1_ACCESS_GRANT_CONFIG_S | |
| DPORT_PWM2_ACCESS_GRANT_CONFIG | |
| DPORT_PWM2_ACCESS_GRANT_CONFIG_V | |
| DPORT_PWM2_ACCESS_GRANT_CONFIG_S | |
| DPORT_PWM3_ACCESS_GRANT_CONFIG | |
| DPORT_PWM3_ACCESS_GRANT_CONFIG_V | |
| DPORT_PWM3_ACCESS_GRANT_CONFIG_S | |
| DPORT_PWR_ACCESS_GRANT_CONFIG | |
| DPORT_PWR_ACCESS_GRANT_CONFIG_S | |
| DPORT_PWR_ACCESS_GRANT_CONFIG_V | |
| DPORT_RECORD_APP_PDEBUGDATA | |
| DPORT_RECORD_APP_PDEBUGDATA_S | |
| DPORT_RECORD_APP_PDEBUGDATA_V | |
| DPORT_RECORD_APP_PDEBUGINST | |
| DPORT_RECORD_APP_PDEBUGINST_S | |
| DPORT_RECORD_APP_PDEBUGINST_V | |
| DPORT_RECORD_APP_PDEBUGLS0STAT | |
| DPORT_RECORD_APP_PDEBUGLS0ADDR | |
| DPORT_RECORD_APP_PDEBUGLS0DATA | |
| DPORT_RECORD_APP_PDEBUGLS0STAT_V | |
| DPORT_RECORD_APP_PDEBUGLS0STAT_S | |
| DPORT_RECORD_APP_PDEBUGLS0ADDR_V | |
| DPORT_RECORD_APP_PDEBUGLS0ADDR_S | |
| DPORT_RECORD_APP_PDEBUGLS0DATA_V | |
| DPORT_RECORD_APP_PDEBUGLS0DATA_S | |
| DPORT_RECORD_APP_PDEBUGPC | |
| DPORT_RECORD_APP_PDEBUGPC_S | |
| DPORT_RECORD_APP_PDEBUGPC_V | |
| DPORT_RECORD_APP_PDEBUGSTATUS | |
| DPORT_RECORD_APP_PDEBUGSTATUS_S | |
| DPORT_RECORD_APP_PDEBUGSTATUS_V | |
| DPORT_RECORD_APP_PID | |
| DPORT_RECORD_APP_PID_S | |
| DPORT_RECORD_APP_PID_V | |
| DPORT_RECORD_PDEBUGDATA_EXCCAUSE_S | |
| DPORT_RECORD_PDEBUGDATA_EXCCAUSE_V | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_DBG | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_DBL | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_EMEM | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_INT2 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_INT3 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_INT4 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_INT5 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_INT6 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_KRNL | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_M | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_NMI | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_NONE | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_OVF4 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_OVF8 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_OVF12 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_RST | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_S | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_UNF4 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_UNF8 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_UNF12 | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_USR | |
| DPORT_RECORD_PDEBUGDATA_EXCVEC_V | |
| DPORT_RECORD_PDEBUGDATA_INSNTYPE_ER_S | |
| DPORT_RECORD_PDEBUGDATA_INSNTYPE_ER_V | |
| DPORT_RECORD_PDEBUGDATA_INSNTYPE_SR_S | |
| DPORT_RECORD_PDEBUGDATA_INSNTYPE_SR_V | |
| DPORT_RECORD_PDEBUGINST_CINTL_S | |
| DPORT_RECORD_PDEBUGINST_CINTL_V | |
| DPORT_RECORD_PDEBUGINST_ISRC_S | |
| DPORT_RECORD_PDEBUGINST_ISRC_V | |
| DPORT_RECORD_PDEBUGINST_SZ_S | |
| DPORT_RECORD_PDEBUGINST_SZ_V | |
| DPORT_RECORD_PDEBUGLS0STAT_SZ_V | |
| DPORT_RECORD_PDEBUGLS0STAT_SZ_S | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_V | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_S | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_V | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_S | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_LD | |
| DPORT_RECORD_PDEBUGLS0STAT_STCOH_V | |
| DPORT_RECORD_PDEBUGLS0STAT_STCOH_S | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_EXT | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_STR | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_CTI | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_NONE | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_RWER | |
| DPORT_RECORD_PDEBUGLS0STAT_STCOH_MOD | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_ITLBR | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_DTLBR | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_RWXSR | |
| DPORT_RECORD_PDEBUGLS0STAT_STCOH_NONE | |
| DPORT_RECORD_PDEBUGLS0STAT_STCOH_EXCL | |
| DPORT_RECORD_PDEBUGLS0STAT_STCOH_SHARED | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_DRAM0 | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_DRAM1 | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_DROM0 | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_DROM1 | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_IRAM0 | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_IRAM1 | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_IROM0 | |
| DPORT_RECORD_PDEBUGLS0STAT_TGT_IROM1 | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_L32R | |
| DPORT_RECORD_PDEBUGLS0STAT_TYPE_S32CLI1 | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_CTL | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_DCM | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_DEP | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_DTLB | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_DTLBM | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_EXC0 | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_EXC1 | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_HWMEC | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_ICM | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_ITLB | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_ITLBM | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_OTHER | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_PSO | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_RPL | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_S | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_STALL | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_V | |
| DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_WAITI | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_B | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_BN | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_CALL | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_CALLX | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_CRET | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_DEF | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_ERET | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_J | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_JX | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_LOOP | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_RWER | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_RWXSR | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_S | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_S32C1I | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_V | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_WSR2MMID | |
| DPORT_RECORD_PDEBUGSTATUS_INSNTYPE_WXSR2LB | |
| DPORT_RECORD_PRO_PDEBUGDATA | |
| DPORT_RECORD_PRO_PDEBUGDATA_S | |
| DPORT_RECORD_PRO_PDEBUGDATA_V | |
| DPORT_RECORD_PRO_PDEBUGINST | |
| DPORT_RECORD_PRO_PDEBUGINST_S | |
| DPORT_RECORD_PRO_PDEBUGINST_V | |
| DPORT_RECORD_PRO_PDEBUGLS0STAT | |
| DPORT_RECORD_PRO_PDEBUGLS0ADDR | |
| DPORT_RECORD_PRO_PDEBUGLS0DATA | |
| DPORT_RECORD_PRO_PDEBUGLS0STAT_V | |
| DPORT_RECORD_PRO_PDEBUGLS0STAT_S | |
| DPORT_RECORD_PRO_PDEBUGLS0ADDR_V | |
| DPORT_RECORD_PRO_PDEBUGLS0ADDR_S | |
| DPORT_RECORD_PRO_PDEBUGLS0DATA_V | |
| DPORT_RECORD_PRO_PDEBUGLS0DATA_S | |
| DPORT_RECORD_PRO_PDEBUGPC | |
| DPORT_RECORD_PRO_PDEBUGPC_S | |
| DPORT_RECORD_PRO_PDEBUGPC_V | |
| DPORT_RECORD_PRO_PDEBUGSTATUS | |
| DPORT_RECORD_PRO_PDEBUGSTATUS_S | |
| DPORT_RECORD_PRO_PDEBUGSTATUS_V | |
| DPORT_RECORD_PRO_PID | |
| DPORT_RECORD_PRO_PID_S | |
| DPORT_RECORD_PRO_PID_V | |
| DPORT_RMT_ACCESS_GRANT_CONFIG | |
| DPORT_RMT_ACCESS_GRANT_CONFIG_S | |
| DPORT_RMT_ACCESS_GRANT_CONFIG_V | |
| DPORT_ROM_FO_CTRL_REG | |
| DPORT_ROM_MPU_ENA_REG | |
| DPORT_ROM_MPU_TABLE0 | |
| DPORT_ROM_MPU_TABLE0_V | |
| DPORT_ROM_MPU_TABLE0_S | |
| DPORT_ROM_MPU_TABLE0_REG | |
| DPORT_ROM_MPU_TABLE1_REG | |
| DPORT_ROM_MPU_TABLE1 | |
| DPORT_ROM_MPU_TABLE1_V | |
| DPORT_ROM_MPU_TABLE1_S | |
| DPORT_ROM_MPU_TABLE2_REG | |
| DPORT_ROM_MPU_TABLE2 | |
| DPORT_ROM_MPU_TABLE2_V | |
| DPORT_ROM_MPU_TABLE2_S | |
| DPORT_ROM_MPU_TABLE3_REG | |
| DPORT_ROM_MPU_TABLE3 | |
| DPORT_ROM_MPU_TABLE3_V | |
| DPORT_ROM_MPU_TABLE3_S | |
| DPORT_ROM_PD_CTRL_REG | |
| DPORT_RSA_PD_CTRL_REG | |
| DPORT_RSA_PD_S | |
| DPORT_RSA_PD_V | |
| DPORT_RTC_ACCESS_GRANT_CONFIG | |
| DPORT_RTC_ACCESS_GRANT_CONFIG_S | |
| DPORT_RTC_ACCESS_GRANT_CONFIG_V | |
| DPORT_RWBT_ACCESS_GRANT_CONFIG | |
| DPORT_RWBT_ACCESS_GRANT_CONFIG_S | |
| DPORT_RWBT_ACCESS_GRANT_CONFIG_V | |
| DPORT_SDIOHOST_ACCESS_GRANT_CONFIG | |
| DPORT_SDIOHOST_ACCESS_GRANT_CONFIG_S | |
| DPORT_SDIOHOST_ACCESS_GRANT_CONFIG_V | |
| DPORT_SECURE_BOOT_CTRL_REG | |
| DPORT_SHARE_ROM_FO | |
| DPORT_SHARE_ROM_FO_S | |
| DPORT_SHARE_ROM_FO_V | |
| DPORT_SHARE_ROM_IA | |
| DPORT_SHARE_ROM_IA_S | |
| DPORT_SHARE_ROM_IA_V | |
| DPORT_SHARE_ROM_MPU_AD | |
| DPORT_SHARE_ROM_MPU_AD_S | |
| DPORT_SHARE_ROM_MPU_AD_V | |
| DPORT_SHARE_ROM_MPU_ENA_S | |
| DPORT_SHARE_ROM_MPU_ENA_V | |
| DPORT_SHARE_ROM_PD | |
| DPORT_SHARE_ROM_PD_S | |
| DPORT_SHARE_ROM_PD_V | |
| DPORT_SHROM_MPU_TABLE0 | |
| DPORT_SHROM_MPU_TABLE0_V | |
| DPORT_SHROM_MPU_TABLE0_S | |
| DPORT_SHROM_MPU_TABLE0_REG | |
| DPORT_SHROM_MPU_TABLE1_REG | |
| DPORT_SHROM_MPU_TABLE1 | |
| DPORT_SHROM_MPU_TABLE1_V | |
| DPORT_SHROM_MPU_TABLE1_S | |
| DPORT_SHROM_MPU_TABLE2_REG | |
| DPORT_SHROM_MPU_TABLE2 | |
| DPORT_SHROM_MPU_TABLE2_V | |
| DPORT_SHROM_MPU_TABLE2_S | |
| DPORT_SHROM_MPU_TABLE3_REG | |
| DPORT_SHROM_MPU_TABLE3 | |
| DPORT_SHROM_MPU_TABLE3_V | |
| DPORT_SHROM_MPU_TABLE3_S | |
| DPORT_SHROM_MPU_TABLE4_REG | |
| DPORT_SHROM_MPU_TABLE4 | |
| DPORT_SHROM_MPU_TABLE4_V | |
| DPORT_SHROM_MPU_TABLE4_S | |
| DPORT_SHROM_MPU_TABLE5_REG | |
| DPORT_SHROM_MPU_TABLE5 | |
| DPORT_SHROM_MPU_TABLE5_V | |
| DPORT_SHROM_MPU_TABLE5_S | |
| DPORT_SHROM_MPU_TABLE6_REG | |
| DPORT_SHROM_MPU_TABLE6 | |
| DPORT_SHROM_MPU_TABLE6_V | |
| DPORT_SHROM_MPU_TABLE6_S | |
| DPORT_SHROM_MPU_TABLE7_REG | |
| DPORT_SHROM_MPU_TABLE7 | |
| DPORT_SHROM_MPU_TABLE7_V | |
| DPORT_SHROM_MPU_TABLE7_S | |
| DPORT_SHROM_MPU_TABLE8_REG | |
| DPORT_SHROM_MPU_TABLE8 | |
| DPORT_SHROM_MPU_TABLE8_V | |
| DPORT_SHROM_MPU_TABLE8_S | |
| DPORT_SHROM_MPU_TABLE9_REG | |
| DPORT_SHROM_MPU_TABLE9 | |
| DPORT_SHROM_MPU_TABLE9_V | |
| DPORT_SHROM_MPU_TABLE9_S | |
| DPORT_SHROM_MPU_TABLE10_REG | |
| DPORT_SHROM_MPU_TABLE10 | |
| DPORT_SHROM_MPU_TABLE10_V | |
| DPORT_SHROM_MPU_TABLE10_S | |
| DPORT_SHROM_MPU_TABLE11_REG | |
| DPORT_SHROM_MPU_TABLE11 | |
| DPORT_SHROM_MPU_TABLE11_V | |
| DPORT_SHROM_MPU_TABLE11_S | |
| DPORT_SHROM_MPU_TABLE12_REG | |
| DPORT_SHROM_MPU_TABLE12 | |
| DPORT_SHROM_MPU_TABLE12_V | |
| DPORT_SHROM_MPU_TABLE12_S | |
| DPORT_SHROM_MPU_TABLE13_REG | |
| DPORT_SHROM_MPU_TABLE13 | |
| DPORT_SHROM_MPU_TABLE13_V | |
| DPORT_SHROM_MPU_TABLE13_S | |
| DPORT_SHROM_MPU_TABLE14_REG | |
| DPORT_SHROM_MPU_TABLE14 | |
| DPORT_SHROM_MPU_TABLE14_V | |
| DPORT_SHROM_MPU_TABLE14_S | |
| DPORT_SHROM_MPU_TABLE15_REG | |
| DPORT_SHROM_MPU_TABLE15 | |
| DPORT_SHROM_MPU_TABLE15_V | |
| DPORT_SHROM_MPU_TABLE15_S | |
| DPORT_SHROM_MPU_TABLE16_REG | |
| DPORT_SHROM_MPU_TABLE16 | |
| DPORT_SHROM_MPU_TABLE16_V | |
| DPORT_SHROM_MPU_TABLE16_S | |
| DPORT_SHROM_MPU_TABLE17_REG | |
| DPORT_SHROM_MPU_TABLE17 | |
| DPORT_SHROM_MPU_TABLE17_V | |
| DPORT_SHROM_MPU_TABLE17_S | |
| DPORT_SHROM_MPU_TABLE18_REG | |
| DPORT_SHROM_MPU_TABLE18 | |
| DPORT_SHROM_MPU_TABLE18_V | |
| DPORT_SHROM_MPU_TABLE18_S | |
| DPORT_SHROM_MPU_TABLE19_REG | |
| DPORT_SHROM_MPU_TABLE19 | |
| DPORT_SHROM_MPU_TABLE19_V | |
| DPORT_SHROM_MPU_TABLE19_S | |
| DPORT_SHROM_MPU_TABLE20_REG | |
| DPORT_SHROM_MPU_TABLE20 | |
| DPORT_SHROM_MPU_TABLE20_V | |
| DPORT_SHROM_MPU_TABLE20_S | |
| DPORT_SHROM_MPU_TABLE21_REG | |
| DPORT_SHROM_MPU_TABLE21 | |
| DPORT_SHROM_MPU_TABLE21_V | |
| DPORT_SHROM_MPU_TABLE21_S | |
| DPORT_SHROM_MPU_TABLE22_REG | |
| DPORT_SHROM_MPU_TABLE22 | |
| DPORT_SHROM_MPU_TABLE22_V | |
| DPORT_SHROM_MPU_TABLE22_S | |
| DPORT_SHROM_MPU_TABLE23_REG | |
| DPORT_SHROM_MPU_TABLE23 | |
| DPORT_SHROM_MPU_TABLE23_V | |
| DPORT_SHROM_MPU_TABLE23_S | |
| DPORT_SLAVE_REQ_S | |
| DPORT_SLAVE_REQ_V | |
| DPORT_SLAVE_SPI_CONFIG_REG | |
| DPORT_SLAVE_SPI_MASK_APP_S | |
| DPORT_SLAVE_SPI_MASK_APP_V | |
| DPORT_SLAVE_SPI_MASK_PRO_S | |
| DPORT_SLAVE_SPI_MASK_PRO_V | |
| DPORT_SLCHOST_ACCESS_GRANT_CONFIG | |
| DPORT_SLCHOST_ACCESS_GRANT_CONFIG_S | |
| DPORT_SLCHOST_ACCESS_GRANT_CONFIG_V | |
| DPORT_SLC_ACCESS_GRANT_CONFIG | |
| DPORT_SLC_ACCESS_GRANT_CONFIG_S | |
| DPORT_SLC_ACCESS_GRANT_CONFIG_V | |
| DPORT_SPI0_ACCESS_GRANT_CONFIG | |
| DPORT_SPI0_ACCESS_GRANT_CONFIG_V | |
| DPORT_SPI0_ACCESS_GRANT_CONFIG_S | |
| DPORT_SPI1_ACCESS_GRANT_CONFIG | |
| DPORT_SPI1_ACCESS_GRANT_CONFIG_V | |
| DPORT_SPI1_ACCESS_GRANT_CONFIG_S | |
| DPORT_SPI1_DMA_CHAN_SEL | |
| DPORT_SPI1_DMA_CHAN_SEL_V | |
| DPORT_SPI1_DMA_CHAN_SEL_S | |
| DPORT_SPI2_ACCESS_GRANT_CONFIG | |
| DPORT_SPI2_ACCESS_GRANT_CONFIG_V | |
| DPORT_SPI2_ACCESS_GRANT_CONFIG_S | |
| DPORT_SPI2_DMA_CHAN_SEL | |
| DPORT_SPI2_DMA_CHAN_SEL_V | |
| DPORT_SPI2_DMA_CHAN_SEL_S | |
| DPORT_SPI3_ACCESS_GRANT_CONFIG | |
| DPORT_SPI3_ACCESS_GRANT_CONFIG_V | |
| DPORT_SPI3_ACCESS_GRANT_CONFIG_S | |
| DPORT_SPI3_DMA_CHAN_SEL | |
| DPORT_SPI3_DMA_CHAN_SEL_V | |
| DPORT_SPI3_DMA_CHAN_SEL_S | |
| DPORT_SPI_DECRYPT_ENABLE_S | |
| DPORT_SPI_DECRYPT_ENABLE_V | |
| DPORT_SPI_DMA_CHAN_SEL_REG | |
| DPORT_SPI_ENCRYPT_ENABLE_S | |
| DPORT_SPI_ENCRYPT_ENABLE_V | |
| DPORT_SPI_ENCRYPY_ACCESS_GRANT_CONFIG | |
| DPORT_SPI_ENCRYPY_ACCESS_GRANT_CONFIG_S | |
| DPORT_SPI_ENCRYPY_ACCESS_GRANT_CONFIG_V | |
| DPORT_SRAM_FO_0 | |
| DPORT_SRAM_FO_0_V | |
| DPORT_SRAM_FO_0_S | |
| DPORT_SRAM_FO_1_V | |
| DPORT_SRAM_FO_1_S | |
| DPORT_SRAM_FO_CTRL_0_REG | |
| DPORT_SRAM_FO_CTRL_1_REG | |
| DPORT_SRAM_PD_0 | |
| DPORT_SRAM_PD_0_V | |
| DPORT_SRAM_PD_0_S | |
| DPORT_SRAM_PD_1_V | |
| DPORT_SRAM_PD_1_S | |
| DPORT_SRAM_PD_CTRL_0_REG | |
| DPORT_SRAM_PD_CTRL_1_REG | |
| DPORT_SW_BOOTLOADER_SEL_S | |
| DPORT_SW_BOOTLOADER_SEL_V | |
| DPORT_TAG_FO_CTRL_REG | |
| DPORT_TIMERGROUP1_ACCESS_GRANT_CONFIG | |
| DPORT_TIMERGROUP1_ACCESS_GRANT_CONFIG_V | |
| DPORT_TIMERGROUP1_ACCESS_GRANT_CONFIG_S | |
| DPORT_TIMERGROUP_ACCESS_GRANT_CONFIG | |
| DPORT_TIMERGROUP_ACCESS_GRANT_CONFIG_S | |
| DPORT_TIMERGROUP_ACCESS_GRANT_CONFIG_V | |
| DPORT_TIMER_ACCESS_GRANT_CONFIG | |
| DPORT_TIMER_ACCESS_GRANT_CONFIG_S | |
| DPORT_TIMER_ACCESS_GRANT_CONFIG_V | |
| DPORT_TRACEMEM_MUX_MODE | |
| DPORT_TRACEMEM_MUX_MODE_REG | |
| DPORT_TRACEMEM_MUX_MODE_S | |
| DPORT_TRACEMEM_MUX_MODE_V | |
| DPORT_UART1_ACCESS_GRANT_CONFIG | |
| DPORT_UART1_ACCESS_GRANT_CONFIG_V | |
| DPORT_UART1_ACCESS_GRANT_CONFIG_S | |
| DPORT_UART2_ACCESS_GRANT_CONFIG | |
| DPORT_UART2_ACCESS_GRANT_CONFIG_V | |
| DPORT_UART2_ACCESS_GRANT_CONFIG_S | |
| DPORT_UART_ACCESS_GRANT_CONFIG | |
| DPORT_UART_ACCESS_GRANT_CONFIG_S | |
| DPORT_UART_ACCESS_GRANT_CONFIG_V | |
| DPORT_UHCI0_ACCESS_GRANT_CONFIG | |
| DPORT_UHCI0_ACCESS_GRANT_CONFIG_V | |
| DPORT_UHCI0_ACCESS_GRANT_CONFIG_S | |
| DPORT_UHCI1_ACCESS_GRANT_CONFIG | |
| DPORT_UHCI1_ACCESS_GRANT_CONFIG_V | |
| DPORT_UHCI1_ACCESS_GRANT_CONFIG_S | |
| DPORT_WDG_ACCESS_GRANT_CONFIG | |
| DPORT_WDG_ACCESS_GRANT_CONFIG_S | |
| DPORT_WDG_ACCESS_GRANT_CONFIG_V | |
| DPORT_WIFIMAC_ACCESS_GRANT_CONFIG | |
| DPORT_WIFIMAC_ACCESS_GRANT_CONFIG_S | |
| DPORT_WIFIMAC_ACCESS_GRANT_CONFIG_V | |
| DPORT_WIFI_BB_CFG | |
| DPORT_WIFI_BB_CFG_2_REG | |
| DPORT_WIFI_BB_CFG_2 | |
| DPORT_WIFI_BB_CFG_2_V | |
| DPORT_WIFI_BB_CFG_2_S | |
| DPORT_WIFI_BB_CFG_REG | |
| DPORT_WIFI_BB_CFG_S | |
| DPORT_WIFI_BB_CFG_V | |
| DPORT_WIFI_CLK_BT_EN | |
| DPORT_WIFI_CLK_BT_EN_S | |
| DPORT_WIFI_CLK_BT_EN_V | |
| DPORT_WIFI_CLK_EN | |
| DPORT_WIFI_CLK_EN_REG | |
| DPORT_WIFI_CLK_EN_S | |
| DPORT_WIFI_CLK_EN_V | |
| DPORT_WIFI_CLK_WIFI_BT_COMMON_M | |
| DPORT_WIFI_CLK_WIFI_EN | |
| DPORT_WIFI_CLK_WIFI_EN_S | |
| DPORT_WIFI_CLK_WIFI_EN_V | |
| DR_REG_AES_BASE | |
| DR_REG_APB_CTRL_BASE | |
| DR_REG_BB_BASE | |
| DR_REG_BT_BASE | |
| DR_REG_CAN_BASE | |
| DR_REG_DPORT_BASE | |
| DR_REG_DPORT_END | |
| DR_REG_EFUSE_BASE | |
| DR_REG_EMAC_BASE | |
| DR_REG_FE2_BASE | |
| DR_REG_FE_BASE | |
| DR_REG_FLASH_MMU_TABLE_APP | |
| DR_REG_FLASH_MMU_TABLE_PRO | |
| DR_REG_FRC_TIMER_BASE | |
| DR_REG_GPIO_BASE | |
| DR_REG_GPIO_SD_BASE | |
| DR_REG_HINF_BASE | |
| DR_REG_I2S_BASE | |
| DR_REG_I2C_EXT_BASE | |
| DR_REG_I2C1_EXT_BASE | |
| DR_REG_I2S1_BASE | |
| DR_REG_IO_MUX_BASE | |
| DR_REG_LEDC_BASE | |
| DR_REG_NRX_BASE | |
| DR_REG_PCNT_BASE | |
| DR_REG_PWM1_BASE | |
| DR_REG_PWM2_BASE | |
| DR_REG_PWM3_BASE | |
| DR_REG_PWM_BASE | |
| DR_REG_RMT_BASE | |
| DR_REG_RSA_BASE | |
| DR_REG_RTCCNTL_BASE | |
| DR_REG_RTCIO_BASE | |
| DR_REG_RTCMEM0_BASE | |
| DR_REG_RTCMEM1_BASE | |
| DR_REG_RTCMEM2_BASE | |
| DR_REG_RTC_I2C_BASE | |
| DR_REG_SDMMC_BASE | |
| DR_REG_SENS_BASE | |
| DR_REG_SHA_BASE | |
| DR_REG_SLCHOST_BASE | |
| DR_REG_SLC_BASE | |
| DR_REG_SPI0_BASE | |
| DR_REG_SPI1_BASE | |
| DR_REG_SPI2_BASE | |
| DR_REG_SPI3_BASE | |
| DR_REG_SPI_ENCRYPT_BASE | |
| DR_REG_SYSCON_BASE | |
| DR_REG_TIMERGROUP0_BASE | |
| DR_REG_TIMERGROUP1_BASE | |
| DR_REG_UART1_BASE | |
| DR_REG_UART2_BASE | |
| DR_REG_UART_BASE | |
| DR_REG_UHCI0_BASE | |
| DR_REG_UHCI1_BASE | |
| EMAC_COL_I_IDX | |
| EMAC_COL_O_IDX | |
| EMAC_CRS_I_IDX | |
| EMAC_CRS_O_IDX | |
| EMAC_MDC_I_IDX | |
| EMAC_MDC_O_IDX | |
| EMAC_MDI_I_IDX | |
| EMAC_MDO_O_IDX | |
| EOF | |
| EPC | |
| EPC_1 | |
| EPC_2 | |
| EPC_3 | |
| EPC_4 | |
| EPC_5 | |
| EPC_6 | |
| EPC_7 | |
| EPS | |
| EPS_2 | |
| EPS_3 | |
| EPS_4 | |
| EPS_5 | |
| EPS_6 | |
| EPS_7 | |
| ESP_ERR_INVALID_ARG | |
| ESP_ERR_INVALID_CRC | |
| ESP_ERR_INVALID_MAC | |
| ESP_ERR_INVALID_RESPONSE | |
| ESP_ERR_INVALID_SIZE | |
| ESP_ERR_INVALID_STATE | |
| ESP_ERR_INVALID_VERSION | |
| ESP_ERR_MESH_BASE | |
| ESP_ERR_NOT_FOUND | |
| ESP_ERR_NOT_SUPPORTED | |
| ESP_ERR_NO_MEM | |
| ESP_ERR_TIMEOUT | |
| ESP_ERR_WIFI_BASE | |
| ESP_FAIL | |
| ESP_INTR_FLAG_EDGE | |
| ESP_INTR_FLAG_HIGH | |
| ESP_INTR_FLAG_INTRDISABLED | |
| ESP_INTR_FLAG_IRAM | |
| ESP_INTR_FLAG_LEVEL1 | |
| ESP_INTR_FLAG_LEVEL2 | |
| ESP_INTR_FLAG_LEVEL3 | |
| ESP_INTR_FLAG_LEVEL4 | |
| ESP_INTR_FLAG_LEVEL5 | |
| ESP_INTR_FLAG_LEVEL6 | |
| ESP_INTR_FLAG_LEVELMASK | |
| ESP_INTR_FLAG_LOWMED | |
| ESP_INTR_FLAG_NMI | |
| ESP_INTR_FLAG_SHARED | |
| ESP_OK | |
| ETS_BT_BB_INTR_SOURCE | |
| ETS_BT_BB_NMI_SOURCE | |
| ETS_BT_HOST_INUM | |
| ETS_BT_MAC_INTR_SOURCE | |
| ETS_CACHEERR_INUM | |
| ETS_CACHE_IA_INTR_SOURCE | |
| ETS_CAN_INTR_SOURCE | |
| ETS_DPORT_INUM | |
| ETS_EFUSE_INTR_SOURCE | |
| ETS_ETH_MAC_INTR_SOURCE | |
| ETS_FRC1_INUM | |
| ETS_FROM_CPU_INTR0_SOURCE | |
| ETS_FROM_CPU_INTR1_SOURCE | |
| ETS_FROM_CPU_INTR2_SOURCE | |
| ETS_FROM_CPU_INTR3_SOURCE | |
| ETS_GPIO_INTR_SOURCE | |
| ETS_GPIO_NMI_SOURCE | |
| ETS_I2C_EXT0_INTR_SOURCE | |
| ETS_I2C_EXT1_INTR_SOURCE | |
| ETS_I2S0_INTR_SOURCE | |
| ETS_I2S1_INTR_SOURCE | |
| ETS_INTERNAL_INTR_SOURCE_OFF | |
| ETS_INTERNAL_PROFILING_INTR_SOURCE | |
| ETS_INTERNAL_SW0_INTR_SOURCE | |
| ETS_INTERNAL_SW1_INTR_SOURCE | |
| ETS_INTERNAL_TIMER0_INTR_SOURCE | |
| ETS_INTERNAL_TIMER1_INTR_SOURCE | |
| ETS_INTERNAL_TIMER2_INTR_SOURCE | |
| ETS_INVALID_INUM | |
| ETS_LEDC_INTR_SOURCE | |
| ETS_MMU_IA_INTR_SOURCE | |
| ETS_MPU_IA_INTR_SOURCE | |
| ETS_PCNT_INTR_SOURCE | |
| ETS_PWM0_INTR_SOURCE | |
| ETS_PWM1_INTR_SOURCE | |
| ETS_PWM2_INTR_SOURCE | |
| ETS_PWM3_INTR_SOURCE | |
| ETS_RMT_INTR_SOURCE | |
| ETS_RSA_INTR_SOURCE | |
| ETS_RTC_CORE_INTR_SOURCE | |
| ETS_RWBLE_INTR_SOURCE | |
| ETS_RWBLE_NMI_SOURCE | |
| ETS_RWBT_INTR_SOURCE | |
| ETS_RWBT_NMI_SOURCE | |
| ETS_SDIO_HOST_INTR_SOURCE | |
| ETS_SLC0_INTR_SOURCE | |
| ETS_SLC1_INTR_SOURCE | |
| ETS_SLC_INUM | |
| ETS_SPI0_INTR_SOURCE | |
| ETS_SPI1_INTR_SOURCE | |
| ETS_SPI1_DMA_INTR_SOURCE | |
| ETS_SPI2_INTR_SOURCE | |
| ETS_SPI2_DMA_INTR_SOURCE | |
| ETS_SPI3_INTR_SOURCE | |
| ETS_SPI3_DMA_INTR_SOURCE | |
| ETS_STATUS_ETS_FAILED | < return failed in ets
|
| ETS_STATUS_ETS_OK | < return successful in ets
|
| ETS_T1_WDT_INUM | |
| ETS_TG0_WDT_EDGE_INTR_SOURCE | |
| ETS_TG0_WDT_LEVEL_INTR_SOURCE | |
| ETS_TG0_LACT_EDGE_INTR_SOURCE | |
| ETS_TG0_LACT_LEVEL_INTR_SOURCE | |
| ETS_TG1_WDT_LEVEL_INTR_SOURCE | |
| ETS_TG1_LACT_LEVEL_INTR_SOURCE | |
| ETS_TG1_WDT_EDGE_INTR_SOURCE | |
| ETS_TG1_LACT_EDGE_INTR_SOURCE | |
| ETS_TG0_T0_EDGE_INTR_SOURCE | |
| ETS_TG0_T0_LEVEL_INTR_SOURCE | |
| ETS_TG0_T1_LEVEL_INTR_SOURCE | |
| ETS_TG0_T1_EDGE_INTR_SOURCE | |
| ETS_TG0_T1_INUM | |
| ETS_TG1_T0_EDGE_INTR_SOURCE | |
| ETS_TG1_T0_LEVEL_INTR_SOURCE | |
| ETS_TG1_T1_LEVEL_INTR_SOURCE | |
| ETS_TG1_T1_EDGE_INTR_SOURCE | |
| ETS_TIMER1_INTR_SOURCE | |
| ETS_TIMER2_INTR_SOURCE | |
| ETS_UART0_INUM | |
| ETS_UART0_INTR_SOURCE | |
| ETS_UART1_INTR_SOURCE | |
| ETS_UART1_INUM | |
| ETS_UART2_INTR_SOURCE | |
| ETS_UHCI0_INTR_SOURCE | |
| ETS_UHCI1_INTR_SOURCE | |
| ETS_WBB_INUM | |
| ETS_WDT_INTR_SOURCE | |
| ETS_WIFI_BB_INTR_SOURCE | |
| ETS_WIFI_MAC_INTR_SOURCE | |
| ETS_WIFI_MAC_NMI_SOURCE | |
| ETS_WMAC_INUM | |
| EXCCAUSE | |
| EXCCAUSE_ALLOCA | |
| EXCCAUSE_CP0_DISABLED | |
| EXCCAUSE_CP1_DISABLED | |
| EXCCAUSE_CP2_DISABLED | |
| EXCCAUSE_CP3_DISABLED | |
| EXCCAUSE_CP4_DISABLED | |
| EXCCAUSE_CP5_DISABLED | |
| EXCCAUSE_CP6_DISABLED | |
| EXCCAUSE_CP7_DISABLED | |
| EXCCAUSE_DIVIDE_BY_ZERO | |
| EXCCAUSE_DTLB_MISS | |
| EXCCAUSE_DTLB_MULTIHIT | |
| EXCCAUSE_EXCCAUSE_MASK | |
| EXCCAUSE_EXCCAUSE_SHIFT | |
| EXCCAUSE_IFETCHERROR | |
| EXCCAUSE_ILLEGAL | |
| EXCCAUSE_INSTR_ADDR_ERROR | |
| EXCCAUSE_INSTR_DATA_ERROR | |
| EXCCAUSE_INSTR_ERROR | |
| EXCCAUSE_INSTR_PROHIBITED | |
| EXCCAUSE_INSTR_RING | |
| EXCCAUSE_ITLB_MISS | |
| EXCCAUSE_ITLB_MULTIHIT | |
| EXCCAUSE_LEVEL1_INTERRUPT | |
| EXCCAUSE_LEVEL1INTERRUPT | |
| EXCCAUSE_LOADSTOREERROR | |
| EXCCAUSE_LOAD_PROHIBITED | |
| EXCCAUSE_LOAD_STORE_ADDR_ERROR | |
| EXCCAUSE_LOAD_STORE_DATA_ERROR | |
| EXCCAUSE_LOAD_STORE_ERROR | |
| EXCCAUSE_LOAD_STORE_RING | |
| EXCCAUSE_PRIVILEGED | |
| EXCCAUSE_SPECULATION | |
| EXCCAUSE_STORE_PROHIBITED | |
| EXCCAUSE_SYSCALL | |
| EXCCAUSE_UNALIGNED | |
| EXCSAVE | |
| EXCSAVE_1 | |
| EXCSAVE_2 | |
| EXCSAVE_3 | |
| EXCSAVE_4 | |
| EXCSAVE_5 | |
| EXCSAVE_6 | |
| EXCSAVE_7 | |
| EXCVADDR | |
| EXIT_FAILURE | |
| EXIT_SUCCESS | |
| EXT_ADC_START_IDX | |
| EXT_I2C_SCL_O_IDX | |
| EXT_I2C_SDA_O_IDX | |
| EXT_I2C_SDA_I_IDX | |
| FD_SETSIZE | |
| FILENAME_MAX | |
| FOPEN_MAX | |
| FOUR_UNIVERSAL_MAC_ADDR | |
| FUNC_GPIO0_EMAC_TX_CLK | |
| FUNC_GPIO2_HSPIWP | |
| FUNC_GPIO4_EMAC_TX_ER | |
| FUNC_GPIO4_HSPIHD | |
| FUNC_GPIO5_EMAC_RX_CLK | |
| FUNC_GPIO16_EMAC_CLK_OUT | |
| FUNC_GPIO18_VSPICLK | |
| FUNC_GPIO19_VSPIQ | |
| FUNC_GPIO21_EMAC_TX_EN | |
| FUNC_GPIO21_VSPIHD | |
| FUNC_GPIO22_VSPIWP | |
| FUNC_GPIO23_VSPID | |
| FUNC_GPIO27_EMAC_RX_DV | |
| FUNC_GPIO0_CLK_OUT1 | |
| FUNC_GPIO0_GPIO0 | |
| FUNC_GPIO0_GPIO0_0 | |
| FUNC_GPIO16_GPIO16 | |
| FUNC_GPIO16_GPIO16_0 | |
| FUNC_GPIO16_HS1_DATA4 | |
| FUNC_GPIO16_U2RXD | |
| FUNC_GPIO17_EMAC_CLK_OUT_180 | |
| FUNC_GPIO17_GPIO17 | |
| FUNC_GPIO17_GPIO17_0 | |
| FUNC_GPIO17_HS1_DATA5 | |
| FUNC_GPIO17_U2TXD | |
| FUNC_GPIO18_GPIO18 | |
| FUNC_GPIO18_GPIO18_0 | |
| FUNC_GPIO18_HS1_DATA7 | |
| FUNC_GPIO19_EMAC_TXD0 | |
| FUNC_GPIO19_GPIO19 | |
| FUNC_GPIO19_GPIO19_0 | |
| FUNC_GPIO19_U0CTS | |
| FUNC_GPIO20_GPIO20 | |
| FUNC_GPIO20_GPIO20_0 | |
| FUNC_GPIO21_GPIO21 | |
| FUNC_GPIO21_GPIO21_0 | |
| FUNC_GPIO22_EMAC_TXD1 | |
| FUNC_GPIO22_GPIO22 | |
| FUNC_GPIO22_GPIO22_0 | |
| FUNC_GPIO22_U0RTS | |
| FUNC_GPIO23_GPIO23 | |
| FUNC_GPIO23_GPIO23_0 | |
| FUNC_GPIO23_HS1_STROBE | |
| FUNC_GPIO24_GPIO24 | |
| FUNC_GPIO24_GPIO24_0 | |
| FUNC_GPIO25_EMAC_RXD0 | |
| FUNC_GPIO25_GPIO25 | |
| FUNC_GPIO25_GPIO25_0 | |
| FUNC_GPIO26_EMAC_RXD1 | |
| FUNC_GPIO26_GPIO26 | |
| FUNC_GPIO26_GPIO26_0 | |
| FUNC_GPIO27_GPIO27 | |
| FUNC_GPIO27_GPIO27_0 | |
| FUNC_GPIO2_GPIO2 | |
| FUNC_GPIO2_GPIO2_0 | |
| FUNC_GPIO2_HS2_DATA0 | |
| FUNC_GPIO2_SD_DATA0 | |
| FUNC_GPIO32_GPIO32 | |
| FUNC_GPIO32_GPIO32_0 | |
| FUNC_GPIO33_GPIO33 | |
| FUNC_GPIO33_GPIO33_0 | |
| FUNC_GPIO34_GPIO34 | |
| FUNC_GPIO34_GPIO34_0 | |
| FUNC_GPIO35_GPIO35 | |
| FUNC_GPIO35_GPIO35_0 | |
| FUNC_GPIO36_GPIO36 | |
| FUNC_GPIO36_GPIO36_0 | |
| FUNC_GPIO37_GPIO37 | |
| FUNC_GPIO37_GPIO37_0 | |
| FUNC_GPIO38_GPIO38 | |
| FUNC_GPIO38_GPIO38_0 | |
| FUNC_GPIO39_GPIO39 | |
| FUNC_GPIO39_GPIO39_0 | |
| FUNC_GPIO4_GPIO4 | |
| FUNC_GPIO4_GPIO4_0 | |
| FUNC_GPIO4_HS2_DATA1 | |
| FUNC_GPIO4_SD_DATA1 | |
| FUNC_GPIO5_GPIO5 | |
| FUNC_GPIO5_GPIO5_0 | |
| FUNC_GPIO5_HS1_DATA6 | |
| FUNC_GPIO5_VSPICS0 | |
| FUNC_MTCK_EMAC_RX_ER | |
| FUNC_MTCK_GPIO13 | |
| FUNC_MTCK_HS2_DATA3 | |
| FUNC_MTCK_HSPID | |
| FUNC_MTCK_MTCK | |
| FUNC_MTCK_SD_DATA3 | |
| FUNC_MTDI_EMAC_TXD3 | |
| FUNC_MTDI_GPIO12 | |
| FUNC_MTDI_HS2_DATA2 | |
| FUNC_MTDI_HSPIQ | |
| FUNC_MTDI_MTDI | |
| FUNC_MTDI_SD_DATA2 | |
| FUNC_MTDO_EMAC_RXD3 | |
| FUNC_MTDO_GPIO15 | |
| FUNC_MTDO_HS2_CMD | |
| FUNC_MTDO_HSPICS0 | |
| FUNC_MTDO_MTDO | |
| FUNC_MTDO_SD_CMD | |
| FUNC_MTMS_EMAC_TXD2 | |
| FUNC_MTMS_GPIO14 | |
| FUNC_MTMS_HS2_CLK | |
| FUNC_MTMS_HSPICLK | |
| FUNC_MTMS_MTMS | |
| FUNC_MTMS_SD_CLK | |
| FUNC_SD_CLK_GPIO6 | |
| FUNC_SD_CLK_HS1_CLK | |
| FUNC_SD_CLK_SD_CLK | |
| FUNC_SD_CLK_SPICLK | |
| FUNC_SD_CLK_U1CTS | |
| FUNC_SD_CMD_GPIO11 | |
| FUNC_SD_CMD_HS1_CMD | |
| FUNC_SD_CMD_SD_CMD | |
| FUNC_SD_CMD_SPICS0 | |
| FUNC_SD_CMD_U1RTS | |
| FUNC_SD_DATA0_SPIQ | |
| FUNC_SD_DATA1_SPID | |
| FUNC_SD_DATA2_SPIHD | |
| FUNC_SD_DATA3_SPIWP | |
| FUNC_SD_DATA0_GPIO7 | |
| FUNC_SD_DATA0_HS1_DATA0 | |
| FUNC_SD_DATA0_SD_DATA0 | |
| FUNC_SD_DATA0_U2RTS | |
| FUNC_SD_DATA1_GPIO8 | |
| FUNC_SD_DATA1_HS1_DATA1 | |
| FUNC_SD_DATA1_SD_DATA1 | |
| FUNC_SD_DATA1_U2CTS | |
| FUNC_SD_DATA2_GPIO9 | |
| FUNC_SD_DATA2_HS1_DATA2 | |
| FUNC_SD_DATA2_SD_DATA2 | |
| FUNC_SD_DATA2_U1RXD | |
| FUNC_SD_DATA3_GPIO10 | |
| FUNC_SD_DATA3_HS1_DATA3 | |
| FUNC_SD_DATA3_SD_DATA3 | |
| FUNC_SD_DATA3_U1TXD | |
| FUNC_U0RXD_CLK_OUT2 | |
| FUNC_U0RXD_GPIO3 | |
| FUNC_U0RXD_U0RXD | |
| FUNC_U0TXD_CLK_OUT3 | |
| FUNC_U0TXD_EMAC_RXD2 | |
| FUNC_U0TXD_GPIO1 | |
| FUNC_U0TXD_U0TXD | |
| FUN_DRV | |
| FUN_DRV_S | |
| FUN_DRV_V | |
| FUN_IE_S | |
| FUN_IE_V | |
| FUN_PD_S | |
| FUN_PD_V | |
| FUN_PU_S | |
| FUN_PU_V | |
| GPIO_ACPU_INT1_REG | |
| GPIO_ACPU_INT_REG | |
| GPIO_ACPU_NMI_INT1_REG | |
| GPIO_ACPU_NMI_INT_REG | |
| GPIO_APPCPU_INT | |
| GPIO_APPCPU_INT_H | |
| GPIO_APPCPU_INT_H_S | |
| GPIO_APPCPU_INT_H_V | |
| GPIO_APPCPU_INT_S | |
| GPIO_APPCPU_INT_V | |
| GPIO_APPCPU_NMI_INT | |
| GPIO_APPCPU_NMI_INT_H | |
| GPIO_APPCPU_NMI_INT_H_S | |
| GPIO_APPCPU_NMI_INT_H_V | |
| GPIO_APPCPU_NMI_INT_S | |
| GPIO_APPCPU_NMI_INT_V | |
| GPIO_BT_ACTIVE_IDX | |
| GPIO_BT_PRIORITY_IDX | |
| GPIO_BT_SEL | |
| GPIO_BT_SELECT_REG | |
| GPIO_BT_SEL_S | |
| GPIO_BT_SEL_V | |
| GPIO_CALI_RDY_REAL_S | |
| GPIO_CALI_RDY_REAL_V | |
| GPIO_CALI_RDY_SYNC2_V | |
| GPIO_CALI_RDY_SYNC2_S | |
| GPIO_CALI_RTC_MAX | |
| GPIO_CALI_RTC_MAX_S | |
| GPIO_CALI_RTC_MAX_V | |
| GPIO_CALI_START_S | |
| GPIO_CALI_START_V | |
| GPIO_CALI_VALUE_SYNC2 | |
| GPIO_CALI_VALUE_SYNC2_V | |
| GPIO_CALI_VALUE_SYNC2_S | |
| GPIO_CPUSDIO_INT1_REG | |
| GPIO_CPUSDIO_INT_REG | |
| GPIO_ENABLE1_REG | |
| GPIO_ENABLE1_DATA | |
| GPIO_ENABLE1_DATA_V | |
| GPIO_ENABLE1_DATA_S | |
| GPIO_ENABLE1_DATA_W1TS | |
| GPIO_ENABLE1_DATA_W1TS_V | |
| GPIO_ENABLE1_DATA_W1TS_S | |
| GPIO_ENABLE1_DATA_W1TC | |
| GPIO_ENABLE1_DATA_W1TC_V | |
| GPIO_ENABLE1_DATA_W1TC_S | |
| GPIO_ENABLE1_W1TS_REG | |
| GPIO_ENABLE1_W1TC_REG | |
| GPIO_ENABLE_DATA | |
| GPIO_ENABLE_DATA_S | |
| GPIO_ENABLE_DATA_V | |
| GPIO_ENABLE_DATA_W1TS | |
| GPIO_ENABLE_DATA_W1TS_V | |
| GPIO_ENABLE_DATA_W1TS_S | |
| GPIO_ENABLE_DATA_W1TC | |
| GPIO_ENABLE_DATA_W1TC_V | |
| GPIO_ENABLE_DATA_W1TC_S | |
| GPIO_ENABLE_REG | |
| GPIO_ENABLE_W1TS_REG | |
| GPIO_ENABLE_W1TC_REG | |
| GPIO_FUNC0_IN_SEL | |
| GPIO_FUNC0_OUT_SEL | |
| GPIO_FUNC0_IN_SEL_V | |
| GPIO_FUNC0_IN_SEL_S | |
| GPIO_FUNC0_OEN_SEL_V | |
| GPIO_FUNC0_OEN_SEL_S | |
| GPIO_FUNC0_OUT_SEL_V | |
| GPIO_FUNC0_OUT_SEL_S | |
| GPIO_FUNC0_IN_INV_SEL_V | |
| GPIO_FUNC0_IN_INV_SEL_S | |
| GPIO_FUNC0_OEN_INV_SEL_V | |
| GPIO_FUNC0_OEN_INV_SEL_S | |
| GPIO_FUNC0_OUT_INV_SEL_V | |
| GPIO_FUNC0_OUT_INV_SEL_S | |
| GPIO_FUNC0_IN_SEL_CFG_REG | |
| GPIO_FUNC0_OUT_SEL_CFG_REG | |
| GPIO_FUNC1_IN_SEL_CFG_REG | |
| GPIO_FUNC1_IN_INV_SEL_V | |
| GPIO_FUNC1_IN_INV_SEL_S | |
| GPIO_FUNC1_IN_SEL | |
| GPIO_FUNC1_IN_SEL_V | |
| GPIO_FUNC1_IN_SEL_S | |
| GPIO_FUNC1_OUT_SEL_CFG_REG | |
| GPIO_FUNC1_OEN_INV_SEL_V | |
| GPIO_FUNC1_OEN_INV_SEL_S | |
| GPIO_FUNC1_OEN_SEL_V | |
| GPIO_FUNC1_OEN_SEL_S | |
| GPIO_FUNC1_OUT_INV_SEL_V | |
| GPIO_FUNC1_OUT_INV_SEL_S | |
| GPIO_FUNC1_OUT_SEL | |
| GPIO_FUNC1_OUT_SEL_V | |
| GPIO_FUNC1_OUT_SEL_S | |
| GPIO_FUNC2_IN_SEL_CFG_REG | |
| GPIO_FUNC2_IN_INV_SEL_V | |
| GPIO_FUNC2_IN_INV_SEL_S | |
| GPIO_FUNC2_IN_SEL | |
| GPIO_FUNC2_IN_SEL_V | |
| GPIO_FUNC2_IN_SEL_S | |
| GPIO_FUNC2_OUT_SEL_CFG_REG | |
| GPIO_FUNC2_OEN_INV_SEL_V | |
| GPIO_FUNC2_OEN_INV_SEL_S | |
| GPIO_FUNC2_OEN_SEL_V | |
| GPIO_FUNC2_OEN_SEL_S | |
| GPIO_FUNC2_OUT_INV_SEL_V | |
| GPIO_FUNC2_OUT_INV_SEL_S | |
| GPIO_FUNC2_OUT_SEL | |
| GPIO_FUNC2_OUT_SEL_V | |
| GPIO_FUNC2_OUT_SEL_S | |
| GPIO_FUNC3_IN_SEL_CFG_REG | |
| GPIO_FUNC3_IN_INV_SEL_V | |
| GPIO_FUNC3_IN_INV_SEL_S | |
| GPIO_FUNC3_IN_SEL | |
| GPIO_FUNC3_IN_SEL_V | |
| GPIO_FUNC3_IN_SEL_S | |
| GPIO_FUNC3_OUT_SEL_CFG_REG | |
| GPIO_FUNC3_OEN_INV_SEL_V | |
| GPIO_FUNC3_OEN_INV_SEL_S | |
| GPIO_FUNC3_OEN_SEL_V | |
| GPIO_FUNC3_OEN_SEL_S | |
| GPIO_FUNC3_OUT_INV_SEL_V | |
| GPIO_FUNC3_OUT_INV_SEL_S | |
| GPIO_FUNC3_OUT_SEL | |
| GPIO_FUNC3_OUT_SEL_V | |
| GPIO_FUNC3_OUT_SEL_S | |
| GPIO_FUNC4_IN_SEL_CFG_REG | |
| GPIO_FUNC4_IN_INV_SEL_V | |
| GPIO_FUNC4_IN_INV_SEL_S | |
| GPIO_FUNC4_IN_SEL | |
| GPIO_FUNC4_IN_SEL_V | |
| GPIO_FUNC4_IN_SEL_S | |
| GPIO_FUNC4_OUT_SEL_CFG_REG | |
| GPIO_FUNC4_OEN_INV_SEL_V | |
| GPIO_FUNC4_OEN_INV_SEL_S | |
| GPIO_FUNC4_OEN_SEL_V | |
| GPIO_FUNC4_OEN_SEL_S | |
| GPIO_FUNC4_OUT_INV_SEL_V | |
| GPIO_FUNC4_OUT_INV_SEL_S | |
| GPIO_FUNC4_OUT_SEL | |
| GPIO_FUNC4_OUT_SEL_V | |
| GPIO_FUNC4_OUT_SEL_S | |
| GPIO_FUNC5_IN_SEL_CFG_REG | |
| GPIO_FUNC5_IN_INV_SEL_V | |
| GPIO_FUNC5_IN_INV_SEL_S | |
| GPIO_FUNC5_IN_SEL | |
| GPIO_FUNC5_IN_SEL_V | |
| GPIO_FUNC5_IN_SEL_S | |
| GPIO_FUNC5_OUT_SEL_CFG_REG | |
| GPIO_FUNC5_OEN_INV_SEL_V | |
| GPIO_FUNC5_OEN_INV_SEL_S | |
| GPIO_FUNC5_OEN_SEL_V | |
| GPIO_FUNC5_OEN_SEL_S | |
| GPIO_FUNC5_OUT_INV_SEL_V | |
| GPIO_FUNC5_OUT_INV_SEL_S | |
| GPIO_FUNC5_OUT_SEL | |
| GPIO_FUNC5_OUT_SEL_V | |
| GPIO_FUNC5_OUT_SEL_S | |
| GPIO_FUNC6_IN_SEL_CFG_REG | |
| GPIO_FUNC6_IN_INV_SEL_V | |
| GPIO_FUNC6_IN_INV_SEL_S | |
| GPIO_FUNC6_IN_SEL | |
| GPIO_FUNC6_IN_SEL_V | |
| GPIO_FUNC6_IN_SEL_S | |
| GPIO_FUNC6_OUT_SEL_CFG_REG | |
| GPIO_FUNC6_OEN_INV_SEL_V | |
| GPIO_FUNC6_OEN_INV_SEL_S | |
| GPIO_FUNC6_OEN_SEL_V | |
| GPIO_FUNC6_OEN_SEL_S | |
| GPIO_FUNC6_OUT_INV_SEL_V | |
| GPIO_FUNC6_OUT_INV_SEL_S | |
| GPIO_FUNC6_OUT_SEL | |
| GPIO_FUNC6_OUT_SEL_V | |
| GPIO_FUNC6_OUT_SEL_S | |
| GPIO_FUNC7_IN_SEL_CFG_REG | |
| GPIO_FUNC7_IN_INV_SEL_V | |
| GPIO_FUNC7_IN_INV_SEL_S | |
| GPIO_FUNC7_IN_SEL | |
| GPIO_FUNC7_IN_SEL_V | |
| GPIO_FUNC7_IN_SEL_S | |
| GPIO_FUNC7_OUT_SEL_CFG_REG | |
| GPIO_FUNC7_OEN_INV_SEL_V | |
| GPIO_FUNC7_OEN_INV_SEL_S | |
| GPIO_FUNC7_OEN_SEL_V | |
| GPIO_FUNC7_OEN_SEL_S | |
| GPIO_FUNC7_OUT_INV_SEL_V | |
| GPIO_FUNC7_OUT_INV_SEL_S | |
| GPIO_FUNC7_OUT_SEL | |
| GPIO_FUNC7_OUT_SEL_V | |
| GPIO_FUNC7_OUT_SEL_S | |
| GPIO_FUNC8_IN_SEL_CFG_REG | |
| GPIO_FUNC8_IN_INV_SEL_V | |
| GPIO_FUNC8_IN_INV_SEL_S | |
| GPIO_FUNC8_IN_SEL | |
| GPIO_FUNC8_IN_SEL_V | |
| GPIO_FUNC8_IN_SEL_S | |
| GPIO_FUNC8_OUT_SEL_CFG_REG | |
| GPIO_FUNC8_OEN_INV_SEL_V | |
| GPIO_FUNC8_OEN_INV_SEL_S | |
| GPIO_FUNC8_OEN_SEL_V | |
| GPIO_FUNC8_OEN_SEL_S | |
| GPIO_FUNC8_OUT_INV_SEL_V | |
| GPIO_FUNC8_OUT_INV_SEL_S | |
| GPIO_FUNC8_OUT_SEL | |
| GPIO_FUNC8_OUT_SEL_V | |
| GPIO_FUNC8_OUT_SEL_S | |
| GPIO_FUNC9_IN_SEL_CFG_REG | |
| GPIO_FUNC9_IN_INV_SEL_V | |
| GPIO_FUNC9_IN_INV_SEL_S | |
| GPIO_FUNC9_IN_SEL | |
| GPIO_FUNC9_IN_SEL_V | |
| GPIO_FUNC9_IN_SEL_S | |
| GPIO_FUNC9_OUT_SEL_CFG_REG | |
| GPIO_FUNC9_OEN_INV_SEL_V | |
| GPIO_FUNC9_OEN_INV_SEL_S | |
| GPIO_FUNC9_OEN_SEL_V | |
| GPIO_FUNC9_OEN_SEL_S | |
| GPIO_FUNC9_OUT_INV_SEL_V | |
| GPIO_FUNC9_OUT_INV_SEL_S | |
| GPIO_FUNC9_OUT_SEL | |
| GPIO_FUNC9_OUT_SEL_V | |
| GPIO_FUNC9_OUT_SEL_S | |
| GPIO_FUNC10_IN_SEL_CFG_REG | |
| GPIO_FUNC10_IN_INV_SEL_V | |
| GPIO_FUNC10_IN_INV_SEL_S | |
| GPIO_FUNC10_IN_SEL | |
| GPIO_FUNC10_IN_SEL_V | |
| GPIO_FUNC10_IN_SEL_S | |
| GPIO_FUNC10_OUT_SEL_CFG_REG | |
| GPIO_FUNC10_OEN_INV_SEL_V | |
| GPIO_FUNC10_OEN_INV_SEL_S | |
| GPIO_FUNC10_OEN_SEL_V | |
| GPIO_FUNC10_OEN_SEL_S | |
| GPIO_FUNC10_OUT_INV_SEL_V | |
| GPIO_FUNC10_OUT_INV_SEL_S | |
| GPIO_FUNC10_OUT_SEL | |
| GPIO_FUNC10_OUT_SEL_V | |
| GPIO_FUNC10_OUT_SEL_S | |
| GPIO_FUNC11_IN_SEL_CFG_REG | |
| GPIO_FUNC11_IN_INV_SEL_V | |
| GPIO_FUNC11_IN_INV_SEL_S | |
| GPIO_FUNC11_IN_SEL | |
| GPIO_FUNC11_IN_SEL_V | |
| GPIO_FUNC11_IN_SEL_S | |
| GPIO_FUNC11_OUT_SEL_CFG_REG | |
| GPIO_FUNC11_OEN_INV_SEL_V | |
| GPIO_FUNC11_OEN_INV_SEL_S | |
| GPIO_FUNC11_OEN_SEL_V | |
| GPIO_FUNC11_OEN_SEL_S | |
| GPIO_FUNC11_OUT_INV_SEL_V | |
| GPIO_FUNC11_OUT_INV_SEL_S | |
| GPIO_FUNC11_OUT_SEL | |
| GPIO_FUNC11_OUT_SEL_V | |
| GPIO_FUNC11_OUT_SEL_S | |
| GPIO_FUNC12_IN_SEL_CFG_REG | |
| GPIO_FUNC12_IN_INV_SEL_V | |
| GPIO_FUNC12_IN_INV_SEL_S | |
| GPIO_FUNC12_IN_SEL | |
| GPIO_FUNC12_IN_SEL_V | |
| GPIO_FUNC12_IN_SEL_S | |
| GPIO_FUNC12_OUT_SEL_CFG_REG | |
| GPIO_FUNC12_OEN_INV_SEL_V | |
| GPIO_FUNC12_OEN_INV_SEL_S | |
| GPIO_FUNC12_OEN_SEL_V | |
| GPIO_FUNC12_OEN_SEL_S | |
| GPIO_FUNC12_OUT_INV_SEL_V | |
| GPIO_FUNC12_OUT_INV_SEL_S | |
| GPIO_FUNC12_OUT_SEL | |
| GPIO_FUNC12_OUT_SEL_V | |
| GPIO_FUNC12_OUT_SEL_S | |
| GPIO_FUNC13_IN_SEL_CFG_REG | |
| GPIO_FUNC13_IN_INV_SEL_V | |
| GPIO_FUNC13_IN_INV_SEL_S | |
| GPIO_FUNC13_IN_SEL | |
| GPIO_FUNC13_IN_SEL_V | |
| GPIO_FUNC13_IN_SEL_S | |
| GPIO_FUNC13_OUT_SEL_CFG_REG | |
| GPIO_FUNC13_OEN_INV_SEL_V | |
| GPIO_FUNC13_OEN_INV_SEL_S | |
| GPIO_FUNC13_OEN_SEL_V | |
| GPIO_FUNC13_OEN_SEL_S | |
| GPIO_FUNC13_OUT_INV_SEL_V | |
| GPIO_FUNC13_OUT_INV_SEL_S | |
| GPIO_FUNC13_OUT_SEL | |
| GPIO_FUNC13_OUT_SEL_V | |
| GPIO_FUNC13_OUT_SEL_S | |
| GPIO_FUNC14_IN_SEL_CFG_REG | |
| GPIO_FUNC14_IN_INV_SEL_V | |
| GPIO_FUNC14_IN_INV_SEL_S | |
| GPIO_FUNC14_IN_SEL | |
| GPIO_FUNC14_IN_SEL_V | |
| GPIO_FUNC14_IN_SEL_S | |
| GPIO_FUNC14_OUT_SEL_CFG_REG | |
| GPIO_FUNC14_OEN_INV_SEL_V | |
| GPIO_FUNC14_OEN_INV_SEL_S | |
| GPIO_FUNC14_OEN_SEL_V | |
| GPIO_FUNC14_OEN_SEL_S | |
| GPIO_FUNC14_OUT_INV_SEL_V | |
| GPIO_FUNC14_OUT_INV_SEL_S | |
| GPIO_FUNC14_OUT_SEL | |
| GPIO_FUNC14_OUT_SEL_V | |
| GPIO_FUNC14_OUT_SEL_S | |
| GPIO_FUNC15_IN_SEL_CFG_REG | |
| GPIO_FUNC15_IN_INV_SEL_V | |
| GPIO_FUNC15_IN_INV_SEL_S | |
| GPIO_FUNC15_IN_SEL | |
| GPIO_FUNC15_IN_SEL_V | |
| GPIO_FUNC15_IN_SEL_S | |
| GPIO_FUNC15_OUT_SEL_CFG_REG | |
| GPIO_FUNC15_OEN_INV_SEL_V | |
| GPIO_FUNC15_OEN_INV_SEL_S | |
| GPIO_FUNC15_OEN_SEL_V | |
| GPIO_FUNC15_OEN_SEL_S | |
| GPIO_FUNC15_OUT_INV_SEL_V | |
| GPIO_FUNC15_OUT_INV_SEL_S | |
| GPIO_FUNC15_OUT_SEL | |
| GPIO_FUNC15_OUT_SEL_V | |
| GPIO_FUNC15_OUT_SEL_S | |
| GPIO_FUNC16_IN_SEL_CFG_REG | |
| GPIO_FUNC16_IN_INV_SEL_V | |
| GPIO_FUNC16_IN_INV_SEL_S | |
| GPIO_FUNC16_IN_SEL | |
| GPIO_FUNC16_IN_SEL_V | |
| GPIO_FUNC16_IN_SEL_S | |
| GPIO_FUNC16_OUT_SEL_CFG_REG | |
| GPIO_FUNC16_OEN_INV_SEL_V | |
| GPIO_FUNC16_OEN_INV_SEL_S | |
| GPIO_FUNC16_OEN_SEL_V | |
| GPIO_FUNC16_OEN_SEL_S | |
| GPIO_FUNC16_OUT_INV_SEL_V | |
| GPIO_FUNC16_OUT_INV_SEL_S | |
| GPIO_FUNC16_OUT_SEL | |
| GPIO_FUNC16_OUT_SEL_V | |
| GPIO_FUNC16_OUT_SEL_S | |
| GPIO_FUNC17_IN_SEL_CFG_REG | |
| GPIO_FUNC17_IN_INV_SEL_V | |
| GPIO_FUNC17_IN_INV_SEL_S | |
| GPIO_FUNC17_IN_SEL | |
| GPIO_FUNC17_IN_SEL_V | |
| GPIO_FUNC17_IN_SEL_S | |
| GPIO_FUNC17_OUT_SEL_CFG_REG | |
| GPIO_FUNC17_OEN_INV_SEL_V | |
| GPIO_FUNC17_OEN_INV_SEL_S | |
| GPIO_FUNC17_OEN_SEL_V | |
| GPIO_FUNC17_OEN_SEL_S | |
| GPIO_FUNC17_OUT_INV_SEL_V | |
| GPIO_FUNC17_OUT_INV_SEL_S | |
| GPIO_FUNC17_OUT_SEL | |
| GPIO_FUNC17_OUT_SEL_V | |
| GPIO_FUNC17_OUT_SEL_S | |
| GPIO_FUNC18_IN_SEL_CFG_REG | |
| GPIO_FUNC18_IN_INV_SEL_V | |
| GPIO_FUNC18_IN_INV_SEL_S | |
| GPIO_FUNC18_IN_SEL | |
| GPIO_FUNC18_IN_SEL_V | |
| GPIO_FUNC18_IN_SEL_S | |
| GPIO_FUNC18_OUT_SEL_CFG_REG | |
| GPIO_FUNC18_OEN_INV_SEL_V | |
| GPIO_FUNC18_OEN_INV_SEL_S | |
| GPIO_FUNC18_OEN_SEL_V | |
| GPIO_FUNC18_OEN_SEL_S | |
| GPIO_FUNC18_OUT_INV_SEL_V | |
| GPIO_FUNC18_OUT_INV_SEL_S | |
| GPIO_FUNC18_OUT_SEL | |
| GPIO_FUNC18_OUT_SEL_V | |
| GPIO_FUNC18_OUT_SEL_S | |
| GPIO_FUNC19_IN_SEL_CFG_REG | |
| GPIO_FUNC19_IN_INV_SEL_V | |
| GPIO_FUNC19_IN_INV_SEL_S | |
| GPIO_FUNC19_IN_SEL | |
| GPIO_FUNC19_IN_SEL_V | |
| GPIO_FUNC19_IN_SEL_S | |
| GPIO_FUNC19_OUT_SEL_CFG_REG | |
| GPIO_FUNC19_OEN_INV_SEL_V | |
| GPIO_FUNC19_OEN_INV_SEL_S | |
| GPIO_FUNC19_OEN_SEL_V | |
| GPIO_FUNC19_OEN_SEL_S | |
| GPIO_FUNC19_OUT_INV_SEL_V | |
| GPIO_FUNC19_OUT_INV_SEL_S | |
| GPIO_FUNC19_OUT_SEL | |
| GPIO_FUNC19_OUT_SEL_V | |
| GPIO_FUNC19_OUT_SEL_S | |
| GPIO_FUNC20_IN_SEL_CFG_REG | |
| GPIO_FUNC20_IN_INV_SEL_V | |
| GPIO_FUNC20_IN_INV_SEL_S | |
| GPIO_FUNC20_IN_SEL | |
| GPIO_FUNC20_IN_SEL_V | |
| GPIO_FUNC20_IN_SEL_S | |
| GPIO_FUNC20_OUT_SEL_CFG_REG | |
| GPIO_FUNC20_OEN_INV_SEL_V | |
| GPIO_FUNC20_OEN_INV_SEL_S | |
| GPIO_FUNC20_OEN_SEL_V | |
| GPIO_FUNC20_OEN_SEL_S | |
| GPIO_FUNC20_OUT_INV_SEL_V | |
| GPIO_FUNC20_OUT_INV_SEL_S | |
| GPIO_FUNC20_OUT_SEL | |
| GPIO_FUNC20_OUT_SEL_V | |
| GPIO_FUNC20_OUT_SEL_S | |
| GPIO_FUNC21_IN_SEL_CFG_REG | |
| GPIO_FUNC21_IN_INV_SEL_V | |
| GPIO_FUNC21_IN_INV_SEL_S | |
| GPIO_FUNC21_IN_SEL | |
| GPIO_FUNC21_IN_SEL_V | |
| GPIO_FUNC21_IN_SEL_S | |
| GPIO_FUNC21_OUT_SEL_CFG_REG | |
| GPIO_FUNC21_OEN_INV_SEL_V | |
| GPIO_FUNC21_OEN_INV_SEL_S | |
| GPIO_FUNC21_OEN_SEL_V | |
| GPIO_FUNC21_OEN_SEL_S | |
| GPIO_FUNC21_OUT_INV_SEL_V | |
| GPIO_FUNC21_OUT_INV_SEL_S | |
| GPIO_FUNC21_OUT_SEL | |
| GPIO_FUNC21_OUT_SEL_V | |
| GPIO_FUNC21_OUT_SEL_S | |
| GPIO_FUNC22_IN_SEL_CFG_REG | |
| GPIO_FUNC22_IN_INV_SEL_V | |
| GPIO_FUNC22_IN_INV_SEL_S | |
| GPIO_FUNC22_IN_SEL | |
| GPIO_FUNC22_IN_SEL_V | |
| GPIO_FUNC22_IN_SEL_S | |
| GPIO_FUNC22_OUT_SEL_CFG_REG | |
| GPIO_FUNC22_OEN_INV_SEL_V | |
| GPIO_FUNC22_OEN_INV_SEL_S | |
| GPIO_FUNC22_OEN_SEL_V | |
| GPIO_FUNC22_OEN_SEL_S | |
| GPIO_FUNC22_OUT_INV_SEL_V | |
| GPIO_FUNC22_OUT_INV_SEL_S | |
| GPIO_FUNC22_OUT_SEL | |
| GPIO_FUNC22_OUT_SEL_V | |
| GPIO_FUNC22_OUT_SEL_S | |
| GPIO_FUNC23_IN_SEL_CFG_REG | |
| GPIO_FUNC23_IN_INV_SEL_V | |
| GPIO_FUNC23_IN_INV_SEL_S | |
| GPIO_FUNC23_IN_SEL | |
| GPIO_FUNC23_IN_SEL_V | |
| GPIO_FUNC23_IN_SEL_S | |
| GPIO_FUNC23_OUT_SEL_CFG_REG | |
| GPIO_FUNC23_OEN_INV_SEL_V | |
| GPIO_FUNC23_OEN_INV_SEL_S | |
| GPIO_FUNC23_OEN_SEL_V | |
| GPIO_FUNC23_OEN_SEL_S | |
| GPIO_FUNC23_OUT_INV_SEL_V | |
| GPIO_FUNC23_OUT_INV_SEL_S | |
| GPIO_FUNC23_OUT_SEL | |
| GPIO_FUNC23_OUT_SEL_V | |
| GPIO_FUNC23_OUT_SEL_S | |
| GPIO_FUNC24_IN_SEL_CFG_REG | |
| GPIO_FUNC24_IN_INV_SEL_V | |
| GPIO_FUNC24_IN_INV_SEL_S | |
| GPIO_FUNC24_IN_SEL | |
| GPIO_FUNC24_IN_SEL_V | |
| GPIO_FUNC24_IN_SEL_S | |
| GPIO_FUNC24_OUT_SEL_CFG_REG | |
| GPIO_FUNC24_OEN_INV_SEL_V | |
| GPIO_FUNC24_OEN_INV_SEL_S | |
| GPIO_FUNC24_OEN_SEL_V | |
| GPIO_FUNC24_OEN_SEL_S | |
| GPIO_FUNC24_OUT_INV_SEL_V | |
| GPIO_FUNC24_OUT_INV_SEL_S | |
| GPIO_FUNC24_OUT_SEL | |
| GPIO_FUNC24_OUT_SEL_V | |
| GPIO_FUNC24_OUT_SEL_S | |
| GPIO_FUNC25_IN_SEL_CFG_REG | |
| GPIO_FUNC25_IN_INV_SEL_V | |
| GPIO_FUNC25_IN_INV_SEL_S | |
| GPIO_FUNC25_IN_SEL | |
| GPIO_FUNC25_IN_SEL_V | |
| GPIO_FUNC25_IN_SEL_S | |
| GPIO_FUNC25_OUT_SEL_CFG_REG | |
| GPIO_FUNC25_OEN_INV_SEL_V | |
| GPIO_FUNC25_OEN_INV_SEL_S | |
| GPIO_FUNC25_OEN_SEL_V | |
| GPIO_FUNC25_OEN_SEL_S | |
| GPIO_FUNC25_OUT_INV_SEL_V | |
| GPIO_FUNC25_OUT_INV_SEL_S | |
| GPIO_FUNC25_OUT_SEL | |
| GPIO_FUNC25_OUT_SEL_V | |
| GPIO_FUNC25_OUT_SEL_S | |
| GPIO_FUNC26_IN_SEL_CFG_REG | |
| GPIO_FUNC26_IN_INV_SEL_V | |
| GPIO_FUNC26_IN_INV_SEL_S | |
| GPIO_FUNC26_IN_SEL | |
| GPIO_FUNC26_IN_SEL_V | |
| GPIO_FUNC26_IN_SEL_S | |
| GPIO_FUNC26_OUT_SEL_CFG_REG | |
| GPIO_FUNC26_OEN_INV_SEL_V | |
| GPIO_FUNC26_OEN_INV_SEL_S | |
| GPIO_FUNC26_OEN_SEL_V | |
| GPIO_FUNC26_OEN_SEL_S | |
| GPIO_FUNC26_OUT_INV_SEL_V | |
| GPIO_FUNC26_OUT_INV_SEL_S | |
| GPIO_FUNC26_OUT_SEL | |
| GPIO_FUNC26_OUT_SEL_V | |
| GPIO_FUNC26_OUT_SEL_S | |
| GPIO_FUNC27_IN_SEL_CFG_REG | |
| GPIO_FUNC27_IN_INV_SEL_V | |
| GPIO_FUNC27_IN_INV_SEL_S | |
| GPIO_FUNC27_IN_SEL | |
| GPIO_FUNC27_IN_SEL_V | |
| GPIO_FUNC27_IN_SEL_S | |
| GPIO_FUNC27_OUT_SEL_CFG_REG | |
| GPIO_FUNC27_OEN_INV_SEL_V | |
| GPIO_FUNC27_OEN_INV_SEL_S | |
| GPIO_FUNC27_OEN_SEL_V | |
| GPIO_FUNC27_OEN_SEL_S | |
| GPIO_FUNC27_OUT_INV_SEL_V | |
| GPIO_FUNC27_OUT_INV_SEL_S | |
| GPIO_FUNC27_OUT_SEL | |
| GPIO_FUNC27_OUT_SEL_V | |
| GPIO_FUNC27_OUT_SEL_S | |
| GPIO_FUNC28_IN_SEL_CFG_REG | |
| GPIO_FUNC28_IN_INV_SEL_V | |
| GPIO_FUNC28_IN_INV_SEL_S | |
| GPIO_FUNC28_IN_SEL | |
| GPIO_FUNC28_IN_SEL_V | |
| GPIO_FUNC28_IN_SEL_S | |
| GPIO_FUNC28_OUT_SEL_CFG_REG | |
| GPIO_FUNC28_OEN_INV_SEL_V | |
| GPIO_FUNC28_OEN_INV_SEL_S | |
| GPIO_FUNC28_OEN_SEL_V | |
| GPIO_FUNC28_OEN_SEL_S | |
| GPIO_FUNC28_OUT_INV_SEL_V | |
| GPIO_FUNC28_OUT_INV_SEL_S | |
| GPIO_FUNC28_OUT_SEL | |
| GPIO_FUNC28_OUT_SEL_V | |
| GPIO_FUNC28_OUT_SEL_S | |
| GPIO_FUNC29_IN_SEL_CFG_REG | |
| GPIO_FUNC29_IN_INV_SEL_V | |
| GPIO_FUNC29_IN_INV_SEL_S | |
| GPIO_FUNC29_IN_SEL | |
| GPIO_FUNC29_IN_SEL_V | |
| GPIO_FUNC29_IN_SEL_S | |
| GPIO_FUNC29_OUT_SEL_CFG_REG | |
| GPIO_FUNC29_OEN_INV_SEL_V | |
| GPIO_FUNC29_OEN_INV_SEL_S | |
| GPIO_FUNC29_OEN_SEL_V | |
| GPIO_FUNC29_OEN_SEL_S | |
| GPIO_FUNC29_OUT_INV_SEL_V | |
| GPIO_FUNC29_OUT_INV_SEL_S | |
| GPIO_FUNC29_OUT_SEL | |
| GPIO_FUNC29_OUT_SEL_V | |
| GPIO_FUNC29_OUT_SEL_S | |
| GPIO_FUNC30_IN_SEL_CFG_REG | |
| GPIO_FUNC30_IN_INV_SEL_V | |
| GPIO_FUNC30_IN_INV_SEL_S | |
| GPIO_FUNC30_IN_SEL | |
| GPIO_FUNC30_IN_SEL_V | |
| GPIO_FUNC30_IN_SEL_S | |
| GPIO_FUNC30_OUT_SEL_CFG_REG | |
| GPIO_FUNC30_OEN_INV_SEL_V | |
| GPIO_FUNC30_OEN_INV_SEL_S | |
| GPIO_FUNC30_OEN_SEL_V | |
| GPIO_FUNC30_OEN_SEL_S | |
| GPIO_FUNC30_OUT_INV_SEL_V | |
| GPIO_FUNC30_OUT_INV_SEL_S | |
| GPIO_FUNC30_OUT_SEL | |
| GPIO_FUNC30_OUT_SEL_V | |
| GPIO_FUNC30_OUT_SEL_S | |
| GPIO_FUNC31_IN_SEL_CFG_REG | |
| GPIO_FUNC31_IN_INV_SEL_V | |
| GPIO_FUNC31_IN_INV_SEL_S | |
| GPIO_FUNC31_IN_SEL | |
| GPIO_FUNC31_IN_SEL_V | |
| GPIO_FUNC31_IN_SEL_S | |
| GPIO_FUNC31_OUT_SEL_CFG_REG | |
| GPIO_FUNC31_OEN_INV_SEL_V | |
| GPIO_FUNC31_OEN_INV_SEL_S | |
| GPIO_FUNC31_OEN_SEL_V | |
| GPIO_FUNC31_OEN_SEL_S | |
| GPIO_FUNC31_OUT_INV_SEL_V | |
| GPIO_FUNC31_OUT_INV_SEL_S | |
| GPIO_FUNC31_OUT_SEL | |
| GPIO_FUNC31_OUT_SEL_V | |
| GPIO_FUNC31_OUT_SEL_S | |
| GPIO_FUNC32_IN_SEL_CFG_REG | |
| GPIO_FUNC32_IN_INV_SEL_V | |
| GPIO_FUNC32_IN_INV_SEL_S | |
| GPIO_FUNC32_IN_SEL | |
| GPIO_FUNC32_IN_SEL_V | |
| GPIO_FUNC32_IN_SEL_S | |
| GPIO_FUNC32_OUT_SEL_CFG_REG | |
| GPIO_FUNC32_OEN_INV_SEL_V | |
| GPIO_FUNC32_OEN_INV_SEL_S | |
| GPIO_FUNC32_OEN_SEL_V | |
| GPIO_FUNC32_OEN_SEL_S | |
| GPIO_FUNC32_OUT_INV_SEL_V | |
| GPIO_FUNC32_OUT_INV_SEL_S | |
| GPIO_FUNC32_OUT_SEL | |
| GPIO_FUNC32_OUT_SEL_V | |
| GPIO_FUNC32_OUT_SEL_S | |
| GPIO_FUNC33_IN_SEL_CFG_REG | |
| GPIO_FUNC33_IN_INV_SEL_V | |
| GPIO_FUNC33_IN_INV_SEL_S | |
| GPIO_FUNC33_IN_SEL | |
| GPIO_FUNC33_IN_SEL_V | |
| GPIO_FUNC33_IN_SEL_S | |
| GPIO_FUNC33_OUT_SEL_CFG_REG | |
| GPIO_FUNC33_OEN_INV_SEL_V | |
| GPIO_FUNC33_OEN_INV_SEL_S | |
| GPIO_FUNC33_OEN_SEL_V | |
| GPIO_FUNC33_OEN_SEL_S | |
| GPIO_FUNC33_OUT_INV_SEL_V | |
| GPIO_FUNC33_OUT_INV_SEL_S | |
| GPIO_FUNC33_OUT_SEL | |
| GPIO_FUNC33_OUT_SEL_V | |
| GPIO_FUNC33_OUT_SEL_S | |
| GPIO_FUNC34_IN_SEL_CFG_REG | |
| GPIO_FUNC34_IN_INV_SEL_V | |
| GPIO_FUNC34_IN_INV_SEL_S | |
| GPIO_FUNC34_IN_SEL | |
| GPIO_FUNC34_IN_SEL_V | |
| GPIO_FUNC34_IN_SEL_S | |
| GPIO_FUNC34_OUT_SEL_CFG_REG | |
| GPIO_FUNC34_OEN_INV_SEL_V | |
| GPIO_FUNC34_OEN_INV_SEL_S | |
| GPIO_FUNC34_OEN_SEL_V | |
| GPIO_FUNC34_OEN_SEL_S | |
| GPIO_FUNC34_OUT_INV_SEL_V | |
| GPIO_FUNC34_OUT_INV_SEL_S | |
| GPIO_FUNC34_OUT_SEL | |
| GPIO_FUNC34_OUT_SEL_V | |
| GPIO_FUNC34_OUT_SEL_S | |
| GPIO_FUNC35_IN_SEL_CFG_REG | |
| GPIO_FUNC35_IN_INV_SEL_V | |
| GPIO_FUNC35_IN_INV_SEL_S | |
| GPIO_FUNC35_IN_SEL | |
| GPIO_FUNC35_IN_SEL_V | |
| GPIO_FUNC35_IN_SEL_S | |
| GPIO_FUNC35_OUT_SEL_CFG_REG | |
| GPIO_FUNC35_OEN_INV_SEL_V | |
| GPIO_FUNC35_OEN_INV_SEL_S | |
| GPIO_FUNC35_OEN_SEL_V | |
| GPIO_FUNC35_OEN_SEL_S | |
| GPIO_FUNC35_OUT_INV_SEL_V | |
| GPIO_FUNC35_OUT_INV_SEL_S | |
| GPIO_FUNC35_OUT_SEL | |
| GPIO_FUNC35_OUT_SEL_V | |
| GPIO_FUNC35_OUT_SEL_S | |
| GPIO_FUNC36_IN_SEL_CFG_REG | |
| GPIO_FUNC36_IN_INV_SEL_V | |
| GPIO_FUNC36_IN_INV_SEL_S | |
| GPIO_FUNC36_IN_SEL | |
| GPIO_FUNC36_IN_SEL_V | |
| GPIO_FUNC36_IN_SEL_S | |
| GPIO_FUNC36_OUT_SEL_CFG_REG | |
| GPIO_FUNC36_OEN_INV_SEL_V | |
| GPIO_FUNC36_OEN_INV_SEL_S | |
| GPIO_FUNC36_OEN_SEL_V | |
| GPIO_FUNC36_OEN_SEL_S | |
| GPIO_FUNC36_OUT_INV_SEL_V | |
| GPIO_FUNC36_OUT_INV_SEL_S | |
| GPIO_FUNC36_OUT_SEL | |
| GPIO_FUNC36_OUT_SEL_V | |
| GPIO_FUNC36_OUT_SEL_S | |
| GPIO_FUNC37_IN_SEL_CFG_REG | |
| GPIO_FUNC37_IN_INV_SEL_V | |
| GPIO_FUNC37_IN_INV_SEL_S | |
| GPIO_FUNC37_IN_SEL | |
| GPIO_FUNC37_IN_SEL_V | |
| GPIO_FUNC37_IN_SEL_S | |
| GPIO_FUNC37_OUT_SEL_CFG_REG | |
| GPIO_FUNC37_OEN_INV_SEL_V | |
| GPIO_FUNC37_OEN_INV_SEL_S | |
| GPIO_FUNC37_OEN_SEL_V | |
| GPIO_FUNC37_OEN_SEL_S | |
| GPIO_FUNC37_OUT_INV_SEL_V | |
| GPIO_FUNC37_OUT_INV_SEL_S | |
| GPIO_FUNC37_OUT_SEL | |
| GPIO_FUNC37_OUT_SEL_V | |
| GPIO_FUNC37_OUT_SEL_S | |
| GPIO_FUNC38_IN_SEL_CFG_REG | |
| GPIO_FUNC38_IN_INV_SEL_V | |
| GPIO_FUNC38_IN_INV_SEL_S | |
| GPIO_FUNC38_IN_SEL | |
| GPIO_FUNC38_IN_SEL_V | |
| GPIO_FUNC38_IN_SEL_S | |
| GPIO_FUNC38_OUT_SEL_CFG_REG | |
| GPIO_FUNC38_OEN_INV_SEL_V | |
| GPIO_FUNC38_OEN_INV_SEL_S | |
| GPIO_FUNC38_OEN_SEL_V | |
| GPIO_FUNC38_OEN_SEL_S | |
| GPIO_FUNC38_OUT_INV_SEL_V | |
| GPIO_FUNC38_OUT_INV_SEL_S | |
| GPIO_FUNC38_OUT_SEL | |
| GPIO_FUNC38_OUT_SEL_V | |
| GPIO_FUNC38_OUT_SEL_S | |
| GPIO_FUNC39_IN_SEL_CFG_REG | |
| GPIO_FUNC39_IN_INV_SEL_V | |
| GPIO_FUNC39_IN_INV_SEL_S | |
| GPIO_FUNC39_IN_SEL | |
| GPIO_FUNC39_IN_SEL_V | |
| GPIO_FUNC39_IN_SEL_S | |
| GPIO_FUNC39_OUT_SEL_CFG_REG | |
| GPIO_FUNC39_OEN_INV_SEL_V | |
| GPIO_FUNC39_OEN_INV_SEL_S | |
| GPIO_FUNC39_OEN_SEL_V | |
| GPIO_FUNC39_OEN_SEL_S | |
| GPIO_FUNC39_OUT_INV_SEL_V | |
| GPIO_FUNC39_OUT_INV_SEL_S | |
| GPIO_FUNC39_OUT_SEL | |
| GPIO_FUNC39_OUT_SEL_V | |
| GPIO_FUNC39_OUT_SEL_S | |
| GPIO_FUNC40_IN_SEL_CFG_REG | |
| GPIO_FUNC40_IN_INV_SEL_V | |
| GPIO_FUNC40_IN_INV_SEL_S | |
| GPIO_FUNC40_IN_SEL | |
| GPIO_FUNC40_IN_SEL_V | |
| GPIO_FUNC40_IN_SEL_S | |
| GPIO_FUNC41_IN_SEL_CFG_REG | |
| GPIO_FUNC41_IN_INV_SEL_V | |
| GPIO_FUNC41_IN_INV_SEL_S | |
| GPIO_FUNC41_IN_SEL | |
| GPIO_FUNC41_IN_SEL_V | |
| GPIO_FUNC41_IN_SEL_S | |
| GPIO_FUNC42_IN_SEL_CFG_REG | |
| GPIO_FUNC42_IN_INV_SEL_V | |
| GPIO_FUNC42_IN_INV_SEL_S | |
| GPIO_FUNC42_IN_SEL | |
| GPIO_FUNC42_IN_SEL_V | |
| GPIO_FUNC42_IN_SEL_S | |
| GPIO_FUNC43_IN_SEL_CFG_REG | |
| GPIO_FUNC43_IN_INV_SEL_V | |
| GPIO_FUNC43_IN_INV_SEL_S | |
| GPIO_FUNC43_IN_SEL | |
| GPIO_FUNC43_IN_SEL_V | |
| GPIO_FUNC43_IN_SEL_S | |
| GPIO_FUNC44_IN_SEL_CFG_REG | |
| GPIO_FUNC44_IN_INV_SEL_V | |
| GPIO_FUNC44_IN_INV_SEL_S | |
| GPIO_FUNC44_IN_SEL | |
| GPIO_FUNC44_IN_SEL_V | |
| GPIO_FUNC44_IN_SEL_S | |
| GPIO_FUNC45_IN_SEL_CFG_REG | |
| GPIO_FUNC45_IN_INV_SEL_V | |
| GPIO_FUNC45_IN_INV_SEL_S | |
| GPIO_FUNC45_IN_SEL | |
| GPIO_FUNC45_IN_SEL_V | |
| GPIO_FUNC45_IN_SEL_S | |
| GPIO_FUNC46_IN_SEL_CFG_REG | |
| GPIO_FUNC46_IN_INV_SEL_V | |
| GPIO_FUNC46_IN_INV_SEL_S | |
| GPIO_FUNC46_IN_SEL | |
| GPIO_FUNC46_IN_SEL_V | |
| GPIO_FUNC46_IN_SEL_S | |
| GPIO_FUNC47_IN_SEL_CFG_REG | |
| GPIO_FUNC47_IN_INV_SEL_V | |
| GPIO_FUNC47_IN_INV_SEL_S | |
| GPIO_FUNC47_IN_SEL | |
| GPIO_FUNC47_IN_SEL_V | |
| GPIO_FUNC47_IN_SEL_S | |
| GPIO_FUNC48_IN_SEL_CFG_REG | |
| GPIO_FUNC48_IN_INV_SEL_V | |
| GPIO_FUNC48_IN_INV_SEL_S | |
| GPIO_FUNC48_IN_SEL | |
| GPIO_FUNC48_IN_SEL_V | |
| GPIO_FUNC48_IN_SEL_S | |
| GPIO_FUNC49_IN_SEL_CFG_REG | |
| GPIO_FUNC49_IN_INV_SEL_V | |
| GPIO_FUNC49_IN_INV_SEL_S | |
| GPIO_FUNC49_IN_SEL | |
| GPIO_FUNC49_IN_SEL_V | |
| GPIO_FUNC49_IN_SEL_S | |
| GPIO_FUNC50_IN_SEL_CFG_REG | |
| GPIO_FUNC50_IN_INV_SEL_V | |
| GPIO_FUNC50_IN_INV_SEL_S | |
| GPIO_FUNC50_IN_SEL | |
| GPIO_FUNC50_IN_SEL_V | |
| GPIO_FUNC50_IN_SEL_S | |
| GPIO_FUNC51_IN_SEL_CFG_REG | |
| GPIO_FUNC51_IN_INV_SEL_V | |
| GPIO_FUNC51_IN_INV_SEL_S | |
| GPIO_FUNC51_IN_SEL | |
| GPIO_FUNC51_IN_SEL_V | |
| GPIO_FUNC51_IN_SEL_S | |
| GPIO_FUNC52_IN_SEL_CFG_REG | |
| GPIO_FUNC52_IN_INV_SEL_V | |
| GPIO_FUNC52_IN_INV_SEL_S | |
| GPIO_FUNC52_IN_SEL | |
| GPIO_FUNC52_IN_SEL_V | |
| GPIO_FUNC52_IN_SEL_S | |
| GPIO_FUNC53_IN_SEL_CFG_REG | |
| GPIO_FUNC53_IN_INV_SEL_V | |
| GPIO_FUNC53_IN_INV_SEL_S | |
| GPIO_FUNC53_IN_SEL | |
| GPIO_FUNC53_IN_SEL_V | |
| GPIO_FUNC53_IN_SEL_S | |
| GPIO_FUNC54_IN_SEL_CFG_REG | |
| GPIO_FUNC54_IN_INV_SEL_V | |
| GPIO_FUNC54_IN_INV_SEL_S | |
| GPIO_FUNC54_IN_SEL | |
| GPIO_FUNC54_IN_SEL_V | |
| GPIO_FUNC54_IN_SEL_S | |
| GPIO_FUNC55_IN_SEL_CFG_REG | |
| GPIO_FUNC55_IN_INV_SEL_V | |
| GPIO_FUNC55_IN_INV_SEL_S | |
| GPIO_FUNC55_IN_SEL | |
| GPIO_FUNC55_IN_SEL_V | |
| GPIO_FUNC55_IN_SEL_S | |
| GPIO_FUNC56_IN_SEL_CFG_REG | |
| GPIO_FUNC56_IN_INV_SEL_V | |
| GPIO_FUNC56_IN_INV_SEL_S | |
| GPIO_FUNC56_IN_SEL | |
| GPIO_FUNC56_IN_SEL_V | |
| GPIO_FUNC56_IN_SEL_S | |
| GPIO_FUNC57_IN_SEL_CFG_REG | |
| GPIO_FUNC57_IN_INV_SEL_V | |
| GPIO_FUNC57_IN_INV_SEL_S | |
| GPIO_FUNC57_IN_SEL | |
| GPIO_FUNC57_IN_SEL_V | |
| GPIO_FUNC57_IN_SEL_S | |
| GPIO_FUNC58_IN_SEL_CFG_REG | |
| GPIO_FUNC58_IN_INV_SEL_V | |
| GPIO_FUNC58_IN_INV_SEL_S | |
| GPIO_FUNC58_IN_SEL | |
| GPIO_FUNC58_IN_SEL_V | |
| GPIO_FUNC58_IN_SEL_S | |
| GPIO_FUNC59_IN_SEL_CFG_REG | |
| GPIO_FUNC59_IN_INV_SEL_V | |
| GPIO_FUNC59_IN_INV_SEL_S | |
| GPIO_FUNC59_IN_SEL | |
| GPIO_FUNC59_IN_SEL_V | |
| GPIO_FUNC59_IN_SEL_S | |
| GPIO_FUNC60_IN_SEL_CFG_REG | |
| GPIO_FUNC60_IN_INV_SEL_V | |
| GPIO_FUNC60_IN_INV_SEL_S | |
| GPIO_FUNC60_IN_SEL | |
| GPIO_FUNC60_IN_SEL_V | |
| GPIO_FUNC60_IN_SEL_S | |
| GPIO_FUNC61_IN_SEL_CFG_REG | |
| GPIO_FUNC61_IN_INV_SEL_V | |
| GPIO_FUNC61_IN_INV_SEL_S | |
| GPIO_FUNC61_IN_SEL | |
| GPIO_FUNC61_IN_SEL_V | |
| GPIO_FUNC61_IN_SEL_S | |
| GPIO_FUNC62_IN_SEL_CFG_REG | |
| GPIO_FUNC62_IN_INV_SEL_V | |
| GPIO_FUNC62_IN_INV_SEL_S | |
| GPIO_FUNC62_IN_SEL | |
| GPIO_FUNC62_IN_SEL_V | |
| GPIO_FUNC62_IN_SEL_S | |
| GPIO_FUNC63_IN_SEL_CFG_REG | |
| GPIO_FUNC63_IN_INV_SEL_V | |
| GPIO_FUNC63_IN_INV_SEL_S | |
| GPIO_FUNC63_IN_SEL | |
| GPIO_FUNC63_IN_SEL_V | |
| GPIO_FUNC63_IN_SEL_S | |
| GPIO_FUNC64_IN_SEL_CFG_REG | |
| GPIO_FUNC64_IN_INV_SEL_V | |
| GPIO_FUNC64_IN_INV_SEL_S | |
| GPIO_FUNC64_IN_SEL | |
| GPIO_FUNC64_IN_SEL_V | |
| GPIO_FUNC64_IN_SEL_S | |
| GPIO_FUNC65_IN_SEL_CFG_REG | |
| GPIO_FUNC65_IN_INV_SEL_V | |
| GPIO_FUNC65_IN_INV_SEL_S | |
| GPIO_FUNC65_IN_SEL | |
| GPIO_FUNC65_IN_SEL_V | |
| GPIO_FUNC65_IN_SEL_S | |
| GPIO_FUNC66_IN_SEL_CFG_REG | |
| GPIO_FUNC66_IN_INV_SEL_V | |
| GPIO_FUNC66_IN_INV_SEL_S | |
| GPIO_FUNC66_IN_SEL | |
| GPIO_FUNC66_IN_SEL_V | |
| GPIO_FUNC66_IN_SEL_S | |
| GPIO_FUNC67_IN_SEL_CFG_REG | |
| GPIO_FUNC67_IN_INV_SEL_V | |
| GPIO_FUNC67_IN_INV_SEL_S | |
| GPIO_FUNC67_IN_SEL | |
| GPIO_FUNC67_IN_SEL_V | |
| GPIO_FUNC67_IN_SEL_S | |
| GPIO_FUNC68_IN_SEL_CFG_REG | |
| GPIO_FUNC68_IN_INV_SEL_V | |
| GPIO_FUNC68_IN_INV_SEL_S | |
| GPIO_FUNC68_IN_SEL | |
| GPIO_FUNC68_IN_SEL_V | |
| GPIO_FUNC68_IN_SEL_S | |
| GPIO_FUNC69_IN_SEL_CFG_REG | |
| GPIO_FUNC69_IN_INV_SEL_V | |
| GPIO_FUNC69_IN_INV_SEL_S | |
| GPIO_FUNC69_IN_SEL | |
| GPIO_FUNC69_IN_SEL_V | |
| GPIO_FUNC69_IN_SEL_S | |
| GPIO_FUNC70_IN_SEL_CFG_REG | |
| GPIO_FUNC70_IN_INV_SEL_V | |
| GPIO_FUNC70_IN_INV_SEL_S | |
| GPIO_FUNC70_IN_SEL | |
| GPIO_FUNC70_IN_SEL_V | |
| GPIO_FUNC70_IN_SEL_S | |
| GPIO_FUNC71_IN_SEL_CFG_REG | |
| GPIO_FUNC71_IN_INV_SEL_V | |
| GPIO_FUNC71_IN_INV_SEL_S | |
| GPIO_FUNC71_IN_SEL | |
| GPIO_FUNC71_IN_SEL_V | |
| GPIO_FUNC71_IN_SEL_S | |
| GPIO_FUNC72_IN_SEL_CFG_REG | |
| GPIO_FUNC72_IN_INV_SEL_V | |
| GPIO_FUNC72_IN_INV_SEL_S | |
| GPIO_FUNC72_IN_SEL | |
| GPIO_FUNC72_IN_SEL_V | |
| GPIO_FUNC72_IN_SEL_S | |
| GPIO_FUNC73_IN_SEL_CFG_REG | |
| GPIO_FUNC73_IN_INV_SEL_V | |
| GPIO_FUNC73_IN_INV_SEL_S | |
| GPIO_FUNC73_IN_SEL | |
| GPIO_FUNC73_IN_SEL_V | |
| GPIO_FUNC73_IN_SEL_S | |
| GPIO_FUNC74_IN_SEL_CFG_REG | |
| GPIO_FUNC74_IN_INV_SEL_V | |
| GPIO_FUNC74_IN_INV_SEL_S | |
| GPIO_FUNC74_IN_SEL | |
| GPIO_FUNC74_IN_SEL_V | |
| GPIO_FUNC74_IN_SEL_S | |
| GPIO_FUNC75_IN_SEL_CFG_REG | |
| GPIO_FUNC75_IN_INV_SEL_V | |
| GPIO_FUNC75_IN_INV_SEL_S | |
| GPIO_FUNC75_IN_SEL | |
| GPIO_FUNC75_IN_SEL_V | |
| GPIO_FUNC75_IN_SEL_S | |
| GPIO_FUNC76_IN_SEL_CFG_REG | |
| GPIO_FUNC76_IN_INV_SEL_V | |
| GPIO_FUNC76_IN_INV_SEL_S | |
| GPIO_FUNC76_IN_SEL | |
| GPIO_FUNC76_IN_SEL_V | |
| GPIO_FUNC76_IN_SEL_S | |
| GPIO_FUNC77_IN_SEL_CFG_REG | |
| GPIO_FUNC77_IN_INV_SEL_V | |
| GPIO_FUNC77_IN_INV_SEL_S | |
| GPIO_FUNC77_IN_SEL | |
| GPIO_FUNC77_IN_SEL_V | |
| GPIO_FUNC77_IN_SEL_S | |
| GPIO_FUNC78_IN_SEL_CFG_REG | |
| GPIO_FUNC78_IN_INV_SEL_V | |
| GPIO_FUNC78_IN_INV_SEL_S | |
| GPIO_FUNC78_IN_SEL | |
| GPIO_FUNC78_IN_SEL_V | |
| GPIO_FUNC78_IN_SEL_S | |
| GPIO_FUNC79_IN_SEL_CFG_REG | |
| GPIO_FUNC79_IN_INV_SEL_V | |
| GPIO_FUNC79_IN_INV_SEL_S | |
| GPIO_FUNC79_IN_SEL | |
| GPIO_FUNC79_IN_SEL_V | |
| GPIO_FUNC79_IN_SEL_S | |
| GPIO_FUNC80_IN_SEL_CFG_REG | |
| GPIO_FUNC80_IN_INV_SEL_V | |
| GPIO_FUNC80_IN_INV_SEL_S | |
| GPIO_FUNC80_IN_SEL | |
| GPIO_FUNC80_IN_SEL_V | |
| GPIO_FUNC80_IN_SEL_S | |
| GPIO_FUNC81_IN_SEL_CFG_REG | |
| GPIO_FUNC81_IN_INV_SEL_V | |
| GPIO_FUNC81_IN_INV_SEL_S | |
| GPIO_FUNC81_IN_SEL | |
| GPIO_FUNC81_IN_SEL_V | |
| GPIO_FUNC81_IN_SEL_S | |
| GPIO_FUNC82_IN_SEL_CFG_REG | |
| GPIO_FUNC82_IN_INV_SEL_V | |
| GPIO_FUNC82_IN_INV_SEL_S | |
| GPIO_FUNC82_IN_SEL | |
| GPIO_FUNC82_IN_SEL_V | |
| GPIO_FUNC82_IN_SEL_S | |
| GPIO_FUNC83_IN_SEL_CFG_REG | |
| GPIO_FUNC83_IN_INV_SEL_V | |
| GPIO_FUNC83_IN_INV_SEL_S | |
| GPIO_FUNC83_IN_SEL | |
| GPIO_FUNC83_IN_SEL_V | |
| GPIO_FUNC83_IN_SEL_S | |
| GPIO_FUNC84_IN_SEL_CFG_REG | |
| GPIO_FUNC84_IN_INV_SEL_V | |
| GPIO_FUNC84_IN_INV_SEL_S | |
| GPIO_FUNC84_IN_SEL | |
| GPIO_FUNC84_IN_SEL_V | |
| GPIO_FUNC84_IN_SEL_S | |
| GPIO_FUNC85_IN_SEL_CFG_REG | |
| GPIO_FUNC85_IN_INV_SEL_V | |
| GPIO_FUNC85_IN_INV_SEL_S | |
| GPIO_FUNC85_IN_SEL | |
| GPIO_FUNC85_IN_SEL_V | |
| GPIO_FUNC85_IN_SEL_S | |
| GPIO_FUNC86_IN_SEL_CFG_REG | |
| GPIO_FUNC86_IN_INV_SEL_V | |
| GPIO_FUNC86_IN_INV_SEL_S | |
| GPIO_FUNC86_IN_SEL | |
| GPIO_FUNC86_IN_SEL_V | |
| GPIO_FUNC86_IN_SEL_S | |
| GPIO_FUNC87_IN_SEL_CFG_REG | |
| GPIO_FUNC87_IN_INV_SEL_V | |
| GPIO_FUNC87_IN_INV_SEL_S | |
| GPIO_FUNC87_IN_SEL | |
| GPIO_FUNC87_IN_SEL_V | |
| GPIO_FUNC87_IN_SEL_S | |
| GPIO_FUNC88_IN_SEL_CFG_REG | |
| GPIO_FUNC88_IN_INV_SEL_V | |
| GPIO_FUNC88_IN_INV_SEL_S | |
| GPIO_FUNC88_IN_SEL | |
| GPIO_FUNC88_IN_SEL_V | |
| GPIO_FUNC88_IN_SEL_S | |
| GPIO_FUNC89_IN_SEL_CFG_REG | |
| GPIO_FUNC89_IN_INV_SEL_V | |
| GPIO_FUNC89_IN_INV_SEL_S | |
| GPIO_FUNC89_IN_SEL | |
| GPIO_FUNC89_IN_SEL_V | |
| GPIO_FUNC89_IN_SEL_S | |
| GPIO_FUNC90_IN_SEL_CFG_REG | |
| GPIO_FUNC90_IN_INV_SEL_V | |
| GPIO_FUNC90_IN_INV_SEL_S | |
| GPIO_FUNC90_IN_SEL | |
| GPIO_FUNC90_IN_SEL_V | |
| GPIO_FUNC90_IN_SEL_S | |
| GPIO_FUNC91_IN_SEL_CFG_REG | |
| GPIO_FUNC91_IN_INV_SEL_V | |
| GPIO_FUNC91_IN_INV_SEL_S | |
| GPIO_FUNC91_IN_SEL | |
| GPIO_FUNC91_IN_SEL_V | |
| GPIO_FUNC91_IN_SEL_S | |
| GPIO_FUNC92_IN_SEL_CFG_REG | |
| GPIO_FUNC92_IN_INV_SEL_V | |
| GPIO_FUNC92_IN_INV_SEL_S | |
| GPIO_FUNC92_IN_SEL | |
| GPIO_FUNC92_IN_SEL_V | |
| GPIO_FUNC92_IN_SEL_S | |
| GPIO_FUNC93_IN_SEL_CFG_REG | |
| GPIO_FUNC93_IN_INV_SEL_V | |
| GPIO_FUNC93_IN_INV_SEL_S | |
| GPIO_FUNC93_IN_SEL | |
| GPIO_FUNC93_IN_SEL_V | |
| GPIO_FUNC93_IN_SEL_S | |
| GPIO_FUNC94_IN_SEL_CFG_REG | |
| GPIO_FUNC94_IN_INV_SEL_V | |
| GPIO_FUNC94_IN_INV_SEL_S | |
| GPIO_FUNC94_IN_SEL | |
| GPIO_FUNC94_IN_SEL_V | |
| GPIO_FUNC94_IN_SEL_S | |
| GPIO_FUNC95_IN_SEL_CFG_REG | |
| GPIO_FUNC95_IN_INV_SEL_V | |
| GPIO_FUNC95_IN_INV_SEL_S | |
| GPIO_FUNC95_IN_SEL | |
| GPIO_FUNC95_IN_SEL_V | |
| GPIO_FUNC95_IN_SEL_S | |
| GPIO_FUNC96_IN_SEL_CFG_REG | |
| GPIO_FUNC96_IN_INV_SEL_V | |
| GPIO_FUNC96_IN_INV_SEL_S | |
| GPIO_FUNC96_IN_SEL | |
| GPIO_FUNC96_IN_SEL_V | |
| GPIO_FUNC96_IN_SEL_S | |
| GPIO_FUNC97_IN_SEL_CFG_REG | |
| GPIO_FUNC97_IN_INV_SEL_V | |
| GPIO_FUNC97_IN_INV_SEL_S | |
| GPIO_FUNC97_IN_SEL | |
| GPIO_FUNC97_IN_SEL_V | |
| GPIO_FUNC97_IN_SEL_S | |
| GPIO_FUNC98_IN_SEL_CFG_REG | |
| GPIO_FUNC98_IN_INV_SEL_V | |
| GPIO_FUNC98_IN_INV_SEL_S | |
| GPIO_FUNC98_IN_SEL | |
| GPIO_FUNC98_IN_SEL_V | |
| GPIO_FUNC98_IN_SEL_S | |
| GPIO_FUNC99_IN_SEL_CFG_REG | |
| GPIO_FUNC99_IN_INV_SEL_V | |
| GPIO_FUNC99_IN_INV_SEL_S | |
| GPIO_FUNC99_IN_SEL | |
| GPIO_FUNC99_IN_SEL_V | |
| GPIO_FUNC99_IN_SEL_S | |
| GPIO_FUNC100_IN_SEL_CFG_REG | |
| GPIO_FUNC100_IN_INV_SEL_V | |
| GPIO_FUNC100_IN_INV_SEL_S | |
| GPIO_FUNC100_IN_SEL | |
| GPIO_FUNC100_IN_SEL_V | |
| GPIO_FUNC100_IN_SEL_S | |
| GPIO_FUNC101_IN_SEL_CFG_REG | |
| GPIO_FUNC101_IN_INV_SEL_V | |
| GPIO_FUNC101_IN_INV_SEL_S | |
| GPIO_FUNC101_IN_SEL | |
| GPIO_FUNC101_IN_SEL_V | |
| GPIO_FUNC101_IN_SEL_S | |
| GPIO_FUNC102_IN_SEL_CFG_REG | |
| GPIO_FUNC102_IN_INV_SEL_V | |
| GPIO_FUNC102_IN_INV_SEL_S | |
| GPIO_FUNC102_IN_SEL | |
| GPIO_FUNC102_IN_SEL_V | |
| GPIO_FUNC102_IN_SEL_S | |
| GPIO_FUNC103_IN_SEL_CFG_REG | |
| GPIO_FUNC103_IN_INV_SEL_V | |
| GPIO_FUNC103_IN_INV_SEL_S | |
| GPIO_FUNC103_IN_SEL | |
| GPIO_FUNC103_IN_SEL_V | |
| GPIO_FUNC103_IN_SEL_S | |
| GPIO_FUNC104_IN_SEL_CFG_REG | |
| GPIO_FUNC104_IN_INV_SEL_V | |
| GPIO_FUNC104_IN_INV_SEL_S | |
| GPIO_FUNC104_IN_SEL | |
| GPIO_FUNC104_IN_SEL_V | |
| GPIO_FUNC104_IN_SEL_S | |
| GPIO_FUNC105_IN_SEL_CFG_REG | |
| GPIO_FUNC105_IN_INV_SEL_V | |
| GPIO_FUNC105_IN_INV_SEL_S | |
| GPIO_FUNC105_IN_SEL | |
| GPIO_FUNC105_IN_SEL_V | |
| GPIO_FUNC105_IN_SEL_S | |
| GPIO_FUNC106_IN_SEL_CFG_REG | |
| GPIO_FUNC106_IN_INV_SEL_V | |
| GPIO_FUNC106_IN_INV_SEL_S | |
| GPIO_FUNC106_IN_SEL | |
| GPIO_FUNC106_IN_SEL_V | |
| GPIO_FUNC106_IN_SEL_S | |
| GPIO_FUNC107_IN_SEL_CFG_REG | |
| GPIO_FUNC107_IN_INV_SEL_V | |
| GPIO_FUNC107_IN_INV_SEL_S | |
| GPIO_FUNC107_IN_SEL | |
| GPIO_FUNC107_IN_SEL_V | |
| GPIO_FUNC107_IN_SEL_S | |
| GPIO_FUNC108_IN_SEL_CFG_REG | |
| GPIO_FUNC108_IN_INV_SEL_V | |
| GPIO_FUNC108_IN_INV_SEL_S | |
| GPIO_FUNC108_IN_SEL | |
| GPIO_FUNC108_IN_SEL_V | |
| GPIO_FUNC108_IN_SEL_S | |
| GPIO_FUNC109_IN_SEL_CFG_REG | |
| GPIO_FUNC109_IN_INV_SEL_V | |
| GPIO_FUNC109_IN_INV_SEL_S | |
| GPIO_FUNC109_IN_SEL | |
| GPIO_FUNC109_IN_SEL_V | |
| GPIO_FUNC109_IN_SEL_S | |
| GPIO_FUNC110_IN_SEL_CFG_REG | |
| GPIO_FUNC110_IN_INV_SEL_V | |
| GPIO_FUNC110_IN_INV_SEL_S | |
| GPIO_FUNC110_IN_SEL | |
| GPIO_FUNC110_IN_SEL_V | |
| GPIO_FUNC110_IN_SEL_S | |
| GPIO_FUNC111_IN_SEL_CFG_REG | |
| GPIO_FUNC111_IN_INV_SEL_V | |
| GPIO_FUNC111_IN_INV_SEL_S | |
| GPIO_FUNC111_IN_SEL | |
| GPIO_FUNC111_IN_SEL_V | |
| GPIO_FUNC111_IN_SEL_S | |
| GPIO_FUNC112_IN_SEL_CFG_REG | |
| GPIO_FUNC112_IN_INV_SEL_V | |
| GPIO_FUNC112_IN_INV_SEL_S | |
| GPIO_FUNC112_IN_SEL | |
| GPIO_FUNC112_IN_SEL_V | |
| GPIO_FUNC112_IN_SEL_S | |
| GPIO_FUNC113_IN_SEL_CFG_REG | |
| GPIO_FUNC113_IN_INV_SEL_V | |
| GPIO_FUNC113_IN_INV_SEL_S | |
| GPIO_FUNC113_IN_SEL | |
| GPIO_FUNC113_IN_SEL_V | |
| GPIO_FUNC113_IN_SEL_S | |
| GPIO_FUNC114_IN_SEL_CFG_REG | |
| GPIO_FUNC114_IN_INV_SEL_V | |
| GPIO_FUNC114_IN_INV_SEL_S | |
| GPIO_FUNC114_IN_SEL | |
| GPIO_FUNC114_IN_SEL_V | |
| GPIO_FUNC114_IN_SEL_S | |
| GPIO_FUNC115_IN_SEL_CFG_REG | |
| GPIO_FUNC115_IN_INV_SEL_V | |
| GPIO_FUNC115_IN_INV_SEL_S | |
| GPIO_FUNC115_IN_SEL | |
| GPIO_FUNC115_IN_SEL_V | |
| GPIO_FUNC115_IN_SEL_S | |
| GPIO_FUNC116_IN_SEL_CFG_REG | |
| GPIO_FUNC116_IN_INV_SEL_V | |
| GPIO_FUNC116_IN_INV_SEL_S | |
| GPIO_FUNC116_IN_SEL | |
| GPIO_FUNC116_IN_SEL_V | |
| GPIO_FUNC116_IN_SEL_S | |
| GPIO_FUNC117_IN_SEL_CFG_REG | |
| GPIO_FUNC117_IN_INV_SEL_V | |
| GPIO_FUNC117_IN_INV_SEL_S | |
| GPIO_FUNC117_IN_SEL | |
| GPIO_FUNC117_IN_SEL_V | |
| GPIO_FUNC117_IN_SEL_S | |
| GPIO_FUNC118_IN_SEL_CFG_REG | |
| GPIO_FUNC118_IN_INV_SEL_V | |
| GPIO_FUNC118_IN_INV_SEL_S | |
| GPIO_FUNC118_IN_SEL | |
| GPIO_FUNC118_IN_SEL_V | |
| GPIO_FUNC118_IN_SEL_S | |
| GPIO_FUNC119_IN_SEL_CFG_REG | |
| GPIO_FUNC119_IN_INV_SEL_V | |
| GPIO_FUNC119_IN_INV_SEL_S | |
| GPIO_FUNC119_IN_SEL | |
| GPIO_FUNC119_IN_SEL_V | |
| GPIO_FUNC119_IN_SEL_S | |
| GPIO_FUNC120_IN_SEL_CFG_REG | |
| GPIO_FUNC120_IN_INV_SEL_V | |
| GPIO_FUNC120_IN_INV_SEL_S | |
| GPIO_FUNC120_IN_SEL | |
| GPIO_FUNC120_IN_SEL_V | |
| GPIO_FUNC120_IN_SEL_S | |
| GPIO_FUNC121_IN_SEL_CFG_REG | |
| GPIO_FUNC121_IN_INV_SEL_V | |
| GPIO_FUNC121_IN_INV_SEL_S | |
| GPIO_FUNC121_IN_SEL | |
| GPIO_FUNC121_IN_SEL_V | |
| GPIO_FUNC121_IN_SEL_S | |
| GPIO_FUNC122_IN_SEL_CFG_REG | |
| GPIO_FUNC122_IN_INV_SEL_V | |
| GPIO_FUNC122_IN_INV_SEL_S | |
| GPIO_FUNC122_IN_SEL | |
| GPIO_FUNC122_IN_SEL_V | |
| GPIO_FUNC122_IN_SEL_S | |
| GPIO_FUNC123_IN_SEL_CFG_REG | |
| GPIO_FUNC123_IN_INV_SEL_V | |
| GPIO_FUNC123_IN_INV_SEL_S | |
| GPIO_FUNC123_IN_SEL | |
| GPIO_FUNC123_IN_SEL_V | |
| GPIO_FUNC123_IN_SEL_S | |
| GPIO_FUNC124_IN_SEL_CFG_REG | |
| GPIO_FUNC124_IN_INV_SEL_V | |
| GPIO_FUNC124_IN_INV_SEL_S | |
| GPIO_FUNC124_IN_SEL | |
| GPIO_FUNC124_IN_SEL_V | |
| GPIO_FUNC124_IN_SEL_S | |
| GPIO_FUNC125_IN_SEL_CFG_REG | |
| GPIO_FUNC125_IN_INV_SEL_V | |
| GPIO_FUNC125_IN_INV_SEL_S | |
| GPIO_FUNC125_IN_SEL | |
| GPIO_FUNC125_IN_SEL_V | |
| GPIO_FUNC125_IN_SEL_S | |
| GPIO_FUNC126_IN_SEL_CFG_REG | |
| GPIO_FUNC126_IN_INV_SEL_V | |
| GPIO_FUNC126_IN_INV_SEL_S | |
| GPIO_FUNC126_IN_SEL | |
| GPIO_FUNC126_IN_SEL_V | |
| GPIO_FUNC126_IN_SEL_S | |
| GPIO_FUNC127_IN_SEL_CFG_REG | |
| GPIO_FUNC127_IN_INV_SEL_V | |
| GPIO_FUNC127_IN_INV_SEL_S | |
| GPIO_FUNC127_IN_SEL | |
| GPIO_FUNC127_IN_SEL_V | |
| GPIO_FUNC127_IN_SEL_S | |
| GPIO_FUNC128_IN_SEL_CFG_REG | |
| GPIO_FUNC128_IN_INV_SEL_V | |
| GPIO_FUNC128_IN_INV_SEL_S | |
| GPIO_FUNC128_IN_SEL | |
| GPIO_FUNC128_IN_SEL_V | |
| GPIO_FUNC128_IN_SEL_S | |
| GPIO_FUNC129_IN_SEL_CFG_REG | |
| GPIO_FUNC129_IN_INV_SEL_V | |
| GPIO_FUNC129_IN_INV_SEL_S | |
| GPIO_FUNC129_IN_SEL | |
| GPIO_FUNC129_IN_SEL_V | |
| GPIO_FUNC129_IN_SEL_S | |
| GPIO_FUNC130_IN_SEL_CFG_REG | |
| GPIO_FUNC130_IN_INV_SEL_V | |
| GPIO_FUNC130_IN_INV_SEL_S | |
| GPIO_FUNC130_IN_SEL | |
| GPIO_FUNC130_IN_SEL_V | |
| GPIO_FUNC130_IN_SEL_S | |
| GPIO_FUNC131_IN_SEL_CFG_REG | |
| GPIO_FUNC131_IN_INV_SEL_V | |
| GPIO_FUNC131_IN_INV_SEL_S | |
| GPIO_FUNC131_IN_SEL | |
| GPIO_FUNC131_IN_SEL_V | |
| GPIO_FUNC131_IN_SEL_S | |
| GPIO_FUNC132_IN_SEL_CFG_REG | |
| GPIO_FUNC132_IN_INV_SEL_V | |
| GPIO_FUNC132_IN_INV_SEL_S | |
| GPIO_FUNC132_IN_SEL | |
| GPIO_FUNC132_IN_SEL_V | |
| GPIO_FUNC132_IN_SEL_S | |
| GPIO_FUNC133_IN_SEL_CFG_REG | |
| GPIO_FUNC133_IN_INV_SEL_V | |
| GPIO_FUNC133_IN_INV_SEL_S | |
| GPIO_FUNC133_IN_SEL | |
| GPIO_FUNC133_IN_SEL_V | |
| GPIO_FUNC133_IN_SEL_S | |
| GPIO_FUNC134_IN_SEL_CFG_REG | |
| GPIO_FUNC134_IN_INV_SEL_V | |
| GPIO_FUNC134_IN_INV_SEL_S | |
| GPIO_FUNC134_IN_SEL | |
| GPIO_FUNC134_IN_SEL_V | |
| GPIO_FUNC134_IN_SEL_S | |
| GPIO_FUNC135_IN_SEL_CFG_REG | |
| GPIO_FUNC135_IN_INV_SEL_V | |
| GPIO_FUNC135_IN_INV_SEL_S | |
| GPIO_FUNC135_IN_SEL | |
| GPIO_FUNC135_IN_SEL_V | |
| GPIO_FUNC135_IN_SEL_S | |
| GPIO_FUNC136_IN_SEL_CFG_REG | |
| GPIO_FUNC136_IN_INV_SEL_V | |
| GPIO_FUNC136_IN_INV_SEL_S | |
| GPIO_FUNC136_IN_SEL | |
| GPIO_FUNC136_IN_SEL_V | |
| GPIO_FUNC136_IN_SEL_S | |
| GPIO_FUNC137_IN_SEL_CFG_REG | |
| GPIO_FUNC137_IN_INV_SEL_V | |
| GPIO_FUNC137_IN_INV_SEL_S | |
| GPIO_FUNC137_IN_SEL | |
| GPIO_FUNC137_IN_SEL_V | |
| GPIO_FUNC137_IN_SEL_S | |
| GPIO_FUNC138_IN_SEL_CFG_REG | |
| GPIO_FUNC138_IN_INV_SEL_V | |
| GPIO_FUNC138_IN_INV_SEL_S | |
| GPIO_FUNC138_IN_SEL | |
| GPIO_FUNC138_IN_SEL_V | |
| GPIO_FUNC138_IN_SEL_S | |
| GPIO_FUNC139_IN_SEL_CFG_REG | |
| GPIO_FUNC139_IN_INV_SEL_V | |
| GPIO_FUNC139_IN_INV_SEL_S | |
| GPIO_FUNC139_IN_SEL | |
| GPIO_FUNC139_IN_SEL_V | |
| GPIO_FUNC139_IN_SEL_S | |
| GPIO_FUNC140_IN_SEL_CFG_REG | |
| GPIO_FUNC140_IN_INV_SEL_V | |
| GPIO_FUNC140_IN_INV_SEL_S | |
| GPIO_FUNC140_IN_SEL | |
| GPIO_FUNC140_IN_SEL_V | |
| GPIO_FUNC140_IN_SEL_S | |
| GPIO_FUNC141_IN_SEL_CFG_REG | |
| GPIO_FUNC141_IN_INV_SEL_V | |
| GPIO_FUNC141_IN_INV_SEL_S | |
| GPIO_FUNC141_IN_SEL | |
| GPIO_FUNC141_IN_SEL_V | |
| GPIO_FUNC141_IN_SEL_S | |
| GPIO_FUNC142_IN_SEL_CFG_REG | |
| GPIO_FUNC142_IN_INV_SEL_V | |
| GPIO_FUNC142_IN_INV_SEL_S | |
| GPIO_FUNC142_IN_SEL | |
| GPIO_FUNC142_IN_SEL_V | |
| GPIO_FUNC142_IN_SEL_S | |
| GPIO_FUNC143_IN_SEL_CFG_REG | |
| GPIO_FUNC143_IN_INV_SEL_V | |
| GPIO_FUNC143_IN_INV_SEL_S | |
| GPIO_FUNC143_IN_SEL | |
| GPIO_FUNC143_IN_SEL_V | |
| GPIO_FUNC143_IN_SEL_S | |
| GPIO_FUNC144_IN_SEL_CFG_REG | |
| GPIO_FUNC144_IN_INV_SEL_V | |
| GPIO_FUNC144_IN_INV_SEL_S | |
| GPIO_FUNC144_IN_SEL | |
| GPIO_FUNC144_IN_SEL_V | |
| GPIO_FUNC144_IN_SEL_S | |
| GPIO_FUNC145_IN_SEL_CFG_REG | |
| GPIO_FUNC145_IN_INV_SEL_V | |
| GPIO_FUNC145_IN_INV_SEL_S | |
| GPIO_FUNC145_IN_SEL | |
| GPIO_FUNC145_IN_SEL_V | |
| GPIO_FUNC145_IN_SEL_S | |
| GPIO_FUNC146_IN_SEL_CFG_REG | |
| GPIO_FUNC146_IN_INV_SEL_V | |
| GPIO_FUNC146_IN_INV_SEL_S | |
| GPIO_FUNC146_IN_SEL | |
| GPIO_FUNC146_IN_SEL_V | |
| GPIO_FUNC146_IN_SEL_S | |
| GPIO_FUNC147_IN_SEL_CFG_REG | |
| GPIO_FUNC147_IN_INV_SEL_V | |
| GPIO_FUNC147_IN_INV_SEL_S | |
| GPIO_FUNC147_IN_SEL | |
| GPIO_FUNC147_IN_SEL_V | |
| GPIO_FUNC147_IN_SEL_S | |
| GPIO_FUNC148_IN_SEL_CFG_REG | |
| GPIO_FUNC148_IN_INV_SEL_V | |
| GPIO_FUNC148_IN_INV_SEL_S | |
| GPIO_FUNC148_IN_SEL | |
| GPIO_FUNC148_IN_SEL_V | |
| GPIO_FUNC148_IN_SEL_S | |
| GPIO_FUNC149_IN_SEL_CFG_REG | |
| GPIO_FUNC149_IN_INV_SEL_V | |
| GPIO_FUNC149_IN_INV_SEL_S | |
| GPIO_FUNC149_IN_SEL | |
| GPIO_FUNC149_IN_SEL_V | |
| GPIO_FUNC149_IN_SEL_S | |
| GPIO_FUNC150_IN_SEL_CFG_REG | |
| GPIO_FUNC150_IN_INV_SEL_V | |
| GPIO_FUNC150_IN_INV_SEL_S | |
| GPIO_FUNC150_IN_SEL | |
| GPIO_FUNC150_IN_SEL_V | |
| GPIO_FUNC150_IN_SEL_S | |
| GPIO_FUNC151_IN_SEL_CFG_REG | |
| GPIO_FUNC151_IN_INV_SEL_V | |
| GPIO_FUNC151_IN_INV_SEL_S | |
| GPIO_FUNC151_IN_SEL | |
| GPIO_FUNC151_IN_SEL_V | |
| GPIO_FUNC151_IN_SEL_S | |
| GPIO_FUNC152_IN_SEL_CFG_REG | |
| GPIO_FUNC152_IN_INV_SEL_V | |
| GPIO_FUNC152_IN_INV_SEL_S | |
| GPIO_FUNC152_IN_SEL | |
| GPIO_FUNC152_IN_SEL_V | |
| GPIO_FUNC152_IN_SEL_S | |
| GPIO_FUNC153_IN_SEL_CFG_REG | |
| GPIO_FUNC153_IN_INV_SEL_V | |
| GPIO_FUNC153_IN_INV_SEL_S | |
| GPIO_FUNC153_IN_SEL | |
| GPIO_FUNC153_IN_SEL_V | |
| GPIO_FUNC153_IN_SEL_S | |
| GPIO_FUNC154_IN_SEL_CFG_REG | |
| GPIO_FUNC154_IN_INV_SEL_V | |
| GPIO_FUNC154_IN_INV_SEL_S | |
| GPIO_FUNC154_IN_SEL | |
| GPIO_FUNC154_IN_SEL_V | |
| GPIO_FUNC154_IN_SEL_S | |
| GPIO_FUNC155_IN_SEL_CFG_REG | |
| GPIO_FUNC155_IN_INV_SEL_V | |
| GPIO_FUNC155_IN_INV_SEL_S | |
| GPIO_FUNC155_IN_SEL | |
| GPIO_FUNC155_IN_SEL_V | |
| GPIO_FUNC155_IN_SEL_S | |
| GPIO_FUNC156_IN_SEL_CFG_REG | |
| GPIO_FUNC156_IN_INV_SEL_V | |
| GPIO_FUNC156_IN_INV_SEL_S | |
| GPIO_FUNC156_IN_SEL | |
| GPIO_FUNC156_IN_SEL_V | |
| GPIO_FUNC156_IN_SEL_S | |
| GPIO_FUNC157_IN_SEL_CFG_REG | |
| GPIO_FUNC157_IN_INV_SEL_V | |
| GPIO_FUNC157_IN_INV_SEL_S | |
| GPIO_FUNC157_IN_SEL | |
| GPIO_FUNC157_IN_SEL_V | |
| GPIO_FUNC157_IN_SEL_S | |
| GPIO_FUNC158_IN_SEL_CFG_REG | |
| GPIO_FUNC158_IN_INV_SEL_V | |
| GPIO_FUNC158_IN_INV_SEL_S | |
| GPIO_FUNC158_IN_SEL | |
| GPIO_FUNC158_IN_SEL_V | |
| GPIO_FUNC158_IN_SEL_S | |
| GPIO_FUNC159_IN_SEL_CFG_REG | |
| GPIO_FUNC159_IN_INV_SEL_V | |
| GPIO_FUNC159_IN_INV_SEL_S | |
| GPIO_FUNC159_IN_SEL | |
| GPIO_FUNC159_IN_SEL_V | |
| GPIO_FUNC159_IN_SEL_S | |
| GPIO_FUNC160_IN_SEL_CFG_REG | |
| GPIO_FUNC160_IN_INV_SEL_V | |
| GPIO_FUNC160_IN_INV_SEL_S | |
| GPIO_FUNC160_IN_SEL | |
| GPIO_FUNC160_IN_SEL_V | |
| GPIO_FUNC160_IN_SEL_S | |
| GPIO_FUNC161_IN_SEL_CFG_REG | |
| GPIO_FUNC161_IN_INV_SEL_V | |
| GPIO_FUNC161_IN_INV_SEL_S | |
| GPIO_FUNC161_IN_SEL | |
| GPIO_FUNC161_IN_SEL_V | |
| GPIO_FUNC161_IN_SEL_S | |
| GPIO_FUNC162_IN_SEL_CFG_REG | |
| GPIO_FUNC162_IN_INV_SEL_V | |
| GPIO_FUNC162_IN_INV_SEL_S | |
| GPIO_FUNC162_IN_SEL | |
| GPIO_FUNC162_IN_SEL_V | |
| GPIO_FUNC162_IN_SEL_S | |
| GPIO_FUNC163_IN_SEL_CFG_REG | |
| GPIO_FUNC163_IN_INV_SEL_V | |
| GPIO_FUNC163_IN_INV_SEL_S | |
| GPIO_FUNC163_IN_SEL | |
| GPIO_FUNC163_IN_SEL_V | |
| GPIO_FUNC163_IN_SEL_S | |
| GPIO_FUNC164_IN_SEL_CFG_REG | |
| GPIO_FUNC164_IN_INV_SEL_V | |
| GPIO_FUNC164_IN_INV_SEL_S | |
| GPIO_FUNC164_IN_SEL | |
| GPIO_FUNC164_IN_SEL_V | |
| GPIO_FUNC164_IN_SEL_S | |
| GPIO_FUNC165_IN_SEL_CFG_REG | |
| GPIO_FUNC165_IN_INV_SEL_V | |
| GPIO_FUNC165_IN_INV_SEL_S | |
| GPIO_FUNC165_IN_SEL | |
| GPIO_FUNC165_IN_SEL_V | |
| GPIO_FUNC165_IN_SEL_S | |
| GPIO_FUNC166_IN_SEL_CFG_REG | |
| GPIO_FUNC166_IN_INV_SEL_V | |
| GPIO_FUNC166_IN_INV_SEL_S | |
| GPIO_FUNC166_IN_SEL | |
| GPIO_FUNC166_IN_SEL_V | |
| GPIO_FUNC166_IN_SEL_S | |
| GPIO_FUNC167_IN_SEL_CFG_REG | |
| GPIO_FUNC167_IN_INV_SEL_V | |
| GPIO_FUNC167_IN_INV_SEL_S | |
| GPIO_FUNC167_IN_SEL | |
| GPIO_FUNC167_IN_SEL_V | |
| GPIO_FUNC167_IN_SEL_S | |
| GPIO_FUNC168_IN_SEL_CFG_REG | |
| GPIO_FUNC168_IN_INV_SEL_V | |
| GPIO_FUNC168_IN_INV_SEL_S | |
| GPIO_FUNC168_IN_SEL | |
| GPIO_FUNC168_IN_SEL_V | |
| GPIO_FUNC168_IN_SEL_S | |
| GPIO_FUNC169_IN_SEL_CFG_REG | |
| GPIO_FUNC169_IN_INV_SEL_V | |
| GPIO_FUNC169_IN_INV_SEL_S | |
| GPIO_FUNC169_IN_SEL | |
| GPIO_FUNC169_IN_SEL_V | |
| GPIO_FUNC169_IN_SEL_S | |
| GPIO_FUNC170_IN_SEL_CFG_REG | |
| GPIO_FUNC170_IN_INV_SEL_V | |
| GPIO_FUNC170_IN_INV_SEL_S | |
| GPIO_FUNC170_IN_SEL | |
| GPIO_FUNC170_IN_SEL_V | |
| GPIO_FUNC170_IN_SEL_S | |
| GPIO_FUNC171_IN_SEL_CFG_REG | |
| GPIO_FUNC171_IN_INV_SEL_V | |
| GPIO_FUNC171_IN_INV_SEL_S | |
| GPIO_FUNC171_IN_SEL | |
| GPIO_FUNC171_IN_SEL_V | |
| GPIO_FUNC171_IN_SEL_S | |
| GPIO_FUNC172_IN_SEL_CFG_REG | |
| GPIO_FUNC172_IN_INV_SEL_V | |
| GPIO_FUNC172_IN_INV_SEL_S | |
| GPIO_FUNC172_IN_SEL | |
| GPIO_FUNC172_IN_SEL_V | |
| GPIO_FUNC172_IN_SEL_S | |
| GPIO_FUNC173_IN_SEL_CFG_REG | |
| GPIO_FUNC173_IN_INV_SEL_V | |
| GPIO_FUNC173_IN_INV_SEL_S | |
| GPIO_FUNC173_IN_SEL | |
| GPIO_FUNC173_IN_SEL_V | |
| GPIO_FUNC173_IN_SEL_S | |
| GPIO_FUNC174_IN_SEL_CFG_REG | |
| GPIO_FUNC174_IN_INV_SEL_V | |
| GPIO_FUNC174_IN_INV_SEL_S | |
| GPIO_FUNC174_IN_SEL | |
| GPIO_FUNC174_IN_SEL_V | |
| GPIO_FUNC174_IN_SEL_S | |
| GPIO_FUNC175_IN_SEL_CFG_REG | |
| GPIO_FUNC175_IN_INV_SEL_V | |
| GPIO_FUNC175_IN_INV_SEL_S | |
| GPIO_FUNC175_IN_SEL | |
| GPIO_FUNC175_IN_SEL_V | |
| GPIO_FUNC175_IN_SEL_S | |
| GPIO_FUNC176_IN_SEL_CFG_REG | |
| GPIO_FUNC176_IN_INV_SEL_V | |
| GPIO_FUNC176_IN_INV_SEL_S | |
| GPIO_FUNC176_IN_SEL | |
| GPIO_FUNC176_IN_SEL_V | |
| GPIO_FUNC176_IN_SEL_S | |
| GPIO_FUNC177_IN_SEL_CFG_REG | |
| GPIO_FUNC177_IN_INV_SEL_V | |
| GPIO_FUNC177_IN_INV_SEL_S | |
| GPIO_FUNC177_IN_SEL | |
| GPIO_FUNC177_IN_SEL_V | |
| GPIO_FUNC177_IN_SEL_S | |
| GPIO_FUNC178_IN_SEL_CFG_REG | |
| GPIO_FUNC178_IN_INV_SEL_V | |
| GPIO_FUNC178_IN_INV_SEL_S | |
| GPIO_FUNC178_IN_SEL | |
| GPIO_FUNC178_IN_SEL_V | |
| GPIO_FUNC178_IN_SEL_S | |
| GPIO_FUNC179_IN_SEL_CFG_REG | |
| GPIO_FUNC179_IN_INV_SEL_V | |
| GPIO_FUNC179_IN_INV_SEL_S | |
| GPIO_FUNC179_IN_SEL | |
| GPIO_FUNC179_IN_SEL_V | |
| GPIO_FUNC179_IN_SEL_S | |
| GPIO_FUNC180_IN_SEL_CFG_REG | |
| GPIO_FUNC180_IN_INV_SEL_V | |
| GPIO_FUNC180_IN_INV_SEL_S | |
| GPIO_FUNC180_IN_SEL | |
| GPIO_FUNC180_IN_SEL_V | |
| GPIO_FUNC180_IN_SEL_S | |
| GPIO_FUNC181_IN_SEL_CFG_REG | |
| GPIO_FUNC181_IN_INV_SEL_V | |
| GPIO_FUNC181_IN_INV_SEL_S | |
| GPIO_FUNC181_IN_SEL | |
| GPIO_FUNC181_IN_SEL_V | |
| GPIO_FUNC181_IN_SEL_S | |
| GPIO_FUNC182_IN_SEL_CFG_REG | |
| GPIO_FUNC182_IN_INV_SEL_V | |
| GPIO_FUNC182_IN_INV_SEL_S | |
| GPIO_FUNC182_IN_SEL | |
| GPIO_FUNC182_IN_SEL_V | |
| GPIO_FUNC182_IN_SEL_S | |
| GPIO_FUNC183_IN_SEL_CFG_REG | |
| GPIO_FUNC183_IN_INV_SEL_V | |
| GPIO_FUNC183_IN_INV_SEL_S | |
| GPIO_FUNC183_IN_SEL | |
| GPIO_FUNC183_IN_SEL_V | |
| GPIO_FUNC183_IN_SEL_S | |
| GPIO_FUNC184_IN_SEL_CFG_REG | |
| GPIO_FUNC184_IN_INV_SEL_V | |
| GPIO_FUNC184_IN_INV_SEL_S | |
| GPIO_FUNC184_IN_SEL | |
| GPIO_FUNC184_IN_SEL_V | |
| GPIO_FUNC184_IN_SEL_S | |
| GPIO_FUNC185_IN_SEL_CFG_REG | |
| GPIO_FUNC185_IN_INV_SEL_V | |
| GPIO_FUNC185_IN_INV_SEL_S | |
| GPIO_FUNC185_IN_SEL | |
| GPIO_FUNC185_IN_SEL_V | |
| GPIO_FUNC185_IN_SEL_S | |
| GPIO_FUNC186_IN_SEL_CFG_REG | |
| GPIO_FUNC186_IN_INV_SEL_V | |
| GPIO_FUNC186_IN_INV_SEL_S | |
| GPIO_FUNC186_IN_SEL | |
| GPIO_FUNC186_IN_SEL_V | |
| GPIO_FUNC186_IN_SEL_S | |
| GPIO_FUNC187_IN_SEL_CFG_REG | |
| GPIO_FUNC187_IN_INV_SEL_V | |
| GPIO_FUNC187_IN_INV_SEL_S | |
| GPIO_FUNC187_IN_SEL | |
| GPIO_FUNC187_IN_SEL_V | |
| GPIO_FUNC187_IN_SEL_S | |
| GPIO_FUNC188_IN_SEL_CFG_REG | |
| GPIO_FUNC188_IN_INV_SEL_V | |
| GPIO_FUNC188_IN_INV_SEL_S | |
| GPIO_FUNC188_IN_SEL | |
| GPIO_FUNC188_IN_SEL_V | |
| GPIO_FUNC188_IN_SEL_S | |
| GPIO_FUNC189_IN_SEL_CFG_REG | |
| GPIO_FUNC189_IN_INV_SEL_V | |
| GPIO_FUNC189_IN_INV_SEL_S | |
| GPIO_FUNC189_IN_SEL | |
| GPIO_FUNC189_IN_SEL_V | |
| GPIO_FUNC189_IN_SEL_S | |
| GPIO_FUNC190_IN_SEL_CFG_REG | |
| GPIO_FUNC190_IN_INV_SEL_V | |
| GPIO_FUNC190_IN_INV_SEL_S | |
| GPIO_FUNC190_IN_SEL | |
| GPIO_FUNC190_IN_SEL_V | |
| GPIO_FUNC190_IN_SEL_S | |
| GPIO_FUNC191_IN_SEL_CFG_REG | |
| GPIO_FUNC191_IN_INV_SEL_V | |
| GPIO_FUNC191_IN_INV_SEL_S | |
| GPIO_FUNC191_IN_SEL | |
| GPIO_FUNC191_IN_SEL_V | |
| GPIO_FUNC191_IN_SEL_S | |
| GPIO_FUNC192_IN_SEL_CFG_REG | |
| GPIO_FUNC192_IN_INV_SEL_V | |
| GPIO_FUNC192_IN_INV_SEL_S | |
| GPIO_FUNC192_IN_SEL | |
| GPIO_FUNC192_IN_SEL_V | |
| GPIO_FUNC192_IN_SEL_S | |
| GPIO_FUNC193_IN_SEL_CFG_REG | |
| GPIO_FUNC193_IN_INV_SEL_V | |
| GPIO_FUNC193_IN_INV_SEL_S | |
| GPIO_FUNC193_IN_SEL | |
| GPIO_FUNC193_IN_SEL_V | |
| GPIO_FUNC193_IN_SEL_S | |
| GPIO_FUNC194_IN_SEL_CFG_REG | |
| GPIO_FUNC194_IN_INV_SEL_V | |
| GPIO_FUNC194_IN_INV_SEL_S | |
| GPIO_FUNC194_IN_SEL | |
| GPIO_FUNC194_IN_SEL_V | |
| GPIO_FUNC194_IN_SEL_S | |
| GPIO_FUNC195_IN_SEL_CFG_REG | |
| GPIO_FUNC195_IN_INV_SEL_V | |
| GPIO_FUNC195_IN_INV_SEL_S | |
| GPIO_FUNC195_IN_SEL | |
| GPIO_FUNC195_IN_SEL_V | |
| GPIO_FUNC195_IN_SEL_S | |
| GPIO_FUNC196_IN_SEL_CFG_REG | |
| GPIO_FUNC196_IN_INV_SEL_V | |
| GPIO_FUNC196_IN_INV_SEL_S | |
| GPIO_FUNC196_IN_SEL | |
| GPIO_FUNC196_IN_SEL_V | |
| GPIO_FUNC196_IN_SEL_S | |
| GPIO_FUNC197_IN_SEL_CFG_REG | |
| GPIO_FUNC197_IN_INV_SEL_V | |
| GPIO_FUNC197_IN_INV_SEL_S | |
| GPIO_FUNC197_IN_SEL | |
| GPIO_FUNC197_IN_SEL_V | |
| GPIO_FUNC197_IN_SEL_S | |
| GPIO_FUNC198_IN_SEL_CFG_REG | |
| GPIO_FUNC198_IN_INV_SEL_V | |
| GPIO_FUNC198_IN_INV_SEL_S | |
| GPIO_FUNC198_IN_SEL | |
| GPIO_FUNC198_IN_SEL_V | |
| GPIO_FUNC198_IN_SEL_S | |
| GPIO_FUNC199_IN_SEL_CFG_REG | |
| GPIO_FUNC199_IN_INV_SEL_V | |
| GPIO_FUNC199_IN_INV_SEL_S | |
| GPIO_FUNC199_IN_SEL | |
| GPIO_FUNC199_IN_SEL_V | |
| GPIO_FUNC199_IN_SEL_S | |
| GPIO_FUNC200_IN_SEL_CFG_REG | |
| GPIO_FUNC200_IN_INV_SEL_V | |
| GPIO_FUNC200_IN_INV_SEL_S | |
| GPIO_FUNC200_IN_SEL | |
| GPIO_FUNC200_IN_SEL_V | |
| GPIO_FUNC200_IN_SEL_S | |
| GPIO_FUNC201_IN_SEL_CFG_REG | |
| GPIO_FUNC201_IN_INV_SEL_V | |
| GPIO_FUNC201_IN_INV_SEL_S | |
| GPIO_FUNC201_IN_SEL | |
| GPIO_FUNC201_IN_SEL_V | |
| GPIO_FUNC201_IN_SEL_S | |
| GPIO_FUNC202_IN_SEL_CFG_REG | |
| GPIO_FUNC202_IN_INV_SEL_V | |
| GPIO_FUNC202_IN_INV_SEL_S | |
| GPIO_FUNC202_IN_SEL | |
| GPIO_FUNC202_IN_SEL_V | |
| GPIO_FUNC202_IN_SEL_S | |
| GPIO_FUNC203_IN_SEL_CFG_REG | |
| GPIO_FUNC203_IN_INV_SEL_V | |
| GPIO_FUNC203_IN_INV_SEL_S | |
| GPIO_FUNC203_IN_SEL | |
| GPIO_FUNC203_IN_SEL_V | |
| GPIO_FUNC203_IN_SEL_S | |
| GPIO_FUNC204_IN_SEL_CFG_REG | |
| GPIO_FUNC204_IN_INV_SEL_V | |
| GPIO_FUNC204_IN_INV_SEL_S | |
| GPIO_FUNC204_IN_SEL | |
| GPIO_FUNC204_IN_SEL_V | |
| GPIO_FUNC204_IN_SEL_S | |
| GPIO_FUNC205_IN_SEL_CFG_REG | |
| GPIO_FUNC205_IN_INV_SEL_V | |
| GPIO_FUNC205_IN_INV_SEL_S | |
| GPIO_FUNC205_IN_SEL | |
| GPIO_FUNC205_IN_SEL_V | |
| GPIO_FUNC205_IN_SEL_S | |
| GPIO_FUNC206_IN_SEL_CFG_REG | |
| GPIO_FUNC206_IN_INV_SEL_V | |
| GPIO_FUNC206_IN_INV_SEL_S | |
| GPIO_FUNC206_IN_SEL | |
| GPIO_FUNC206_IN_SEL_V | |
| GPIO_FUNC206_IN_SEL_S | |
| GPIO_FUNC207_IN_SEL_CFG_REG | |
| GPIO_FUNC207_IN_INV_SEL_V | |
| GPIO_FUNC207_IN_INV_SEL_S | |
| GPIO_FUNC207_IN_SEL | |
| GPIO_FUNC207_IN_SEL_V | |
| GPIO_FUNC207_IN_SEL_S | |
| GPIO_FUNC208_IN_SEL_CFG_REG | |
| GPIO_FUNC208_IN_INV_SEL_V | |
| GPIO_FUNC208_IN_INV_SEL_S | |
| GPIO_FUNC208_IN_SEL | |
| GPIO_FUNC208_IN_SEL_V | |
| GPIO_FUNC208_IN_SEL_S | |
| GPIO_FUNC209_IN_SEL_CFG_REG | |
| GPIO_FUNC209_IN_INV_SEL_V | |
| GPIO_FUNC209_IN_INV_SEL_S | |
| GPIO_FUNC209_IN_SEL | |
| GPIO_FUNC209_IN_SEL_V | |
| GPIO_FUNC209_IN_SEL_S | |
| GPIO_FUNC210_IN_SEL_CFG_REG | |
| GPIO_FUNC210_IN_INV_SEL_V | |
| GPIO_FUNC210_IN_INV_SEL_S | |
| GPIO_FUNC210_IN_SEL | |
| GPIO_FUNC210_IN_SEL_V | |
| GPIO_FUNC210_IN_SEL_S | |
| GPIO_FUNC211_IN_SEL_CFG_REG | |
| GPIO_FUNC211_IN_INV_SEL_V | |
| GPIO_FUNC211_IN_INV_SEL_S | |
| GPIO_FUNC211_IN_SEL | |
| GPIO_FUNC211_IN_SEL_V | |
| GPIO_FUNC211_IN_SEL_S | |
| GPIO_FUNC212_IN_SEL_CFG_REG | |
| GPIO_FUNC212_IN_INV_SEL_V | |
| GPIO_FUNC212_IN_INV_SEL_S | |
| GPIO_FUNC212_IN_SEL | |
| GPIO_FUNC212_IN_SEL_V | |
| GPIO_FUNC212_IN_SEL_S | |
| GPIO_FUNC213_IN_SEL_CFG_REG | |
| GPIO_FUNC213_IN_INV_SEL_V | |
| GPIO_FUNC213_IN_INV_SEL_S | |
| GPIO_FUNC213_IN_SEL | |
| GPIO_FUNC213_IN_SEL_V | |
| GPIO_FUNC213_IN_SEL_S | |
| GPIO_FUNC214_IN_SEL_CFG_REG | |
| GPIO_FUNC214_IN_INV_SEL_V | |
| GPIO_FUNC214_IN_INV_SEL_S | |
| GPIO_FUNC214_IN_SEL | |
| GPIO_FUNC214_IN_SEL_V | |
| GPIO_FUNC214_IN_SEL_S | |
| GPIO_FUNC215_IN_SEL_CFG_REG | |
| GPIO_FUNC215_IN_INV_SEL_V | |
| GPIO_FUNC215_IN_INV_SEL_S | |
| GPIO_FUNC215_IN_SEL | |
| GPIO_FUNC215_IN_SEL_V | |
| GPIO_FUNC215_IN_SEL_S | |
| GPIO_FUNC216_IN_SEL_CFG_REG | |
| GPIO_FUNC216_IN_INV_SEL_V | |
| GPIO_FUNC216_IN_INV_SEL_S | |
| GPIO_FUNC216_IN_SEL | |
| GPIO_FUNC216_IN_SEL_V | |
| GPIO_FUNC216_IN_SEL_S | |
| GPIO_FUNC217_IN_SEL_CFG_REG | |
| GPIO_FUNC217_IN_INV_SEL_V | |
| GPIO_FUNC217_IN_INV_SEL_S | |
| GPIO_FUNC217_IN_SEL | |
| GPIO_FUNC217_IN_SEL_V | |
| GPIO_FUNC217_IN_SEL_S | |
| GPIO_FUNC218_IN_SEL_CFG_REG | |
| GPIO_FUNC218_IN_INV_SEL_V | |
| GPIO_FUNC218_IN_INV_SEL_S | |
| GPIO_FUNC218_IN_SEL | |
| GPIO_FUNC218_IN_SEL_V | |
| GPIO_FUNC218_IN_SEL_S | |
| GPIO_FUNC219_IN_SEL_CFG_REG | |
| GPIO_FUNC219_IN_INV_SEL_V | |
| GPIO_FUNC219_IN_INV_SEL_S | |
| GPIO_FUNC219_IN_SEL | |
| GPIO_FUNC219_IN_SEL_V | |
| GPIO_FUNC219_IN_SEL_S | |
| GPIO_FUNC220_IN_SEL_CFG_REG | |
| GPIO_FUNC220_IN_INV_SEL_V | |
| GPIO_FUNC220_IN_INV_SEL_S | |
| GPIO_FUNC220_IN_SEL | |
| GPIO_FUNC220_IN_SEL_V | |
| GPIO_FUNC220_IN_SEL_S | |
| GPIO_FUNC221_IN_SEL_CFG_REG | |
| GPIO_FUNC221_IN_INV_SEL_V | |
| GPIO_FUNC221_IN_INV_SEL_S | |
| GPIO_FUNC221_IN_SEL | |
| GPIO_FUNC221_IN_SEL_V | |
| GPIO_FUNC221_IN_SEL_S | |
| GPIO_FUNC222_IN_SEL_CFG_REG | |
| GPIO_FUNC222_IN_INV_SEL_V | |
| GPIO_FUNC222_IN_INV_SEL_S | |
| GPIO_FUNC222_IN_SEL | |
| GPIO_FUNC222_IN_SEL_V | |
| GPIO_FUNC222_IN_SEL_S | |
| GPIO_FUNC223_IN_SEL_CFG_REG | |
| GPIO_FUNC223_IN_INV_SEL_V | |
| GPIO_FUNC223_IN_INV_SEL_S | |
| GPIO_FUNC223_IN_SEL | |
| GPIO_FUNC223_IN_SEL_V | |
| GPIO_FUNC223_IN_SEL_S | |
| GPIO_FUNC224_IN_SEL_CFG_REG | |
| GPIO_FUNC224_IN_INV_SEL_V | |
| GPIO_FUNC224_IN_INV_SEL_S | |
| GPIO_FUNC224_IN_SEL | |
| GPIO_FUNC224_IN_SEL_V | |
| GPIO_FUNC224_IN_SEL_S | |
| GPIO_FUNC225_IN_SEL_CFG_REG | |
| GPIO_FUNC225_IN_INV_SEL_V | |
| GPIO_FUNC225_IN_INV_SEL_S | |
| GPIO_FUNC225_IN_SEL | |
| GPIO_FUNC225_IN_SEL_V | |
| GPIO_FUNC225_IN_SEL_S | |
| GPIO_FUNC226_IN_SEL_CFG_REG | |
| GPIO_FUNC226_IN_INV_SEL_V | |
| GPIO_FUNC226_IN_INV_SEL_S | |
| GPIO_FUNC226_IN_SEL | |
| GPIO_FUNC226_IN_SEL_V | |
| GPIO_FUNC226_IN_SEL_S | |
| GPIO_FUNC227_IN_SEL_CFG_REG | |
| GPIO_FUNC227_IN_INV_SEL_V | |
| GPIO_FUNC227_IN_INV_SEL_S | |
| GPIO_FUNC227_IN_SEL | |
| GPIO_FUNC227_IN_SEL_V | |
| GPIO_FUNC227_IN_SEL_S | |
| GPIO_FUNC228_IN_SEL_CFG_REG | |
| GPIO_FUNC228_IN_INV_SEL_V | |
| GPIO_FUNC228_IN_INV_SEL_S | |
| GPIO_FUNC228_IN_SEL | |
| GPIO_FUNC228_IN_SEL_V | |
| GPIO_FUNC228_IN_SEL_S | |
| GPIO_FUNC229_IN_SEL_CFG_REG | |
| GPIO_FUNC229_IN_INV_SEL_V | |
| GPIO_FUNC229_IN_INV_SEL_S | |
| GPIO_FUNC229_IN_SEL | |
| GPIO_FUNC229_IN_SEL_V | |
| GPIO_FUNC229_IN_SEL_S | |
| GPIO_FUNC230_IN_SEL_CFG_REG | |
| GPIO_FUNC230_IN_INV_SEL_V | |
| GPIO_FUNC230_IN_INV_SEL_S | |
| GPIO_FUNC230_IN_SEL | |
| GPIO_FUNC230_IN_SEL_V | |
| GPIO_FUNC230_IN_SEL_S | |
| GPIO_FUNC231_IN_SEL_CFG_REG | |
| GPIO_FUNC231_IN_INV_SEL_V | |
| GPIO_FUNC231_IN_INV_SEL_S | |
| GPIO_FUNC231_IN_SEL | |
| GPIO_FUNC231_IN_SEL_V | |
| GPIO_FUNC231_IN_SEL_S | |
| GPIO_FUNC232_IN_SEL_CFG_REG | |
| GPIO_FUNC232_IN_INV_SEL_V | |
| GPIO_FUNC232_IN_INV_SEL_S | |
| GPIO_FUNC232_IN_SEL | |
| GPIO_FUNC232_IN_SEL_V | |
| GPIO_FUNC232_IN_SEL_S | |
| GPIO_FUNC233_IN_SEL_CFG_REG | |
| GPIO_FUNC233_IN_INV_SEL_V | |
| GPIO_FUNC233_IN_INV_SEL_S | |
| GPIO_FUNC233_IN_SEL | |
| GPIO_FUNC233_IN_SEL_V | |
| GPIO_FUNC233_IN_SEL_S | |
| GPIO_FUNC234_IN_SEL_CFG_REG | |
| GPIO_FUNC234_IN_INV_SEL_V | |
| GPIO_FUNC234_IN_INV_SEL_S | |
| GPIO_FUNC234_IN_SEL | |
| GPIO_FUNC234_IN_SEL_V | |
| GPIO_FUNC234_IN_SEL_S | |
| GPIO_FUNC235_IN_SEL_CFG_REG | |
| GPIO_FUNC235_IN_INV_SEL_V | |
| GPIO_FUNC235_IN_INV_SEL_S | |
| GPIO_FUNC235_IN_SEL | |
| GPIO_FUNC235_IN_SEL_V | |
| GPIO_FUNC235_IN_SEL_S | |
| GPIO_FUNC236_IN_SEL_CFG_REG | |
| GPIO_FUNC236_IN_INV_SEL_V | |
| GPIO_FUNC236_IN_INV_SEL_S | |
| GPIO_FUNC236_IN_SEL | |
| GPIO_FUNC236_IN_SEL_V | |
| GPIO_FUNC236_IN_SEL_S | |
| GPIO_FUNC237_IN_SEL_CFG_REG | |
| GPIO_FUNC237_IN_INV_SEL_V | |
| GPIO_FUNC237_IN_INV_SEL_S | |
| GPIO_FUNC237_IN_SEL | |
| GPIO_FUNC237_IN_SEL_V | |
| GPIO_FUNC237_IN_SEL_S | |
| GPIO_FUNC238_IN_SEL_CFG_REG | |
| GPIO_FUNC238_IN_INV_SEL_V | |
| GPIO_FUNC238_IN_INV_SEL_S | |
| GPIO_FUNC238_IN_SEL | |
| GPIO_FUNC238_IN_SEL_V | |
| GPIO_FUNC238_IN_SEL_S | |
| GPIO_FUNC239_IN_SEL_CFG_REG | |
| GPIO_FUNC239_IN_INV_SEL_V | |
| GPIO_FUNC239_IN_INV_SEL_S | |
| GPIO_FUNC239_IN_SEL | |
| GPIO_FUNC239_IN_SEL_V | |
| GPIO_FUNC239_IN_SEL_S | |
| GPIO_FUNC240_IN_SEL_CFG_REG | |
| GPIO_FUNC240_IN_INV_SEL_V | |
| GPIO_FUNC240_IN_INV_SEL_S | |
| GPIO_FUNC240_IN_SEL | |
| GPIO_FUNC240_IN_SEL_V | |
| GPIO_FUNC240_IN_SEL_S | |
| GPIO_FUNC241_IN_SEL_CFG_REG | |
| GPIO_FUNC241_IN_INV_SEL_V | |
| GPIO_FUNC241_IN_INV_SEL_S | |
| GPIO_FUNC241_IN_SEL | |
| GPIO_FUNC241_IN_SEL_V | |
| GPIO_FUNC241_IN_SEL_S | |
| GPIO_FUNC242_IN_SEL_CFG_REG | |
| GPIO_FUNC242_IN_INV_SEL_V | |
| GPIO_FUNC242_IN_INV_SEL_S | |
| GPIO_FUNC242_IN_SEL | |
| GPIO_FUNC242_IN_SEL_V | |
| GPIO_FUNC242_IN_SEL_S | |
| GPIO_FUNC243_IN_SEL_CFG_REG | |
| GPIO_FUNC243_IN_INV_SEL_V | |
| GPIO_FUNC243_IN_INV_SEL_S | |
| GPIO_FUNC243_IN_SEL | |
| GPIO_FUNC243_IN_SEL_V | |
| GPIO_FUNC243_IN_SEL_S | |
| GPIO_FUNC244_IN_SEL_CFG_REG | |
| GPIO_FUNC244_IN_INV_SEL_V | |
| GPIO_FUNC244_IN_INV_SEL_S | |
| GPIO_FUNC244_IN_SEL | |
| GPIO_FUNC244_IN_SEL_V | |
| GPIO_FUNC244_IN_SEL_S | |
| GPIO_FUNC245_IN_SEL_CFG_REG | |
| GPIO_FUNC245_IN_INV_SEL_V | |
| GPIO_FUNC245_IN_INV_SEL_S | |
| GPIO_FUNC245_IN_SEL | |
| GPIO_FUNC245_IN_SEL_V | |
| GPIO_FUNC245_IN_SEL_S | |
| GPIO_FUNC246_IN_SEL_CFG_REG | |
| GPIO_FUNC246_IN_INV_SEL_V | |
| GPIO_FUNC246_IN_INV_SEL_S | |
| GPIO_FUNC246_IN_SEL | |
| GPIO_FUNC246_IN_SEL_V | |
| GPIO_FUNC246_IN_SEL_S | |
| GPIO_FUNC247_IN_SEL_CFG_REG | |
| GPIO_FUNC247_IN_INV_SEL_V | |
| GPIO_FUNC247_IN_INV_SEL_S | |
| GPIO_FUNC247_IN_SEL | |
| GPIO_FUNC247_IN_SEL_V | |
| GPIO_FUNC247_IN_SEL_S | |
| GPIO_FUNC248_IN_SEL_CFG_REG | |
| GPIO_FUNC248_IN_INV_SEL_V | |
| GPIO_FUNC248_IN_INV_SEL_S | |
| GPIO_FUNC248_IN_SEL | |
| GPIO_FUNC248_IN_SEL_V | |
| GPIO_FUNC248_IN_SEL_S | |
| GPIO_FUNC249_IN_SEL_CFG_REG | |
| GPIO_FUNC249_IN_INV_SEL_V | |
| GPIO_FUNC249_IN_INV_SEL_S | |
| GPIO_FUNC249_IN_SEL | |
| GPIO_FUNC249_IN_SEL_V | |
| GPIO_FUNC249_IN_SEL_S | |
| GPIO_FUNC250_IN_SEL_CFG_REG | |
| GPIO_FUNC250_IN_INV_SEL_V | |
| GPIO_FUNC250_IN_INV_SEL_S | |
| GPIO_FUNC250_IN_SEL | |
| GPIO_FUNC250_IN_SEL_V | |
| GPIO_FUNC250_IN_SEL_S | |
| GPIO_FUNC251_IN_SEL_CFG_REG | |
| GPIO_FUNC251_IN_INV_SEL_V | |
| GPIO_FUNC251_IN_INV_SEL_S | |
| GPIO_FUNC251_IN_SEL | |
| GPIO_FUNC251_IN_SEL_V | |
| GPIO_FUNC251_IN_SEL_S | |
| GPIO_FUNC252_IN_SEL_CFG_REG | |
| GPIO_FUNC252_IN_INV_SEL_V | |
| GPIO_FUNC252_IN_INV_SEL_S | |
| GPIO_FUNC252_IN_SEL | |
| GPIO_FUNC252_IN_SEL_V | |
| GPIO_FUNC252_IN_SEL_S | |
| GPIO_FUNC253_IN_SEL_CFG_REG | |
| GPIO_FUNC253_IN_INV_SEL_V | |
| GPIO_FUNC253_IN_INV_SEL_S | |
| GPIO_FUNC253_IN_SEL | |
| GPIO_FUNC253_IN_SEL_V | |
| GPIO_FUNC253_IN_SEL_S | |
| GPIO_FUNC254_IN_SEL_CFG_REG | |
| GPIO_FUNC254_IN_INV_SEL_V | |
| GPIO_FUNC254_IN_INV_SEL_S | |
| GPIO_FUNC254_IN_SEL | |
| GPIO_FUNC254_IN_SEL_V | |
| GPIO_FUNC254_IN_SEL_S | |
| GPIO_FUNC255_IN_SEL_CFG_REG | |
| GPIO_FUNC255_IN_INV_SEL_V | |
| GPIO_FUNC255_IN_INV_SEL_S | |
| GPIO_FUNC255_IN_SEL | |
| GPIO_FUNC255_IN_SEL_V | |
| GPIO_FUNC255_IN_SEL_S | |
| GPIO_FUNC_IN_HIGH | |
| GPIO_FUNC_IN_LOW | |
| GPIO_ID_PIN0 | |
| GPIO_IN1_REG | |
| GPIO_IN1_DATA | |
| GPIO_IN1_DATA_V | |
| GPIO_IN1_DATA_S | |
| GPIO_INT_TYPE_GPIO_PIN_INTR_ANYEDGE | |
| GPIO_INT_TYPE_GPIO_PIN_INTR_DISABLE | |
| GPIO_INT_TYPE_GPIO_PIN_INTR_HILEVEL | |
| GPIO_INT_TYPE_GPIO_PIN_INTR_LOLEVEL | |
| GPIO_INT_TYPE_GPIO_PIN_INTR_NEGEDGE | |
| GPIO_INT_TYPE_GPIO_PIN_INTR_POSEDGE | |
| GPIO_IN_DATA | |
| GPIO_IN_DATA_S | |
| GPIO_IN_DATA_V | |
| GPIO_IN_REG | |
| GPIO_MODE_DEF_DISABLE | |
| GPIO_MODE_DEF_INPUT | |
| GPIO_MODE_DEF_OD | |
| GPIO_MODE_DEF_OUTPUT | |
| GPIO_OUT1_REG | |
| GPIO_OUT1_DATA | |
| GPIO_OUT1_DATA_V | |
| GPIO_OUT1_DATA_S | |
| GPIO_OUT1_DATA_W1TS | |
| GPIO_OUT1_DATA_W1TS_V | |
| GPIO_OUT1_DATA_W1TS_S | |
| GPIO_OUT1_DATA_W1TC | |
| GPIO_OUT1_DATA_W1TC_V | |
| GPIO_OUT1_DATA_W1TC_S | |
| GPIO_OUT1_W1TS_REG | |
| GPIO_OUT1_W1TC_REG | |
| GPIO_OUT_DATA | |
| GPIO_OUT_DATA_S | |
| GPIO_OUT_DATA_V | |
| GPIO_OUT_DATA_W1TS | |
| GPIO_OUT_DATA_W1TS_V | |
| GPIO_OUT_DATA_W1TS_S | |
| GPIO_OUT_DATA_W1TC | |
| GPIO_OUT_DATA_W1TC_V | |
| GPIO_OUT_DATA_W1TC_S | |
| GPIO_OUT_REG | |
| GPIO_OUT_W1TS_REG | |
| GPIO_OUT_W1TC_REG | |
| GPIO_PCPU_INT1_REG | |
| GPIO_PCPU_INT_REG | |
| GPIO_PCPU_NMI_INT1_REG | |
| GPIO_PCPU_NMI_INT_REG | |
| GPIO_PIN0_REG | |
| GPIO_PIN0_CONFIG | |
| GPIO_PIN0_INT_ENA | |
| GPIO_PIN0_CONFIG_V | |
| GPIO_PIN0_CONFIG_S | |
| GPIO_PIN0_INT_TYPE | |
| GPIO_PIN0_INT_ENA_V | |
| GPIO_PIN0_INT_ENA_S | |
| GPIO_PIN0_INT_TYPE_V | |
| GPIO_PIN0_INT_TYPE_S | |
| GPIO_PIN0_PAD_DRIVER_V | |
| GPIO_PIN0_PAD_DRIVER_S | |
| GPIO_PIN0_WAKEUP_ENABLE_V | |
| GPIO_PIN0_WAKEUP_ENABLE_S | |
| GPIO_PIN1_REG | |
| GPIO_PIN1_INT_ENA | |
| GPIO_PIN1_INT_ENA_V | |
| GPIO_PIN1_INT_ENA_S | |
| GPIO_PIN1_CONFIG | |
| GPIO_PIN1_CONFIG_V | |
| GPIO_PIN1_CONFIG_S | |
| GPIO_PIN1_WAKEUP_ENABLE_V | |
| GPIO_PIN1_WAKEUP_ENABLE_S | |
| GPIO_PIN1_INT_TYPE | |
| GPIO_PIN1_INT_TYPE_V | |
| GPIO_PIN1_INT_TYPE_S | |
| GPIO_PIN1_PAD_DRIVER_V | |
| GPIO_PIN1_PAD_DRIVER_S | |
| GPIO_PIN2_REG | |
| GPIO_PIN2_INT_ENA | |
| GPIO_PIN2_INT_ENA_V | |
| GPIO_PIN2_INT_ENA_S | |
| GPIO_PIN2_CONFIG | |
| GPIO_PIN2_CONFIG_V | |
| GPIO_PIN2_CONFIG_S | |
| GPIO_PIN2_WAKEUP_ENABLE_V | |
| GPIO_PIN2_WAKEUP_ENABLE_S | |
| GPIO_PIN2_INT_TYPE | |
| GPIO_PIN2_INT_TYPE_V | |
| GPIO_PIN2_INT_TYPE_S | |
| GPIO_PIN2_PAD_DRIVER_V | |
| GPIO_PIN2_PAD_DRIVER_S | |
| GPIO_PIN3_REG | |
| GPIO_PIN3_INT_ENA | |
| GPIO_PIN3_INT_ENA_V | |
| GPIO_PIN3_INT_ENA_S | |
| GPIO_PIN3_CONFIG | |
| GPIO_PIN3_CONFIG_V | |
| GPIO_PIN3_CONFIG_S | |
| GPIO_PIN3_WAKEUP_ENABLE_V | |
| GPIO_PIN3_WAKEUP_ENABLE_S | |
| GPIO_PIN3_INT_TYPE | |
| GPIO_PIN3_INT_TYPE_V | |
| GPIO_PIN3_INT_TYPE_S | |
| GPIO_PIN3_PAD_DRIVER_V | |
| GPIO_PIN3_PAD_DRIVER_S | |
| GPIO_PIN4_REG | |
| GPIO_PIN4_INT_ENA | |
| GPIO_PIN4_INT_ENA_V | |
| GPIO_PIN4_INT_ENA_S | |
| GPIO_PIN4_CONFIG | |
| GPIO_PIN4_CONFIG_V | |
| GPIO_PIN4_CONFIG_S | |
| GPIO_PIN4_WAKEUP_ENABLE_V | |
| GPIO_PIN4_WAKEUP_ENABLE_S | |
| GPIO_PIN4_INT_TYPE | |
| GPIO_PIN4_INT_TYPE_V | |
| GPIO_PIN4_INT_TYPE_S | |
| GPIO_PIN4_PAD_DRIVER_V | |
| GPIO_PIN4_PAD_DRIVER_S | |
| GPIO_PIN5_REG | |
| GPIO_PIN5_INT_ENA | |
| GPIO_PIN5_INT_ENA_V | |
| GPIO_PIN5_INT_ENA_S | |
| GPIO_PIN5_CONFIG | |
| GPIO_PIN5_CONFIG_V | |
| GPIO_PIN5_CONFIG_S | |
| GPIO_PIN5_WAKEUP_ENABLE_V | |
| GPIO_PIN5_WAKEUP_ENABLE_S | |
| GPIO_PIN5_INT_TYPE | |
| GPIO_PIN5_INT_TYPE_V | |
| GPIO_PIN5_INT_TYPE_S | |
| GPIO_PIN5_PAD_DRIVER_V | |
| GPIO_PIN5_PAD_DRIVER_S | |
| GPIO_PIN6_REG | |
| GPIO_PIN6_INT_ENA | |
| GPIO_PIN6_INT_ENA_V | |
| GPIO_PIN6_INT_ENA_S | |
| GPIO_PIN6_CONFIG | |
| GPIO_PIN6_CONFIG_V | |
| GPIO_PIN6_CONFIG_S | |
| GPIO_PIN6_WAKEUP_ENABLE_V | |
| GPIO_PIN6_WAKEUP_ENABLE_S | |
| GPIO_PIN6_INT_TYPE | |
| GPIO_PIN6_INT_TYPE_V | |
| GPIO_PIN6_INT_TYPE_S | |
| GPIO_PIN6_PAD_DRIVER_V | |
| GPIO_PIN6_PAD_DRIVER_S | |
| GPIO_PIN7_REG | |
| GPIO_PIN7_INT_ENA | |
| GPIO_PIN7_INT_ENA_V | |
| GPIO_PIN7_INT_ENA_S | |
| GPIO_PIN7_CONFIG | |
| GPIO_PIN7_CONFIG_V | |
| GPIO_PIN7_CONFIG_S | |
| GPIO_PIN7_WAKEUP_ENABLE_V | |
| GPIO_PIN7_WAKEUP_ENABLE_S | |
| GPIO_PIN7_INT_TYPE | |
| GPIO_PIN7_INT_TYPE_V | |
| GPIO_PIN7_INT_TYPE_S | |
| GPIO_PIN7_PAD_DRIVER_V | |
| GPIO_PIN7_PAD_DRIVER_S | |
| GPIO_PIN8_REG | |
| GPIO_PIN8_INT_ENA | |
| GPIO_PIN8_INT_ENA_V | |
| GPIO_PIN8_INT_ENA_S | |
| GPIO_PIN8_CONFIG | |
| GPIO_PIN8_CONFIG_V | |
| GPIO_PIN8_CONFIG_S | |
| GPIO_PIN8_WAKEUP_ENABLE_V | |
| GPIO_PIN8_WAKEUP_ENABLE_S | |
| GPIO_PIN8_INT_TYPE | |
| GPIO_PIN8_INT_TYPE_V | |
| GPIO_PIN8_INT_TYPE_S | |
| GPIO_PIN8_PAD_DRIVER_V | |
| GPIO_PIN8_PAD_DRIVER_S | |
| GPIO_PIN9_REG | |
| GPIO_PIN9_INT_ENA | |
| GPIO_PIN9_INT_ENA_V | |
| GPIO_PIN9_INT_ENA_S | |
| GPIO_PIN9_CONFIG | |
| GPIO_PIN9_CONFIG_V | |
| GPIO_PIN9_CONFIG_S | |
| GPIO_PIN9_WAKEUP_ENABLE_V | |
| GPIO_PIN9_WAKEUP_ENABLE_S | |
| GPIO_PIN9_INT_TYPE | |
| GPIO_PIN9_INT_TYPE_V | |
| GPIO_PIN9_INT_TYPE_S | |
| GPIO_PIN9_PAD_DRIVER_V | |
| GPIO_PIN9_PAD_DRIVER_S | |
| GPIO_PIN10_REG | |
| GPIO_PIN10_INT_ENA | |
| GPIO_PIN10_INT_ENA_V | |
| GPIO_PIN10_INT_ENA_S | |
| GPIO_PIN10_CONFIG | |
| GPIO_PIN10_CONFIG_V | |
| GPIO_PIN10_CONFIG_S | |
| GPIO_PIN10_WAKEUP_ENABLE_V | |
| GPIO_PIN10_WAKEUP_ENABLE_S | |
| GPIO_PIN10_INT_TYPE | |
| GPIO_PIN10_INT_TYPE_V | |
| GPIO_PIN10_INT_TYPE_S | |
| GPIO_PIN10_PAD_DRIVER_V | |
| GPIO_PIN10_PAD_DRIVER_S | |
| GPIO_PIN11_REG | |
| GPIO_PIN11_INT_ENA | |
| GPIO_PIN11_INT_ENA_V | |
| GPIO_PIN11_INT_ENA_S | |
| GPIO_PIN11_CONFIG | |
| GPIO_PIN11_CONFIG_V | |
| GPIO_PIN11_CONFIG_S | |
| GPIO_PIN11_WAKEUP_ENABLE_V | |
| GPIO_PIN11_WAKEUP_ENABLE_S | |
| GPIO_PIN11_INT_TYPE | |
| GPIO_PIN11_INT_TYPE_V | |
| GPIO_PIN11_INT_TYPE_S | |
| GPIO_PIN11_PAD_DRIVER_V | |
| GPIO_PIN11_PAD_DRIVER_S | |
| GPIO_PIN12_REG | |
| GPIO_PIN12_INT_ENA | |
| GPIO_PIN12_INT_ENA_V | |
| GPIO_PIN12_INT_ENA_S | |
| GPIO_PIN12_CONFIG | |
| GPIO_PIN12_CONFIG_V | |
| GPIO_PIN12_CONFIG_S | |
| GPIO_PIN12_WAKEUP_ENABLE_V | |
| GPIO_PIN12_WAKEUP_ENABLE_S | |
| GPIO_PIN12_INT_TYPE | |
| GPIO_PIN12_INT_TYPE_V | |
| GPIO_PIN12_INT_TYPE_S | |
| GPIO_PIN12_PAD_DRIVER_V | |
| GPIO_PIN12_PAD_DRIVER_S | |
| GPIO_PIN13_REG | |
| GPIO_PIN13_INT_ENA | |
| GPIO_PIN13_INT_ENA_V | |
| GPIO_PIN13_INT_ENA_S | |
| GPIO_PIN13_CONFIG | |
| GPIO_PIN13_CONFIG_V | |
| GPIO_PIN13_CONFIG_S | |
| GPIO_PIN13_WAKEUP_ENABLE_V | |
| GPIO_PIN13_WAKEUP_ENABLE_S | |
| GPIO_PIN13_INT_TYPE | |
| GPIO_PIN13_INT_TYPE_V | |
| GPIO_PIN13_INT_TYPE_S | |
| GPIO_PIN13_PAD_DRIVER_V | |
| GPIO_PIN13_PAD_DRIVER_S | |
| GPIO_PIN14_REG | |
| GPIO_PIN14_INT_ENA | |
| GPIO_PIN14_INT_ENA_V | |
| GPIO_PIN14_INT_ENA_S | |
| GPIO_PIN14_CONFIG | |
| GPIO_PIN14_CONFIG_V | |
| GPIO_PIN14_CONFIG_S | |
| GPIO_PIN14_WAKEUP_ENABLE_V | |
| GPIO_PIN14_WAKEUP_ENABLE_S | |
| GPIO_PIN14_INT_TYPE | |
| GPIO_PIN14_INT_TYPE_V | |
| GPIO_PIN14_INT_TYPE_S | |
| GPIO_PIN14_PAD_DRIVER_V | |
| GPIO_PIN14_PAD_DRIVER_S | |
| GPIO_PIN15_REG | |
| GPIO_PIN15_INT_ENA | |
| GPIO_PIN15_INT_ENA_V | |
| GPIO_PIN15_INT_ENA_S | |
| GPIO_PIN15_CONFIG | |
| GPIO_PIN15_CONFIG_V | |
| GPIO_PIN15_CONFIG_S | |
| GPIO_PIN15_WAKEUP_ENABLE_V | |
| GPIO_PIN15_WAKEUP_ENABLE_S | |
| GPIO_PIN15_INT_TYPE | |
| GPIO_PIN15_INT_TYPE_V | |
| GPIO_PIN15_INT_TYPE_S | |
| GPIO_PIN15_PAD_DRIVER_V | |
| GPIO_PIN15_PAD_DRIVER_S | |
| GPIO_PIN16_REG | |
| GPIO_PIN16_INT_ENA | |
| GPIO_PIN16_INT_ENA_V | |
| GPIO_PIN16_INT_ENA_S | |
| GPIO_PIN16_CONFIG | |
| GPIO_PIN16_CONFIG_V | |
| GPIO_PIN16_CONFIG_S | |
| GPIO_PIN16_WAKEUP_ENABLE_V | |
| GPIO_PIN16_WAKEUP_ENABLE_S | |
| GPIO_PIN16_INT_TYPE | |
| GPIO_PIN16_INT_TYPE_V | |
| GPIO_PIN16_INT_TYPE_S | |
| GPIO_PIN16_PAD_DRIVER_V | |
| GPIO_PIN16_PAD_DRIVER_S | |
| GPIO_PIN17_REG | |
| GPIO_PIN17_INT_ENA | |
| GPIO_PIN17_INT_ENA_V | |
| GPIO_PIN17_INT_ENA_S | |
| GPIO_PIN17_CONFIG | |
| GPIO_PIN17_CONFIG_V | |
| GPIO_PIN17_CONFIG_S | |
| GPIO_PIN17_WAKEUP_ENABLE_V | |
| GPIO_PIN17_WAKEUP_ENABLE_S | |
| GPIO_PIN17_INT_TYPE | |
| GPIO_PIN17_INT_TYPE_V | |
| GPIO_PIN17_INT_TYPE_S | |
| GPIO_PIN17_PAD_DRIVER_V | |
| GPIO_PIN17_PAD_DRIVER_S | |
| GPIO_PIN18_REG | |
| GPIO_PIN18_INT_ENA | |
| GPIO_PIN18_INT_ENA_V | |
| GPIO_PIN18_INT_ENA_S | |
| GPIO_PIN18_CONFIG | |
| GPIO_PIN18_CONFIG_V | |
| GPIO_PIN18_CONFIG_S | |
| GPIO_PIN18_WAKEUP_ENABLE_V | |
| GPIO_PIN18_WAKEUP_ENABLE_S | |
| GPIO_PIN18_INT_TYPE | |
| GPIO_PIN18_INT_TYPE_V | |
| GPIO_PIN18_INT_TYPE_S | |
| GPIO_PIN18_PAD_DRIVER_V | |
| GPIO_PIN18_PAD_DRIVER_S | |
| GPIO_PIN19_REG | |
| GPIO_PIN19_INT_ENA | |
| GPIO_PIN19_INT_ENA_V | |
| GPIO_PIN19_INT_ENA_S | |
| GPIO_PIN19_CONFIG | |
| GPIO_PIN19_CONFIG_V | |
| GPIO_PIN19_CONFIG_S | |
| GPIO_PIN19_WAKEUP_ENABLE_V | |
| GPIO_PIN19_WAKEUP_ENABLE_S | |
| GPIO_PIN19_INT_TYPE | |
| GPIO_PIN19_INT_TYPE_V | |
| GPIO_PIN19_INT_TYPE_S | |
| GPIO_PIN19_PAD_DRIVER_V | |
| GPIO_PIN19_PAD_DRIVER_S | |
| GPIO_PIN20_REG | |
| GPIO_PIN20_INT_ENA | |
| GPIO_PIN20_INT_ENA_V | |
| GPIO_PIN20_INT_ENA_S | |
| GPIO_PIN20_CONFIG | |
| GPIO_PIN20_CONFIG_V | |
| GPIO_PIN20_CONFIG_S | |
| GPIO_PIN20_WAKEUP_ENABLE_V | |
| GPIO_PIN20_WAKEUP_ENABLE_S | |
| GPIO_PIN20_INT_TYPE | |
| GPIO_PIN20_INT_TYPE_V | |
| GPIO_PIN20_INT_TYPE_S | |
| GPIO_PIN20_PAD_DRIVER_V | |
| GPIO_PIN20_PAD_DRIVER_S | |
| GPIO_PIN21_REG | |
| GPIO_PIN21_INT_ENA | |
| GPIO_PIN21_INT_ENA_V | |
| GPIO_PIN21_INT_ENA_S | |
| GPIO_PIN21_CONFIG | |
| GPIO_PIN21_CONFIG_V | |
| GPIO_PIN21_CONFIG_S | |
| GPIO_PIN21_WAKEUP_ENABLE_V | |
| GPIO_PIN21_WAKEUP_ENABLE_S | |
| GPIO_PIN21_INT_TYPE | |
| GPIO_PIN21_INT_TYPE_V | |
| GPIO_PIN21_INT_TYPE_S | |
| GPIO_PIN21_PAD_DRIVER_V | |
| GPIO_PIN21_PAD_DRIVER_S | |
| GPIO_PIN22_REG | |
| GPIO_PIN22_INT_ENA | |
| GPIO_PIN22_INT_ENA_V | |
| GPIO_PIN22_INT_ENA_S | |
| GPIO_PIN22_CONFIG | |
| GPIO_PIN22_CONFIG_V | |
| GPIO_PIN22_CONFIG_S | |
| GPIO_PIN22_WAKEUP_ENABLE_V | |
| GPIO_PIN22_WAKEUP_ENABLE_S | |
| GPIO_PIN22_INT_TYPE | |
| GPIO_PIN22_INT_TYPE_V | |
| GPIO_PIN22_INT_TYPE_S | |
| GPIO_PIN22_PAD_DRIVER_V | |
| GPIO_PIN22_PAD_DRIVER_S | |
| GPIO_PIN23_REG | |
| GPIO_PIN23_INT_ENA | |
| GPIO_PIN23_INT_ENA_V | |
| GPIO_PIN23_INT_ENA_S | |
| GPIO_PIN23_CONFIG | |
| GPIO_PIN23_CONFIG_V | |
| GPIO_PIN23_CONFIG_S | |
| GPIO_PIN23_WAKEUP_ENABLE_V | |
| GPIO_PIN23_WAKEUP_ENABLE_S | |
| GPIO_PIN23_INT_TYPE | |
| GPIO_PIN23_INT_TYPE_V | |
| GPIO_PIN23_INT_TYPE_S | |
| GPIO_PIN23_PAD_DRIVER_V | |
| GPIO_PIN23_PAD_DRIVER_S | |
| GPIO_PIN24_REG | |
| GPIO_PIN24_INT_ENA | |
| GPIO_PIN24_INT_ENA_V | |
| GPIO_PIN24_INT_ENA_S | |
| GPIO_PIN24_CONFIG | |
| GPIO_PIN24_CONFIG_V | |
| GPIO_PIN24_CONFIG_S | |
| GPIO_PIN24_WAKEUP_ENABLE_V | |
| GPIO_PIN24_WAKEUP_ENABLE_S | |
| GPIO_PIN24_INT_TYPE | |
| GPIO_PIN24_INT_TYPE_V | |
| GPIO_PIN24_INT_TYPE_S | |
| GPIO_PIN24_PAD_DRIVER_V | |
| GPIO_PIN24_PAD_DRIVER_S | |
| GPIO_PIN25_REG | |
| GPIO_PIN25_INT_ENA | |
| GPIO_PIN25_INT_ENA_V | |
| GPIO_PIN25_INT_ENA_S | |
| GPIO_PIN25_CONFIG | |
| GPIO_PIN25_CONFIG_V | |
| GPIO_PIN25_CONFIG_S | |
| GPIO_PIN25_WAKEUP_ENABLE_V | |
| GPIO_PIN25_WAKEUP_ENABLE_S | |
| GPIO_PIN25_INT_TYPE | |
| GPIO_PIN25_INT_TYPE_V | |
| GPIO_PIN25_INT_TYPE_S | |
| GPIO_PIN25_PAD_DRIVER_V | |
| GPIO_PIN25_PAD_DRIVER_S | |
| GPIO_PIN26_REG | |
| GPIO_PIN26_INT_ENA | |
| GPIO_PIN26_INT_ENA_V | |
| GPIO_PIN26_INT_ENA_S | |
| GPIO_PIN26_CONFIG | |
| GPIO_PIN26_CONFIG_V | |
| GPIO_PIN26_CONFIG_S | |
| GPIO_PIN26_WAKEUP_ENABLE_V | |
| GPIO_PIN26_WAKEUP_ENABLE_S | |
| GPIO_PIN26_INT_TYPE | |
| GPIO_PIN26_INT_TYPE_V | |
| GPIO_PIN26_INT_TYPE_S | |
| GPIO_PIN26_PAD_DRIVER_V | |
| GPIO_PIN26_PAD_DRIVER_S | |
| GPIO_PIN27_REG | |
| GPIO_PIN27_INT_ENA | |
| GPIO_PIN27_INT_ENA_V | |
| GPIO_PIN27_INT_ENA_S | |
| GPIO_PIN27_CONFIG | |
| GPIO_PIN27_CONFIG_V | |
| GPIO_PIN27_CONFIG_S | |
| GPIO_PIN27_WAKEUP_ENABLE_V | |
| GPIO_PIN27_WAKEUP_ENABLE_S | |
| GPIO_PIN27_INT_TYPE | |
| GPIO_PIN27_INT_TYPE_V | |
| GPIO_PIN27_INT_TYPE_S | |
| GPIO_PIN27_PAD_DRIVER_V | |
| GPIO_PIN27_PAD_DRIVER_S | |
| GPIO_PIN28_REG | |
| GPIO_PIN28_INT_ENA | |
| GPIO_PIN28_INT_ENA_V | |
| GPIO_PIN28_INT_ENA_S | |
| GPIO_PIN28_CONFIG | |
| GPIO_PIN28_CONFIG_V | |
| GPIO_PIN28_CONFIG_S | |
| GPIO_PIN28_WAKEUP_ENABLE_V | |
| GPIO_PIN28_WAKEUP_ENABLE_S | |
| GPIO_PIN28_INT_TYPE | |
| GPIO_PIN28_INT_TYPE_V | |
| GPIO_PIN28_INT_TYPE_S | |
| GPIO_PIN28_PAD_DRIVER_V | |
| GPIO_PIN28_PAD_DRIVER_S | |
| GPIO_PIN29_REG | |
| GPIO_PIN29_INT_ENA | |
| GPIO_PIN29_INT_ENA_V | |
| GPIO_PIN29_INT_ENA_S | |
| GPIO_PIN29_CONFIG | |
| GPIO_PIN29_CONFIG_V | |
| GPIO_PIN29_CONFIG_S | |
| GPIO_PIN29_WAKEUP_ENABLE_V | |
| GPIO_PIN29_WAKEUP_ENABLE_S | |
| GPIO_PIN29_INT_TYPE | |
| GPIO_PIN29_INT_TYPE_V | |
| GPIO_PIN29_INT_TYPE_S | |
| GPIO_PIN29_PAD_DRIVER_V | |
| GPIO_PIN29_PAD_DRIVER_S | |
| GPIO_PIN30_REG | |
| GPIO_PIN30_INT_ENA | |
| GPIO_PIN30_INT_ENA_V | |
| GPIO_PIN30_INT_ENA_S | |
| GPIO_PIN30_CONFIG | |
| GPIO_PIN30_CONFIG_V | |
| GPIO_PIN30_CONFIG_S | |
| GPIO_PIN30_WAKEUP_ENABLE_V | |
| GPIO_PIN30_WAKEUP_ENABLE_S | |
| GPIO_PIN30_INT_TYPE | |
| GPIO_PIN30_INT_TYPE_V | |
| GPIO_PIN30_INT_TYPE_S | |
| GPIO_PIN30_PAD_DRIVER_V | |
| GPIO_PIN30_PAD_DRIVER_S | |
| GPIO_PIN31_REG | |
| GPIO_PIN31_INT_ENA | |
| GPIO_PIN31_INT_ENA_V | |
| GPIO_PIN31_INT_ENA_S | |
| GPIO_PIN31_CONFIG | |
| GPIO_PIN31_CONFIG_V | |
| GPIO_PIN31_CONFIG_S | |
| GPIO_PIN31_WAKEUP_ENABLE_V | |
| GPIO_PIN31_WAKEUP_ENABLE_S | |
| GPIO_PIN31_INT_TYPE | |
| GPIO_PIN31_INT_TYPE_V | |
| GPIO_PIN31_INT_TYPE_S | |
| GPIO_PIN31_PAD_DRIVER_V | |
| GPIO_PIN31_PAD_DRIVER_S | |
| GPIO_PIN32_REG | |
| GPIO_PIN32_INT_ENA | |
| GPIO_PIN32_INT_ENA_V | |
| GPIO_PIN32_INT_ENA_S | |
| GPIO_PIN32_CONFIG | |
| GPIO_PIN32_CONFIG_V | |
| GPIO_PIN32_CONFIG_S | |
| GPIO_PIN32_WAKEUP_ENABLE_V | |
| GPIO_PIN32_WAKEUP_ENABLE_S | |
| GPIO_PIN32_INT_TYPE | |
| GPIO_PIN32_INT_TYPE_V | |
| GPIO_PIN32_INT_TYPE_S | |
| GPIO_PIN32_PAD_DRIVER_V | |
| GPIO_PIN32_PAD_DRIVER_S | |
| GPIO_PIN33_REG | |
| GPIO_PIN33_INT_ENA | |
| GPIO_PIN33_INT_ENA_V | |
| GPIO_PIN33_INT_ENA_S | |
| GPIO_PIN33_CONFIG | |
| GPIO_PIN33_CONFIG_V | |
| GPIO_PIN33_CONFIG_S | |
| GPIO_PIN33_WAKEUP_ENABLE_V | |
| GPIO_PIN33_WAKEUP_ENABLE_S | |
| GPIO_PIN33_INT_TYPE | |
| GPIO_PIN33_INT_TYPE_V | |
| GPIO_PIN33_INT_TYPE_S | |
| GPIO_PIN33_PAD_DRIVER_V | |
| GPIO_PIN33_PAD_DRIVER_S | |
| GPIO_PIN34_REG | |
| GPIO_PIN34_INT_ENA | |
| GPIO_PIN34_INT_ENA_V | |
| GPIO_PIN34_INT_ENA_S | |
| GPIO_PIN34_CONFIG | |
| GPIO_PIN34_CONFIG_V | |
| GPIO_PIN34_CONFIG_S | |
| GPIO_PIN34_WAKEUP_ENABLE_V | |
| GPIO_PIN34_WAKEUP_ENABLE_S | |
| GPIO_PIN34_INT_TYPE | |
| GPIO_PIN34_INT_TYPE_V | |
| GPIO_PIN34_INT_TYPE_S | |
| GPIO_PIN34_PAD_DRIVER_V | |
| GPIO_PIN34_PAD_DRIVER_S | |
| GPIO_PIN35_REG | |
| GPIO_PIN35_INT_ENA | |
| GPIO_PIN35_INT_ENA_V | |
| GPIO_PIN35_INT_ENA_S | |
| GPIO_PIN35_CONFIG | |
| GPIO_PIN35_CONFIG_V | |
| GPIO_PIN35_CONFIG_S | |
| GPIO_PIN35_WAKEUP_ENABLE_V | |
| GPIO_PIN35_WAKEUP_ENABLE_S | |
| GPIO_PIN35_INT_TYPE | |
| GPIO_PIN35_INT_TYPE_V | |
| GPIO_PIN35_INT_TYPE_S | |
| GPIO_PIN35_PAD_DRIVER_V | |
| GPIO_PIN35_PAD_DRIVER_S | |
| GPIO_PIN36_REG | |
| GPIO_PIN36_INT_ENA | |
| GPIO_PIN36_INT_ENA_V | |
| GPIO_PIN36_INT_ENA_S | |
| GPIO_PIN36_CONFIG | |
| GPIO_PIN36_CONFIG_V | |
| GPIO_PIN36_CONFIG_S | |
| GPIO_PIN36_WAKEUP_ENABLE_V | |
| GPIO_PIN36_WAKEUP_ENABLE_S | |
| GPIO_PIN36_INT_TYPE | |
| GPIO_PIN36_INT_TYPE_V | |
| GPIO_PIN36_INT_TYPE_S | |
| GPIO_PIN36_PAD_DRIVER_V | |
| GPIO_PIN36_PAD_DRIVER_S | |
| GPIO_PIN37_REG | |
| GPIO_PIN37_INT_ENA | |
| GPIO_PIN37_INT_ENA_V | |
| GPIO_PIN37_INT_ENA_S | |
| GPIO_PIN37_CONFIG | |
| GPIO_PIN37_CONFIG_V | |
| GPIO_PIN37_CONFIG_S | |
| GPIO_PIN37_WAKEUP_ENABLE_V | |
| GPIO_PIN37_WAKEUP_ENABLE_S | |
| GPIO_PIN37_INT_TYPE | |
| GPIO_PIN37_INT_TYPE_V | |
| GPIO_PIN37_INT_TYPE_S | |
| GPIO_PIN37_PAD_DRIVER_V | |
| GPIO_PIN37_PAD_DRIVER_S | |
| GPIO_PIN38_REG | |
| GPIO_PIN38_INT_ENA | |
| GPIO_PIN38_INT_ENA_V | |
| GPIO_PIN38_INT_ENA_S | |
| GPIO_PIN38_CONFIG | |
| GPIO_PIN38_CONFIG_V | |
| GPIO_PIN38_CONFIG_S | |
| GPIO_PIN38_WAKEUP_ENABLE_V | |
| GPIO_PIN38_WAKEUP_ENABLE_S | |
| GPIO_PIN38_INT_TYPE | |
| GPIO_PIN38_INT_TYPE_V | |
| GPIO_PIN38_INT_TYPE_S | |
| GPIO_PIN38_PAD_DRIVER_V | |
| GPIO_PIN38_PAD_DRIVER_S | |
| GPIO_PIN39_REG | |
| GPIO_PIN39_INT_ENA | |
| GPIO_PIN39_INT_ENA_V | |
| GPIO_PIN39_INT_ENA_S | |
| GPIO_PIN39_CONFIG | |
| GPIO_PIN39_CONFIG_V | |
| GPIO_PIN39_CONFIG_S | |
| GPIO_PIN39_WAKEUP_ENABLE_V | |
| GPIO_PIN39_WAKEUP_ENABLE_S | |
| GPIO_PIN39_INT_TYPE | |
| GPIO_PIN39_INT_TYPE_V | |
| GPIO_PIN39_INT_TYPE_S | |
| GPIO_PIN39_PAD_DRIVER_V | |
| GPIO_PIN39_PAD_DRIVER_S | |
| GPIO_PIN_CONFIG | |
| GPIO_PIN_CONFIG_S | |
| GPIO_PIN_CONFIG_V | |
| GPIO_PIN_COUNT | |
| GPIO_PIN_INT_ENA | |
| GPIO_PIN_INT_ENA_S | |
| GPIO_PIN_INT_ENA_V | |
| GPIO_PIN_INT_TYPE | |
| GPIO_PIN_INT_TYPE_S | |
| GPIO_PIN_INT_TYPE_V | |
| GPIO_PIN_PAD_DRIVER_S | |
| GPIO_PIN_PAD_DRIVER_V | |
| GPIO_PIN_REG_0 | |
| GPIO_PIN_REG_1 | |
| GPIO_PIN_REG_2 | |
| GPIO_PIN_REG_3 | |
| GPIO_PIN_REG_4 | |
| GPIO_PIN_REG_5 | |
| GPIO_PIN_REG_6 | |
| GPIO_PIN_REG_7 | |
| GPIO_PIN_REG_8 | |
| GPIO_PIN_REG_9 | |
| GPIO_PIN_REG_10 | |
| GPIO_PIN_REG_11 | |
| GPIO_PIN_REG_12 | |
| GPIO_PIN_REG_13 | |
| GPIO_PIN_REG_14 | |
| GPIO_PIN_REG_15 | |
| GPIO_PIN_REG_16 | |
| GPIO_PIN_REG_17 | |
| GPIO_PIN_REG_18 | |
| GPIO_PIN_REG_19 | |
| GPIO_PIN_REG_20 | |
| GPIO_PIN_REG_21 | |
| GPIO_PIN_REG_22 | |
| GPIO_PIN_REG_23 | |
| GPIO_PIN_REG_25 | |
| GPIO_PIN_REG_26 | |
| GPIO_PIN_REG_27 | |
| GPIO_PIN_REG_32 | |
| GPIO_PIN_REG_33 | |
| GPIO_PIN_REG_34 | |
| GPIO_PIN_REG_35 | |
| GPIO_PIN_REG_36 | |
| GPIO_PIN_REG_37 | |
| GPIO_PIN_REG_38 | |
| GPIO_PIN_REG_39 | |
| GPIO_PIN_WAKEUP_ENABLE_S | |
| GPIO_PIN_WAKEUP_ENABLE_V | |
| GPIO_PROCPU_INT | |
| GPIO_PROCPU_INT_H | |
| GPIO_PROCPU_INT_H_S | |
| GPIO_PROCPU_INT_H_V | |
| GPIO_PROCPU_INT_S | |
| GPIO_PROCPU_INT_V | |
| GPIO_PROCPU_NMI_INT | |
| GPIO_PROCPU_NMI_INT_H | |
| GPIO_PROCPU_NMI_INT_H_S | |
| GPIO_PROCPU_NMI_INT_H_V | |
| GPIO_PROCPU_NMI_INT_S | |
| GPIO_PROCPU_NMI_INT_V | |
| GPIO_SD0_OUT_IDX | |
| GPIO_SD1_OUT_IDX | |
| GPIO_SD2_OUT_IDX | |
| GPIO_SD3_OUT_IDX | |
| GPIO_SD4_OUT_IDX | |
| GPIO_SD5_OUT_IDX | |
| GPIO_SD6_OUT_IDX | |
| GPIO_SD7_OUT_IDX | |
| GPIO_SDIO_INT | |
| GPIO_SDIO_INT_H | |
| GPIO_SDIO_INT_H_S | |
| GPIO_SDIO_INT_H_V | |
| GPIO_SDIO_INT_S | |
| GPIO_SDIO_INT_V | |
| GPIO_SDIO_SEL | |
| GPIO_SDIO_SELECT_REG | |
| GPIO_SDIO_SEL_S | |
| GPIO_SDIO_SEL_V | |
| GPIO_SIG0_IN_SEL_V | |
| GPIO_SIG0_IN_SEL_S | |
| GPIO_SIG1_IN_SEL_V | |
| GPIO_SIG1_IN_SEL_S | |
| GPIO_SIG2_IN_SEL_V | |
| GPIO_SIG2_IN_SEL_S | |
| GPIO_SIG3_IN_SEL_V | |
| GPIO_SIG3_IN_SEL_S | |
| GPIO_SIG4_IN_SEL_V | |
| GPIO_SIG4_IN_SEL_S | |
| GPIO_SIG5_IN_SEL_V | |
| GPIO_SIG5_IN_SEL_S | |
| GPIO_SIG6_IN_SEL_V | |
| GPIO_SIG6_IN_SEL_S | |
| GPIO_SIG7_IN_SEL_V | |
| GPIO_SIG7_IN_SEL_S | |
| GPIO_SIG8_IN_SEL_V | |
| GPIO_SIG8_IN_SEL_S | |
| GPIO_SIG9_IN_SEL_V | |
| GPIO_SIG9_IN_SEL_S | |
| GPIO_SIG10_IN_SEL_V | |
| GPIO_SIG10_IN_SEL_S | |
| GPIO_SIG11_IN_SEL_V | |
| GPIO_SIG11_IN_SEL_S | |
| GPIO_SIG12_IN_SEL_V | |
| GPIO_SIG12_IN_SEL_S | |
| GPIO_SIG13_IN_SEL_V | |
| GPIO_SIG13_IN_SEL_S | |
| GPIO_SIG14_IN_SEL_V | |
| GPIO_SIG14_IN_SEL_S | |
| GPIO_SIG15_IN_SEL_V | |
| GPIO_SIG15_IN_SEL_S | |
| GPIO_SIG16_IN_SEL_V | |
| GPIO_SIG16_IN_SEL_S | |
| GPIO_SIG17_IN_SEL_V | |
| GPIO_SIG17_IN_SEL_S | |
| GPIO_SIG18_IN_SEL_V | |
| GPIO_SIG18_IN_SEL_S | |
| GPIO_SIG19_IN_SEL_V | |
| GPIO_SIG19_IN_SEL_S | |
| GPIO_SIG20_IN_SEL_V | |
| GPIO_SIG20_IN_SEL_S | |
| GPIO_SIG21_IN_SEL_V | |
| GPIO_SIG21_IN_SEL_S | |
| GPIO_SIG22_IN_SEL_V | |
| GPIO_SIG22_IN_SEL_S | |
| GPIO_SIG23_IN_SEL_V | |
| GPIO_SIG23_IN_SEL_S | |
| GPIO_SIG24_IN_SEL_V | |
| GPIO_SIG24_IN_SEL_S | |
| GPIO_SIG25_IN_SEL_V | |
| GPIO_SIG25_IN_SEL_S | |
| GPIO_SIG26_IN_SEL_V | |
| GPIO_SIG26_IN_SEL_S | |
| GPIO_SIG27_IN_SEL_V | |
| GPIO_SIG27_IN_SEL_S | |
| GPIO_SIG28_IN_SEL_V | |
| GPIO_SIG28_IN_SEL_S | |
| GPIO_SIG29_IN_SEL_V | |
| GPIO_SIG29_IN_SEL_S | |
| GPIO_SIG30_IN_SEL_V | |
| GPIO_SIG30_IN_SEL_S | |
| GPIO_SIG31_IN_SEL_V | |
| GPIO_SIG31_IN_SEL_S | |
| GPIO_SIG32_IN_SEL_V | |
| GPIO_SIG32_IN_SEL_S | |
| GPIO_SIG33_IN_SEL_V | |
| GPIO_SIG33_IN_SEL_S | |
| GPIO_SIG34_IN_SEL_V | |
| GPIO_SIG34_IN_SEL_S | |
| GPIO_SIG35_IN_SEL_V | |
| GPIO_SIG35_IN_SEL_S | |
| GPIO_SIG36_IN_SEL_V | |
| GPIO_SIG36_IN_SEL_S | |
| GPIO_SIG37_IN_SEL_V | |
| GPIO_SIG37_IN_SEL_S | |
| GPIO_SIG38_IN_SEL_V | |
| GPIO_SIG38_IN_SEL_S | |
| GPIO_SIG39_IN_SEL_V | |
| GPIO_SIG39_IN_SEL_S | |
| GPIO_SIG40_IN_SEL_V | |
| GPIO_SIG40_IN_SEL_S | |
| GPIO_SIG41_IN_SEL_V | |
| GPIO_SIG41_IN_SEL_S | |
| GPIO_SIG42_IN_SEL_V | |
| GPIO_SIG42_IN_SEL_S | |
| GPIO_SIG43_IN_SEL_V | |
| GPIO_SIG43_IN_SEL_S | |
| GPIO_SIG44_IN_SEL_V | |
| GPIO_SIG44_IN_SEL_S | |
| GPIO_SIG45_IN_SEL_V | |
| GPIO_SIG45_IN_SEL_S | |
| GPIO_SIG46_IN_SEL_V | |
| GPIO_SIG46_IN_SEL_S | |
| GPIO_SIG47_IN_SEL_V | |
| GPIO_SIG47_IN_SEL_S | |
| GPIO_SIG48_IN_SEL_V | |
| GPIO_SIG48_IN_SEL_S | |
| GPIO_SIG49_IN_SEL_V | |
| GPIO_SIG49_IN_SEL_S | |
| GPIO_SIG50_IN_SEL_V | |
| GPIO_SIG50_IN_SEL_S | |
| GPIO_SIG51_IN_SEL_V | |
| GPIO_SIG51_IN_SEL_S | |
| GPIO_SIG52_IN_SEL_V | |
| GPIO_SIG52_IN_SEL_S | |
| GPIO_SIG53_IN_SEL_V | |
| GPIO_SIG53_IN_SEL_S | |
| GPIO_SIG54_IN_SEL_V | |
| GPIO_SIG54_IN_SEL_S | |
| GPIO_SIG55_IN_SEL_V | |
| GPIO_SIG55_IN_SEL_S | |
| GPIO_SIG56_IN_SEL_V | |
| GPIO_SIG56_IN_SEL_S | |
| GPIO_SIG57_IN_SEL_V | |
| GPIO_SIG57_IN_SEL_S | |
| GPIO_SIG58_IN_SEL_V | |
| GPIO_SIG58_IN_SEL_S | |
| GPIO_SIG59_IN_SEL_V | |
| GPIO_SIG59_IN_SEL_S | |
| GPIO_SIG60_IN_SEL_V | |
| GPIO_SIG60_IN_SEL_S | |
| GPIO_SIG61_IN_SEL_V | |
| GPIO_SIG61_IN_SEL_S | |
| GPIO_SIG62_IN_SEL_V | |
| GPIO_SIG62_IN_SEL_S | |
| GPIO_SIG63_IN_SEL_V | |
| GPIO_SIG63_IN_SEL_S | |
| GPIO_SIG64_IN_SEL_V | |
| GPIO_SIG64_IN_SEL_S | |
| GPIO_SIG65_IN_SEL_V | |
| GPIO_SIG65_IN_SEL_S | |
| GPIO_SIG66_IN_SEL_V | |
| GPIO_SIG66_IN_SEL_S | |
| GPIO_SIG67_IN_SEL_V | |
| GPIO_SIG67_IN_SEL_S | |
| GPIO_SIG68_IN_SEL_V | |
| GPIO_SIG68_IN_SEL_S | |
| GPIO_SIG69_IN_SEL_V | |
| GPIO_SIG69_IN_SEL_S | |
| GPIO_SIG70_IN_SEL_V | |
| GPIO_SIG70_IN_SEL_S | |
| GPIO_SIG71_IN_SEL_V | |
| GPIO_SIG71_IN_SEL_S | |
| GPIO_SIG72_IN_SEL_V | |
| GPIO_SIG72_IN_SEL_S | |
| GPIO_SIG73_IN_SEL_V | |
| GPIO_SIG73_IN_SEL_S | |
| GPIO_SIG74_IN_SEL_V | |
| GPIO_SIG74_IN_SEL_S | |
| GPIO_SIG75_IN_SEL_V | |
| GPIO_SIG75_IN_SEL_S | |
| GPIO_SIG76_IN_SEL_V | |
| GPIO_SIG76_IN_SEL_S | |
| GPIO_SIG77_IN_SEL_V | |
| GPIO_SIG77_IN_SEL_S | |
| GPIO_SIG78_IN_SEL_V | |
| GPIO_SIG78_IN_SEL_S | |
| GPIO_SIG79_IN_SEL_V | |
| GPIO_SIG79_IN_SEL_S | |
| GPIO_SIG80_IN_SEL_V | |
| GPIO_SIG80_IN_SEL_S | |
| GPIO_SIG81_IN_SEL_V | |
| GPIO_SIG81_IN_SEL_S | |
| GPIO_SIG82_IN_SEL_V | |
| GPIO_SIG82_IN_SEL_S | |
| GPIO_SIG83_IN_SEL_V | |
| GPIO_SIG83_IN_SEL_S | |
| GPIO_SIG84_IN_SEL_V | |
| GPIO_SIG84_IN_SEL_S | |
| GPIO_SIG85_IN_SEL_V | |
| GPIO_SIG85_IN_SEL_S | |
| GPIO_SIG86_IN_SEL_V | |
| GPIO_SIG86_IN_SEL_S | |
| GPIO_SIG87_IN_SEL_V | |
| GPIO_SIG87_IN_SEL_S | |
| GPIO_SIG88_IN_SEL_V | |
| GPIO_SIG88_IN_SEL_S | |
| GPIO_SIG89_IN_SEL_V | |
| GPIO_SIG89_IN_SEL_S | |
| GPIO_SIG90_IN_SEL_V | |
| GPIO_SIG90_IN_SEL_S | |
| GPIO_SIG91_IN_SEL_V | |
| GPIO_SIG91_IN_SEL_S | |
| GPIO_SIG92_IN_SEL_V | |
| GPIO_SIG92_IN_SEL_S | |
| GPIO_SIG93_IN_SEL_V | |
| GPIO_SIG93_IN_SEL_S | |
| GPIO_SIG94_IN_SEL_V | |
| GPIO_SIG94_IN_SEL_S | |
| GPIO_SIG95_IN_SEL_V | |
| GPIO_SIG95_IN_SEL_S | |
| GPIO_SIG96_IN_SEL_V | |
| GPIO_SIG96_IN_SEL_S | |
| GPIO_SIG97_IN_SEL_V | |
| GPIO_SIG97_IN_SEL_S | |
| GPIO_SIG98_IN_SEL_V | |
| GPIO_SIG98_IN_SEL_S | |
| GPIO_SIG99_IN_SEL_V | |
| GPIO_SIG99_IN_SEL_S | |
| GPIO_SIG100_IN_SEL_V | |
| GPIO_SIG100_IN_SEL_S | |
| GPIO_SIG101_IN_SEL_V | |
| GPIO_SIG101_IN_SEL_S | |
| GPIO_SIG102_IN_SEL_V | |
| GPIO_SIG102_IN_SEL_S | |
| GPIO_SIG103_IN_SEL_V | |
| GPIO_SIG103_IN_SEL_S | |
| GPIO_SIG104_IN_SEL_V | |
| GPIO_SIG104_IN_SEL_S | |
| GPIO_SIG105_IN_SEL_V | |
| GPIO_SIG105_IN_SEL_S | |
| GPIO_SIG106_IN_SEL_V | |
| GPIO_SIG106_IN_SEL_S | |
| GPIO_SIG107_IN_SEL_V | |
| GPIO_SIG107_IN_SEL_S | |
| GPIO_SIG108_IN_SEL_V | |
| GPIO_SIG108_IN_SEL_S | |
| GPIO_SIG109_IN_SEL_V | |
| GPIO_SIG109_IN_SEL_S | |
| GPIO_SIG110_IN_SEL_V | |
| GPIO_SIG110_IN_SEL_S | |
| GPIO_SIG111_IN_SEL_V | |
| GPIO_SIG111_IN_SEL_S | |
| GPIO_SIG112_IN_SEL_V | |
| GPIO_SIG112_IN_SEL_S | |
| GPIO_SIG113_IN_SEL_V | |
| GPIO_SIG113_IN_SEL_S | |
| GPIO_SIG114_IN_SEL_V | |
| GPIO_SIG114_IN_SEL_S | |
| GPIO_SIG115_IN_SEL_V | |
| GPIO_SIG115_IN_SEL_S | |
| GPIO_SIG116_IN_SEL_V | |
| GPIO_SIG116_IN_SEL_S | |
| GPIO_SIG117_IN_SEL_V | |
| GPIO_SIG117_IN_SEL_S | |
| GPIO_SIG118_IN_SEL_V | |
| GPIO_SIG118_IN_SEL_S | |
| GPIO_SIG119_IN_SEL_V | |
| GPIO_SIG119_IN_SEL_S | |
| GPIO_SIG120_IN_SEL_V | |
| GPIO_SIG120_IN_SEL_S | |
| GPIO_SIG121_IN_SEL_V | |
| GPIO_SIG121_IN_SEL_S | |
| GPIO_SIG122_IN_SEL_V | |
| GPIO_SIG122_IN_SEL_S | |
| GPIO_SIG123_IN_SEL_V | |
| GPIO_SIG123_IN_SEL_S | |
| GPIO_SIG124_IN_SEL_V | |
| GPIO_SIG124_IN_SEL_S | |
| GPIO_SIG125_IN_SEL_V | |
| GPIO_SIG125_IN_SEL_S | |
| GPIO_SIG126_IN_SEL_V | |
| GPIO_SIG126_IN_SEL_S | |
| GPIO_SIG127_IN_SEL_V | |
| GPIO_SIG127_IN_SEL_S | |
| GPIO_SIG128_IN_SEL_V | |
| GPIO_SIG128_IN_SEL_S | |
| GPIO_SIG129_IN_SEL_V | |
| GPIO_SIG129_IN_SEL_S | |
| GPIO_SIG130_IN_SEL_V | |
| GPIO_SIG130_IN_SEL_S | |
| GPIO_SIG131_IN_SEL_V | |
| GPIO_SIG131_IN_SEL_S | |
| GPIO_SIG132_IN_SEL_V | |
| GPIO_SIG132_IN_SEL_S | |
| GPIO_SIG133_IN_SEL_V | |
| GPIO_SIG133_IN_SEL_S | |
| GPIO_SIG134_IN_SEL_V | |
| GPIO_SIG134_IN_SEL_S | |
| GPIO_SIG135_IN_SEL_V | |
| GPIO_SIG135_IN_SEL_S | |
| GPIO_SIG136_IN_SEL_V | |
| GPIO_SIG136_IN_SEL_S | |
| GPIO_SIG137_IN_SEL_V | |
| GPIO_SIG137_IN_SEL_S | |
| GPIO_SIG138_IN_SEL_V | |
| GPIO_SIG138_IN_SEL_S | |
| GPIO_SIG139_IN_SEL_V | |
| GPIO_SIG139_IN_SEL_S | |
| GPIO_SIG140_IN_SEL_V | |
| GPIO_SIG140_IN_SEL_S | |
| GPIO_SIG141_IN_SEL_V | |
| GPIO_SIG141_IN_SEL_S | |
| GPIO_SIG142_IN_SEL_V | |
| GPIO_SIG142_IN_SEL_S | |
| GPIO_SIG143_IN_SEL_V | |
| GPIO_SIG143_IN_SEL_S | |
| GPIO_SIG144_IN_SEL_V | |
| GPIO_SIG144_IN_SEL_S | |
| GPIO_SIG145_IN_SEL_V | |
| GPIO_SIG145_IN_SEL_S | |
| GPIO_SIG146_IN_SEL_V | |
| GPIO_SIG146_IN_SEL_S | |
| GPIO_SIG147_IN_SEL_V | |
| GPIO_SIG147_IN_SEL_S | |
| GPIO_SIG148_IN_SEL_V | |
| GPIO_SIG148_IN_SEL_S | |
| GPIO_SIG149_IN_SEL_V | |
| GPIO_SIG149_IN_SEL_S | |
| GPIO_SIG150_IN_SEL_V | |
| GPIO_SIG150_IN_SEL_S | |
| GPIO_SIG151_IN_SEL_V | |
| GPIO_SIG151_IN_SEL_S | |
| GPIO_SIG152_IN_SEL_V | |
| GPIO_SIG152_IN_SEL_S | |
| GPIO_SIG153_IN_SEL_V | |
| GPIO_SIG153_IN_SEL_S | |
| GPIO_SIG154_IN_SEL_V | |
| GPIO_SIG154_IN_SEL_S | |
| GPIO_SIG155_IN_SEL_V | |
| GPIO_SIG155_IN_SEL_S | |
| GPIO_SIG156_IN_SEL_V | |
| GPIO_SIG156_IN_SEL_S | |
| GPIO_SIG157_IN_SEL_V | |
| GPIO_SIG157_IN_SEL_S | |
| GPIO_SIG158_IN_SEL_V | |
| GPIO_SIG158_IN_SEL_S | |
| GPIO_SIG159_IN_SEL_V | |
| GPIO_SIG159_IN_SEL_S | |
| GPIO_SIG160_IN_SEL_V | |
| GPIO_SIG160_IN_SEL_S | |
| GPIO_SIG161_IN_SEL_V | |
| GPIO_SIG161_IN_SEL_S | |
| GPIO_SIG162_IN_SEL_V | |
| GPIO_SIG162_IN_SEL_S | |
| GPIO_SIG163_IN_SEL_V | |
| GPIO_SIG163_IN_SEL_S | |
| GPIO_SIG164_IN_SEL_V | |
| GPIO_SIG164_IN_SEL_S | |
| GPIO_SIG165_IN_SEL_V | |
| GPIO_SIG165_IN_SEL_S | |
| GPIO_SIG166_IN_SEL_V | |
| GPIO_SIG166_IN_SEL_S | |
| GPIO_SIG167_IN_SEL_V | |
| GPIO_SIG167_IN_SEL_S | |
| GPIO_SIG168_IN_SEL_V | |
| GPIO_SIG168_IN_SEL_S | |
| GPIO_SIG169_IN_SEL_V | |
| GPIO_SIG169_IN_SEL_S | |
| GPIO_SIG170_IN_SEL_V | |
| GPIO_SIG170_IN_SEL_S | |
| GPIO_SIG171_IN_SEL_V | |
| GPIO_SIG171_IN_SEL_S | |
| GPIO_SIG172_IN_SEL_V | |
| GPIO_SIG172_IN_SEL_S | |
| GPIO_SIG173_IN_SEL_V | |
| GPIO_SIG173_IN_SEL_S | |
| GPIO_SIG174_IN_SEL_V | |
| GPIO_SIG174_IN_SEL_S | |
| GPIO_SIG175_IN_SEL_V | |
| GPIO_SIG175_IN_SEL_S | |
| GPIO_SIG176_IN_SEL_V | |
| GPIO_SIG176_IN_SEL_S | |
| GPIO_SIG177_IN_SEL_V | |
| GPIO_SIG177_IN_SEL_S | |
| GPIO_SIG178_IN_SEL_V | |
| GPIO_SIG178_IN_SEL_S | |
| GPIO_SIG179_IN_SEL_V | |
| GPIO_SIG179_IN_SEL_S | |
| GPIO_SIG180_IN_SEL_V | |
| GPIO_SIG180_IN_SEL_S | |
| GPIO_SIG181_IN_SEL_V | |
| GPIO_SIG181_IN_SEL_S | |
| GPIO_SIG182_IN_SEL_V | |
| GPIO_SIG182_IN_SEL_S | |
| GPIO_SIG183_IN_SEL_V | |
| GPIO_SIG183_IN_SEL_S | |
| GPIO_SIG184_IN_SEL_V | |
| GPIO_SIG184_IN_SEL_S | |
| GPIO_SIG185_IN_SEL_V | |
| GPIO_SIG185_IN_SEL_S | |
| GPIO_SIG186_IN_SEL_V | |
| GPIO_SIG186_IN_SEL_S | |
| GPIO_SIG187_IN_SEL_V | |
| GPIO_SIG187_IN_SEL_S | |
| GPIO_SIG188_IN_SEL_V | |
| GPIO_SIG188_IN_SEL_S | |
| GPIO_SIG189_IN_SEL_V | |
| GPIO_SIG189_IN_SEL_S | |
| GPIO_SIG190_IN_SEL_V | |
| GPIO_SIG190_IN_SEL_S | |
| GPIO_SIG191_IN_SEL_V | |
| GPIO_SIG191_IN_SEL_S | |
| GPIO_SIG192_IN_SEL_V | |
| GPIO_SIG192_IN_SEL_S | |
| GPIO_SIG193_IN_SEL_V | |
| GPIO_SIG193_IN_SEL_S | |
| GPIO_SIG194_IN_SEL_V | |
| GPIO_SIG194_IN_SEL_S | |
| GPIO_SIG195_IN_SEL_V | |
| GPIO_SIG195_IN_SEL_S | |
| GPIO_SIG196_IN_SEL_V | |
| GPIO_SIG196_IN_SEL_S | |
| GPIO_SIG197_IN_SEL_V | |
| GPIO_SIG197_IN_SEL_S | |
| GPIO_SIG198_IN_SEL_V | |
| GPIO_SIG198_IN_SEL_S | |
| GPIO_SIG199_IN_SEL_V | |
| GPIO_SIG199_IN_SEL_S | |
| GPIO_SIG200_IN_SEL_V | |
| GPIO_SIG200_IN_SEL_S | |
| GPIO_SIG201_IN_SEL_V | |
| GPIO_SIG201_IN_SEL_S | |
| GPIO_SIG202_IN_SEL_V | |
| GPIO_SIG202_IN_SEL_S | |
| GPIO_SIG203_IN_SEL_V | |
| GPIO_SIG203_IN_SEL_S | |
| GPIO_SIG204_IN_SEL_V | |
| GPIO_SIG204_IN_SEL_S | |
| GPIO_SIG205_IN_SEL_V | |
| GPIO_SIG205_IN_SEL_S | |
| GPIO_SIG206_IN_SEL_V | |
| GPIO_SIG206_IN_SEL_S | |
| GPIO_SIG207_IN_SEL_V | |
| GPIO_SIG207_IN_SEL_S | |
| GPIO_SIG208_IN_SEL_V | |
| GPIO_SIG208_IN_SEL_S | |
| GPIO_SIG209_IN_SEL_V | |
| GPIO_SIG209_IN_SEL_S | |
| GPIO_SIG210_IN_SEL_V | |
| GPIO_SIG210_IN_SEL_S | |
| GPIO_SIG211_IN_SEL_V | |
| GPIO_SIG211_IN_SEL_S | |
| GPIO_SIG212_IN_SEL_V | |
| GPIO_SIG212_IN_SEL_S | |
| GPIO_SIG213_IN_SEL_V | |
| GPIO_SIG213_IN_SEL_S | |
| GPIO_SIG214_IN_SEL_V | |
| GPIO_SIG214_IN_SEL_S | |
| GPIO_SIG215_IN_SEL_V | |
| GPIO_SIG215_IN_SEL_S | |
| GPIO_SIG216_IN_SEL_V | |
| GPIO_SIG216_IN_SEL_S | |
| GPIO_SIG217_IN_SEL_V | |
| GPIO_SIG217_IN_SEL_S | |
| GPIO_SIG218_IN_SEL_V | |
| GPIO_SIG218_IN_SEL_S | |
| GPIO_SIG219_IN_SEL_V | |
| GPIO_SIG219_IN_SEL_S | |
| GPIO_SIG220_IN_SEL_V | |
| GPIO_SIG220_IN_SEL_S | |
| GPIO_SIG221_IN_SEL_V | |
| GPIO_SIG221_IN_SEL_S | |
| GPIO_SIG222_IN_SEL_V | |
| GPIO_SIG222_IN_SEL_S | |
| GPIO_SIG223_IN_SEL_V | |
| GPIO_SIG223_IN_SEL_S | |
| GPIO_SIG224_IN_SEL_V | |
| GPIO_SIG224_IN_SEL_S | |
| GPIO_SIG225_IN_SEL_V | |
| GPIO_SIG225_IN_SEL_S | |
| GPIO_SIG226_IN_SEL_V | |
| GPIO_SIG226_IN_SEL_S | |
| GPIO_SIG227_IN_SEL_V | |
| GPIO_SIG227_IN_SEL_S | |
| GPIO_SIG228_IN_SEL_V | |
| GPIO_SIG228_IN_SEL_S | |
| GPIO_SIG229_IN_SEL_V | |
| GPIO_SIG229_IN_SEL_S | |
| GPIO_SIG230_IN_SEL_V | |
| GPIO_SIG230_IN_SEL_S | |
| GPIO_SIG231_IN_SEL_V | |
| GPIO_SIG231_IN_SEL_S | |
| GPIO_SIG232_IN_SEL_V | |
| GPIO_SIG232_IN_SEL_S | |
| GPIO_SIG233_IN_SEL_V | |
| GPIO_SIG233_IN_SEL_S | |
| GPIO_SIG234_IN_SEL_V | |
| GPIO_SIG234_IN_SEL_S | |
| GPIO_SIG235_IN_SEL_V | |
| GPIO_SIG235_IN_SEL_S | |
| GPIO_SIG236_IN_SEL_V | |
| GPIO_SIG236_IN_SEL_S | |
| GPIO_SIG237_IN_SEL_V | |
| GPIO_SIG237_IN_SEL_S | |
| GPIO_SIG238_IN_SEL_V | |
| GPIO_SIG238_IN_SEL_S | |
| GPIO_SIG239_IN_SEL_V | |
| GPIO_SIG239_IN_SEL_S | |
| GPIO_SIG240_IN_SEL_V | |
| GPIO_SIG240_IN_SEL_S | |
| GPIO_SIG241_IN_SEL_V | |
| GPIO_SIG241_IN_SEL_S | |
| GPIO_SIG242_IN_SEL_V | |
| GPIO_SIG242_IN_SEL_S | |
| GPIO_SIG243_IN_SEL_V | |
| GPIO_SIG243_IN_SEL_S | |
| GPIO_SIG244_IN_SEL_V | |
| GPIO_SIG244_IN_SEL_S | |
| GPIO_SIG245_IN_SEL_V | |
| GPIO_SIG245_IN_SEL_S | |
| GPIO_SIG246_IN_SEL_V | |
| GPIO_SIG246_IN_SEL_S | |
| GPIO_SIG247_IN_SEL_V | |
| GPIO_SIG247_IN_SEL_S | |
| GPIO_SIG248_IN_SEL_V | |
| GPIO_SIG248_IN_SEL_S | |
| GPIO_SIG249_IN_SEL_V | |
| GPIO_SIG249_IN_SEL_S | |
| GPIO_SIG250_IN_SEL_V | |
| GPIO_SIG250_IN_SEL_S | |
| GPIO_SIG251_IN_SEL_V | |
| GPIO_SIG251_IN_SEL_S | |
| GPIO_SIG252_IN_SEL_V | |
| GPIO_SIG252_IN_SEL_S | |
| GPIO_SIG253_IN_SEL_V | |
| GPIO_SIG253_IN_SEL_S | |
| GPIO_SIG254_IN_SEL_V | |
| GPIO_SIG254_IN_SEL_S | |
| GPIO_SIG255_IN_SEL_V | |
| GPIO_SIG255_IN_SEL_S | |
| GPIO_STATUS1_REG | |
| GPIO_STATUS1_INT | |
| GPIO_STATUS1_INT_V | |
| GPIO_STATUS1_INT_S | |
| GPIO_STATUS1_INT_W1TS | |
| GPIO_STATUS1_INT_W1TS_V | |
| GPIO_STATUS1_INT_W1TS_S | |
| GPIO_STATUS1_INT_W1TC | |
| GPIO_STATUS1_INT_W1TC_V | |
| GPIO_STATUS1_INT_W1TC_S | |
| GPIO_STATUS1_W1TS_REG | |
| GPIO_STATUS1_W1TC_REG | |
| GPIO_STATUS_INT | |
| GPIO_STATUS_INT_S | |
| GPIO_STATUS_INT_V | |
| GPIO_STATUS_INT_W1TS | |
| GPIO_STATUS_INT_W1TS_V | |
| GPIO_STATUS_INT_W1TS_S | |
| GPIO_STATUS_INT_W1TC | |
| GPIO_STATUS_INT_W1TC_V | |
| GPIO_STATUS_INT_W1TC_S | |
| GPIO_STATUS_REG | |
| GPIO_STATUS_W1TS_REG | |
| GPIO_STATUS_W1TC_REG | |
| GPIO_STRAPPING | |
| GPIO_STRAPPING_S | |
| GPIO_STRAPPING_V | |
| GPIO_STRAP_REG | |
| GPIO_WLAN_ACTIVE_IDX | |
| GPIO_cali_conf_REG | |
| GPIO_cali_data_REG | |
| HAVE_INITFINI_ARRAY | |
| HOST_CARD_DETECT_N_1_IDX | |
| HOST_CARD_DETECT_N_2_IDX | |
| HOST_CARD_INT_N_1_IDX | |
| HOST_CARD_INT_N_2_IDX | |
| HOST_CARD_WRITE_PRT_1_IDX | |
| HOST_CARD_WRITE_PRT_2_IDX | |
| HOST_CCMD_OD_PULLUP_EN_N_IDX | |
| HOST_RST_N_1_IDX | |
| HOST_RST_N_2_IDX | |
| HSPICLK_IN_IDX | |
| HSPICLK_OUT_IDX | |
| HSPICS0_IN_IDX | |
| HSPICS0_OUT_IDX | |
| HSPICS1_IN_IDX | |
| HSPICS1_OUT_IDX | |
| HSPICS2_IN_IDX | |
| HSPICS2_OUT_IDX | |
| HSPID4_IN_IDX | |
| HSPID4_OUT_IDX | |
| HSPID5_IN_IDX | |
| HSPID5_OUT_IDX | |
| HSPID6_IN_IDX | |
| HSPID6_OUT_IDX | |
| HSPID7_IN_IDX | |
| HSPID7_OUT_IDX | |
| HSPID_IN_IDX | |
| HSPID_OUT_IDX | |
| HSPIHD_IN_IDX | |
| HSPIHD_OUT_IDX | |
| HSPIQ_IN_IDX | |
| HSPIQ_OUT_IDX | |
| HSPIWP_IN_IDX | |
| HSPIWP_OUT_IDX | |
| HSPI_IOMUX_PIN_NUM_CLK | |
| HSPI_IOMUX_PIN_NUM_CS | |
| HSPI_IOMUX_PIN_NUM_HD | |
| HSPI_IOMUX_PIN_NUM_MISO | |
| HSPI_IOMUX_PIN_NUM_MOSI | |
| HSPI_IOMUX_PIN_NUM_WP | |
| I2CM_SCL_O_IDX | |
| I2CM_SDA_I_IDX | |
| I2CM_SDA_O_IDX | |
| I2C_APB_CLK_FREQ | |
| I2C_FIFO_LEN | |
| I2S_SIG_LOOPBACK_V | |
| I2S_SIG_LOOPBACK_S | |
| I2S_RX_MSB_RIGHT_V | |
| I2S_RX_MSB_RIGHT_S | |
| I2S_TX_MSB_RIGHT_V | |
| I2S_TX_MSB_RIGHT_S | |
| I2S_RX_MONO_V | |
| I2S_RX_MONO_S | |
| I2S_TX_MONO_V | |
| I2S_TX_MONO_S | |
| I2S_RX_SHORT_SYNC_V | |
| I2S_RX_SHORT_SYNC_S | |
| I2S_TX_SHORT_SYNC_V | |
| I2S_TX_SHORT_SYNC_S | |
| I2S_RX_MSB_SHIFT_V | |
| I2S_RX_MSB_SHIFT_S | |
| I2S_TX_MSB_SHIFT_V | |
| I2S_TX_MSB_SHIFT_S | |
| I2S_RX_RIGHT_FIRST_V | |
| I2S_RX_RIGHT_FIRST_S | |
| I2S_TX_RIGHT_FIRST_V | |
| I2S_TX_RIGHT_FIRST_S | |
| I2S_RX_SLAVE_MOD_V | |
| I2S_RX_SLAVE_MOD_S | |
| I2S_TX_SLAVE_MOD_V | |
| I2S_TX_SLAVE_MOD_S | |
| I2S_RX_START_V | |
| I2S_RX_START_S | |
| I2S_TX_START_V | |
| I2S_TX_START_S | |
| I2S_RX_FIFO_RESET_V | |
| I2S_RX_FIFO_RESET_S | |
| I2S_TX_FIFO_RESET_V | |
| I2S_TX_FIFO_RESET_S | |
| I2S_RX_RESET_V | |
| I2S_RX_RESET_S | |
| I2S_TX_RESET_V | |
| I2S_TX_RESET_S | |
| I2S_OUT_TOTAL_EOF_INT_RAW_V | |
| I2S_OUT_TOTAL_EOF_INT_RAW_S | |
| I2S_IN_DSCR_EMPTY_INT_RAW_V | |
| I2S_IN_DSCR_EMPTY_INT_RAW_S | |
| I2S_OUT_DSCR_ERR_INT_RAW_V | |
| I2S_OUT_DSCR_ERR_INT_RAW_S | |
| I2S_IN_DSCR_ERR_INT_RAW_V | |
| I2S_IN_DSCR_ERR_INT_RAW_S | |
| I2S_OUT_EOF_INT_RAW_V | |
| I2S_OUT_EOF_INT_RAW_S | |
| I2S_OUT_DONE_INT_RAW_V | |
| I2S_OUT_DONE_INT_RAW_S | |
| I2S_IN_ERR_EOF_INT_RAW_V | |
| I2S_IN_ERR_EOF_INT_RAW_S | |
| I2S_IN_SUC_EOF_INT_RAW_V | |
| I2S_IN_SUC_EOF_INT_RAW_S | |
| I2S_IN_DONE_INT_RAW_V | |
| I2S_IN_DONE_INT_RAW_S | |
| I2S_TX_HUNG_INT_RAW_V | |
| I2S_TX_HUNG_INT_RAW_S | |
| I2S_RX_HUNG_INT_RAW_V | |
| I2S_RX_HUNG_INT_RAW_S | |
| I2S_TX_REMPTY_INT_RAW_V | |
| I2S_TX_REMPTY_INT_RAW_S | |
| I2S_TX_WFULL_INT_RAW_V | |
| I2S_TX_WFULL_INT_RAW_S | |
| I2S_RX_REMPTY_INT_RAW_V | |
| I2S_RX_REMPTY_INT_RAW_S | |
| I2S_RX_WFULL_INT_RAW_V | |
| I2S_RX_WFULL_INT_RAW_S | |
| I2S_TX_PUT_DATA_INT_RAW_V | |
| I2S_TX_PUT_DATA_INT_RAW_S | |
| I2S_RX_TAKE_DATA_INT_RAW_V | |
| I2S_RX_TAKE_DATA_INT_RAW_S | |
| I2S_OUT_TOTAL_EOF_INT_ST_V | |
| I2S_OUT_TOTAL_EOF_INT_ST_S | |
| I2S_IN_DSCR_EMPTY_INT_ST_V | |
| I2S_IN_DSCR_EMPTY_INT_ST_S | |
| I2S_OUT_DSCR_ERR_INT_ST_V | |
| I2S_OUT_DSCR_ERR_INT_ST_S | |
| I2S_IN_DSCR_ERR_INT_ST_V | |
| I2S_IN_DSCR_ERR_INT_ST_S | |
| I2S_OUT_EOF_INT_ST_V | |
| I2S_OUT_EOF_INT_ST_S | |
| I2S_OUT_DONE_INT_ST_V | |
| I2S_OUT_DONE_INT_ST_S | |
| I2S_IN_ERR_EOF_INT_ST_V | |
| I2S_IN_ERR_EOF_INT_ST_S | |
| I2S_IN_SUC_EOF_INT_ST_V | |
| I2S_IN_SUC_EOF_INT_ST_S | |
| I2S_IN_DONE_INT_ST_V | |
| I2S_IN_DONE_INT_ST_S | |
| I2S_TX_HUNG_INT_ST_V | |
| I2S_TX_HUNG_INT_ST_S | |
| I2S_RX_HUNG_INT_ST_V | |
| I2S_RX_HUNG_INT_ST_S | |
| I2S_TX_REMPTY_INT_ST_V | |
| I2S_TX_REMPTY_INT_ST_S | |
| I2S_TX_WFULL_INT_ST_V | |
| I2S_TX_WFULL_INT_ST_S | |
| I2S_RX_REMPTY_INT_ST_V | |
| I2S_RX_REMPTY_INT_ST_S | |
| I2S_RX_WFULL_INT_ST_V | |
| I2S_RX_WFULL_INT_ST_S | |
| I2S_TX_PUT_DATA_INT_ST_V | |
| I2S_TX_PUT_DATA_INT_ST_S | |
| I2S_RX_TAKE_DATA_INT_ST_V | |
| I2S_RX_TAKE_DATA_INT_ST_S | |
| I2S_OUT_TOTAL_EOF_INT_ENA_V | |
| I2S_OUT_TOTAL_EOF_INT_ENA_S | |
| I2S_IN_DSCR_EMPTY_INT_ENA_V | |
| I2S_IN_DSCR_EMPTY_INT_ENA_S | |
| I2S_OUT_DSCR_ERR_INT_ENA_V | |
| I2S_OUT_DSCR_ERR_INT_ENA_S | |
| I2S_IN_DSCR_ERR_INT_ENA_V | |
| I2S_IN_DSCR_ERR_INT_ENA_S | |
| I2S_OUT_EOF_INT_ENA_V | |
| I2S_OUT_EOF_INT_ENA_S | |
| I2S_OUT_DONE_INT_ENA_V | |
| I2S_OUT_DONE_INT_ENA_S | |
| I2S_IN_ERR_EOF_INT_ENA_V | |
| I2S_IN_ERR_EOF_INT_ENA_S | |
| I2S_IN_SUC_EOF_INT_ENA_V | |
| I2S_IN_SUC_EOF_INT_ENA_S | |
| I2S_IN_DONE_INT_ENA_V | |
| I2S_IN_DONE_INT_ENA_S | |
| I2S_TX_HUNG_INT_ENA_V | |
| I2S_TX_HUNG_INT_ENA_S | |
| I2S_RX_HUNG_INT_ENA_V | |
| I2S_RX_HUNG_INT_ENA_S | |
| I2S_TX_REMPTY_INT_ENA_V | |
| I2S_TX_REMPTY_INT_ENA_S | |
| I2S_TX_WFULL_INT_ENA_V | |
| I2S_TX_WFULL_INT_ENA_S | |
| I2S_RX_REMPTY_INT_ENA_V | |
| I2S_RX_REMPTY_INT_ENA_S | |
| I2S_RX_WFULL_INT_ENA_V | |
| I2S_RX_WFULL_INT_ENA_S | |
| I2S_TX_PUT_DATA_INT_ENA_V | |
| I2S_TX_PUT_DATA_INT_ENA_S | |
| I2S_RX_TAKE_DATA_INT_ENA_V | |
| I2S_RX_TAKE_DATA_INT_ENA_S | |
| I2S_OUT_TOTAL_EOF_INT_CLR_V | |
| I2S_OUT_TOTAL_EOF_INT_CLR_S | |
| I2S_IN_DSCR_EMPTY_INT_CLR_V | |
| I2S_IN_DSCR_EMPTY_INT_CLR_S | |
| I2S_OUT_DSCR_ERR_INT_CLR_V | |
| I2S_OUT_DSCR_ERR_INT_CLR_S | |
| I2S_IN_DSCR_ERR_INT_CLR_V | |
| I2S_IN_DSCR_ERR_INT_CLR_S | |
| I2S_OUT_EOF_INT_CLR_V | |
| I2S_OUT_EOF_INT_CLR_S | |
| I2S_OUT_DONE_INT_CLR_V | |
| I2S_OUT_DONE_INT_CLR_S | |
| I2S_IN_ERR_EOF_INT_CLR_V | |
| I2S_IN_ERR_EOF_INT_CLR_S | |
| I2S_IN_SUC_EOF_INT_CLR_V | |
| I2S_IN_SUC_EOF_INT_CLR_S | |
| I2S_IN_DONE_INT_CLR_V | |
| I2S_IN_DONE_INT_CLR_S | |
| I2S_TX_HUNG_INT_CLR_V | |
| I2S_TX_HUNG_INT_CLR_S | |
| I2S_RX_HUNG_INT_CLR_V | |
| I2S_RX_HUNG_INT_CLR_S | |
| I2S_TX_REMPTY_INT_CLR_V | |
| I2S_TX_REMPTY_INT_CLR_S | |
| I2S_TX_WFULL_INT_CLR_V | |
| I2S_TX_WFULL_INT_CLR_S | |
| I2S_RX_REMPTY_INT_CLR_V | |
| I2S_RX_REMPTY_INT_CLR_S | |
| I2S_RX_WFULL_INT_CLR_V | |
| I2S_RX_WFULL_INT_CLR_S | |
| I2S_PUT_DATA_INT_CLR_V | |
| I2S_PUT_DATA_INT_CLR_S | |
| I2S_TAKE_DATA_INT_CLR_V | |
| I2S_TAKE_DATA_INT_CLR_S | |
| I2S_TX_BCK_IN_INV_V | |
| I2S_TX_BCK_IN_INV_S | |
| I2S_DATA_ENABLE_DELAY | |
| I2S_DATA_ENABLE_DELAY_V | |
| I2S_DATA_ENABLE_DELAY_S | |
| I2S_RX_DSYNC_SW_V | |
| I2S_RX_DSYNC_SW_S | |
| I2S_TX_DSYNC_SW_V | |
| I2S_TX_DSYNC_SW_S | |
| I2S_RX_BCK_OUT_DELAY | |
| I2S_RX_BCK_OUT_DELAY_V | |
| I2S_RX_BCK_OUT_DELAY_S | |
| I2S_RX_WS_OUT_DELAY | |
| I2S_RX_WS_OUT_DELAY_V | |
| I2S_RX_WS_OUT_DELAY_S | |
| I2S_TX_SD_OUT_DELAY | |
| I2S_TX_SD_OUT_DELAY_V | |
| I2S_TX_SD_OUT_DELAY_S | |
| I2S_TX_WS_OUT_DELAY | |
| I2S_TX_WS_OUT_DELAY_V | |
| I2S_TX_WS_OUT_DELAY_S | |
| I2S_TX_BCK_OUT_DELAY | |
| I2S_TX_BCK_OUT_DELAY_V | |
| I2S_TX_BCK_OUT_DELAY_S | |
| I2S_RX_SD_IN_DELAY | |
| I2S_RX_SD_IN_DELAY_V | |
| I2S_RX_SD_IN_DELAY_S | |
| I2S_RX_WS_IN_DELAY | |
| I2S_RX_WS_IN_DELAY_V | |
| I2S_RX_WS_IN_DELAY_S | |
| I2S_RX_BCK_IN_DELAY | |
| I2S_RX_BCK_IN_DELAY_V | |
| I2S_RX_BCK_IN_DELAY_S | |
| I2S_TX_WS_IN_DELAY | |
| I2S_TX_WS_IN_DELAY_V | |
| I2S_TX_WS_IN_DELAY_S | |
| I2S_TX_BCK_IN_DELAY | |
| I2S_TX_BCK_IN_DELAY_V | |
| I2S_TX_BCK_IN_DELAY_S | |
| I2S_RX_FIFO_MOD_FORCE_EN_V | |
| I2S_RX_FIFO_MOD_FORCE_EN_S | |
| I2S_TX_FIFO_MOD_FORCE_EN_V | |
| I2S_TX_FIFO_MOD_FORCE_EN_S | |
| I2S_RX_FIFO_MOD | |
| I2S_RX_FIFO_MOD_V | |
| I2S_RX_FIFO_MOD_S | |
| I2S_TX_FIFO_MOD | |
| I2S_TX_FIFO_MOD_V | |
| I2S_TX_FIFO_MOD_S | |
| I2S_DSCR_EN_V | |
| I2S_DSCR_EN_S | |
| I2S_TX_DATA_NUM | |
| I2S_TX_DATA_NUM_V | |
| I2S_TX_DATA_NUM_S | |
| I2S_RX_DATA_NUM | |
| I2S_RX_DATA_NUM_V | |
| I2S_RX_DATA_NUM_S | |
| I2S_RX_EOF_NUM | |
| I2S_RX_EOF_NUM_V | |
| I2S_RX_EOF_NUM_S | |
| I2S_SIGLE_DATA | |
| I2S_SIGLE_DATA_V | |
| I2S_SIGLE_DATA_S | |
| I2S_RX_CHAN_MOD | |
| I2S_RX_CHAN_MOD_V | |
| I2S_RX_CHAN_MOD_S | |
| I2S_TX_CHAN_MOD | |
| I2S_TX_CHAN_MOD_V | |
| I2S_TX_CHAN_MOD_S | |
| I2S_OUTLINK_PARK_V | |
| I2S_OUTLINK_PARK_S | |
| I2S_OUTLINK_RESTART_V | |
| I2S_OUTLINK_RESTART_S | |
| I2S_OUTLINK_START_V | |
| I2S_OUTLINK_START_S | |
| I2S_OUTLINK_STOP_V | |
| I2S_OUTLINK_STOP_S | |
| I2S_OUTLINK_ADDR | |
| I2S_OUTLINK_ADDR_V | |
| I2S_OUTLINK_ADDR_S | |
| I2S_INLINK_PARK_V | |
| I2S_INLINK_PARK_S | |
| I2S_INLINK_RESTART_V | |
| I2S_INLINK_RESTART_S | |
| I2S_INLINK_START_V | |
| I2S_INLINK_START_S | |
| I2S_INLINK_STOP_V | |
| I2S_INLINK_STOP_S | |
| I2S_INLINK_ADDR | |
| I2S_INLINK_ADDR_V | |
| I2S_INLINK_ADDR_S | |
| I2S_OUT_EOF_DES_ADDR | |
| I2S_OUT_EOF_DES_ADDR_V | |
| I2S_OUT_EOF_DES_ADDR_S | |
| I2S_IN_SUC_EOF_DES_ADDR | |
| I2S_IN_SUC_EOF_DES_ADDR_V | |
| I2S_IN_SUC_EOF_DES_ADDR_S | |
| I2S_OUT_EOF_BFR_DES_ADDR | |
| I2S_OUT_EOF_BFR_DES_ADDR_V | |
| I2S_OUT_EOF_BFR_DES_ADDR_S | |
| I2S_AHB_TESTADDR | |
| I2S_AHB_TESTADDR_V | |
| I2S_AHB_TESTADDR_S | |
| I2S_AHB_TESTMODE | |
| I2S_AHB_TESTMODE_V | |
| I2S_AHB_TESTMODE_S | |
| I2S_INLINK_DSCR | |
| I2S_INLINK_DSCR_V | |
| I2S_INLINK_DSCR_S | |
| I2S_OUTLINK_DSCR | |
| I2S_OUTLINK_DSCR_V | |
| I2S_OUTLINK_DSCR_S | |
| I2S_MEM_TRANS_EN_V | |
| I2S_MEM_TRANS_EN_S | |
| I2S_CHECK_OWNER_V | |
| I2S_CHECK_OWNER_S | |
| I2S_OUT_DATA_BURST_EN_V | |
| I2S_OUT_DATA_BURST_EN_S | |
| I2S_INDSCR_BURST_EN_V | |
| I2S_INDSCR_BURST_EN_S | |
| I2S_OUTDSCR_BURST_EN_V | |
| I2S_OUTDSCR_BURST_EN_S | |
| I2S_OUT_EOF_MODE_V | |
| I2S_OUT_EOF_MODE_S | |
| I2S_OUT_NO_RESTART_CLR_V | |
| I2S_OUT_NO_RESTART_CLR_S | |
| I2S_OUT_AUTO_WRBACK_V | |
| I2S_OUT_AUTO_WRBACK_S | |
| I2S_IN_LOOP_TEST_V | |
| I2S_IN_LOOP_TEST_S | |
| I2S_OUT_LOOP_TEST_V | |
| I2S_OUT_LOOP_TEST_S | |
| I2S_AHBM_RST_V | |
| I2S_AHBM_RST_S | |
| I2S_AHBM_FIFO_RST_V | |
| I2S_AHBM_FIFO_RST_S | |
| I2S_OUT_RST_V | |
| I2S_OUT_RST_S | |
| I2S_IN_RST_V | |
| I2S_IN_RST_S | |
| I2S_OUTFIFO_PUSH_V | |
| I2S_OUTFIFO_PUSH_S | |
| I2S_OUTFIFO_WDATA | |
| I2S_OUTFIFO_WDATA_V | |
| I2S_OUTFIFO_WDATA_S | |
| I2S_INFIFO_POP_V | |
| I2S_INFIFO_POP_S | |
| I2S_INFIFO_RDATA | |
| I2S_INFIFO_RDATA_V | |
| I2S_INFIFO_RDATA_S | |
| I2S_LC_FIFO_TIMEOUT_ENA_V | |
| I2S_LC_FIFO_TIMEOUT_ENA_S | |
| I2S_LC_FIFO_TIMEOUT_SHIFT | |
| I2S_LC_FIFO_TIMEOUT_SHIFT_V | |
| I2S_LC_FIFO_TIMEOUT_SHIFT_S | |
| I2S_LC_FIFO_TIMEOUT | |
| I2S_LC_FIFO_TIMEOUT_V | |
| I2S_LC_FIFO_TIMEOUT_S | |
| I2S_CVSD_Y_MIN | |
| I2S_CVSD_Y_MIN_V | |
| I2S_CVSD_Y_MIN_S | |
| I2S_CVSD_Y_MAX | |
| I2S_CVSD_Y_MAX_V | |
| I2S_CVSD_Y_MAX_S | |
| I2S_CVSD_SIGMA_MIN | |
| I2S_CVSD_SIGMA_MIN_V | |
| I2S_CVSD_SIGMA_MIN_S | |
| I2S_CVSD_SIGMA_MAX | |
| I2S_CVSD_SIGMA_MAX_V | |
| I2S_CVSD_SIGMA_MAX_S | |
| I2S_CVSD_H | |
| I2S_CVSD_H_V | |
| I2S_CVSD_H_S | |
| I2S_CVSD_BETA | |
| I2S_CVSD_BETA_V | |
| I2S_CVSD_BETA_S | |
| I2S_CVSD_J | |
| I2S_CVSD_J_V | |
| I2S_CVSD_J_S | |
| I2S_CVSD_K | |
| I2S_CVSD_K_V | |
| I2S_CVSD_K_S | |
| I2S_N_MIN_ERR | |
| I2S_N_MIN_ERR_V | |
| I2S_N_MIN_ERR_S | |
| I2S_MAX_SLIDE_SAMPLE | |
| I2S_MAX_SLIDE_SAMPLE_V | |
| I2S_MAX_SLIDE_SAMPLE_S | |
| I2S_SHIFT_RATE | |
| I2S_SHIFT_RATE_V | |
| I2S_SHIFT_RATE_S | |
| I2S_N_ERR_SEG | |
| I2S_N_ERR_SEG_V | |
| I2S_N_ERR_SEG_S | |
| I2S_GOOD_PACK_MAX | |
| I2S_GOOD_PACK_MAX_V | |
| I2S_GOOD_PACK_MAX_S | |
| I2S_SLIDE_WIN_LEN | |
| I2S_SLIDE_WIN_LEN_V | |
| I2S_SLIDE_WIN_LEN_S | |
| I2S_BAD_CEF_ATTEN_PARA_SHIFT | |
| I2S_BAD_CEF_ATTEN_PARA_SHIFT_V | |
| I2S_BAD_CEF_ATTEN_PARA_SHIFT_S | |
| I2S_BAD_CEF_ATTEN_PARA | |
| I2S_BAD_CEF_ATTEN_PARA_V | |
| I2S_BAD_CEF_ATTEN_PARA_S | |
| I2S_MIN_PERIOD | |
| I2S_MIN_PERIOD_V | |
| I2S_MIN_PERIOD_S | |
| I2S_CVSD_SEG_MOD | |
| I2S_CVSD_SEG_MOD_V | |
| I2S_CVSD_SEG_MOD_S | |
| I2S_PLC_EN_V | |
| I2S_PLC_EN_S | |
| I2S_CVSD_DEC_RESET_V | |
| I2S_CVSD_DEC_RESET_S | |
| I2S_CVSD_DEC_START_V | |
| I2S_CVSD_DEC_START_S | |
| I2S_ESCO_CVSD_INF_EN_V | |
| I2S_ESCO_CVSD_INF_EN_S | |
| I2S_ESCO_CVSD_DEC_PACK_ERR_V | |
| I2S_ESCO_CVSD_DEC_PACK_ERR_S | |
| I2S_ESCO_CHAN_MOD_V | |
| I2S_ESCO_CHAN_MOD_S | |
| I2S_ESCO_EN_V | |
| I2S_ESCO_EN_S | |
| I2S_CVSD_ENC_RESET_V | |
| I2S_CVSD_ENC_RESET_S | |
| I2S_CVSD_ENC_START_V | |
| I2S_CVSD_ENC_START_S | |
| I2S_TX_ZEROS_RM_EN_V | |
| I2S_TX_ZEROS_RM_EN_S | |
| I2S_TX_STOP_EN_V | |
| I2S_TX_STOP_EN_S | |
| I2S_RX_PCM_BYPASS_V | |
| I2S_RX_PCM_BYPASS_S | |
| I2S_RX_PCM_CONF | |
| I2S_RX_PCM_CONF_V | |
| I2S_RX_PCM_CONF_S | |
| I2S_TX_PCM_BYPASS_V | |
| I2S_TX_PCM_BYPASS_S | |
| I2S_TX_PCM_CONF | |
| I2S_TX_PCM_CONF_V | |
| I2S_TX_PCM_CONF_S | |
| I2S_PLC_MEM_FORCE_PU_V | |
| I2S_PLC_MEM_FORCE_PU_S | |
| I2S_PLC_MEM_FORCE_PD_V | |
| I2S_PLC_MEM_FORCE_PD_S | |
| I2S_FIFO_FORCE_PU_V | |
| I2S_FIFO_FORCE_PU_S | |
| I2S_FIFO_FORCE_PD_V | |
| I2S_FIFO_FORCE_PD_S | |
| I2S_INTER_VALID_EN_V | |
| I2S_INTER_VALID_EN_S | |
| I2S_EXT_ADC_START_EN_V | |
| I2S_EXT_ADC_START_EN_S | |
| I2S_LCD_EN_V | |
| I2S_LCD_EN_S | |
| I2S_DATA_ENABLE_V | |
| I2S_DATA_ENABLE_S | |
| I2S_DATA_ENABLE_TEST_EN_V | |
| I2S_DATA_ENABLE_TEST_EN_S | |
| I2S_CAMERA_EN_V | |
| I2S_CAMERA_EN_S | |
| I2S_CLKA_ENA_V | |
| I2S_CLKA_ENA_S | |
| I2S_CLK_EN_V | |
| I2S_CLK_EN_S | |
| I2S_CLKM_DIV_A | |
| I2S_CLKM_DIV_A_V | |
| I2S_CLKM_DIV_A_S | |
| I2S_CLKM_DIV_B | |
| I2S_CLKM_DIV_B_V | |
| I2S_CLKM_DIV_B_S | |
| I2S_CLKM_DIV_NUM | |
| I2S_CLKM_DIV_NUM_V | |
| I2S_CLKM_DIV_NUM_S | |
| I2S_RX_BITS_MOD | |
| I2S_RX_BITS_MOD_V | |
| I2S_RX_BITS_MOD_S | |
| I2S_TX_BITS_MOD | |
| I2S_TX_BITS_MOD_V | |
| I2S_TX_BITS_MOD_S | |
| I2S_RX_BCK_DIV_NUM | |
| I2S_RX_BCK_DIV_NUM_V | |
| I2S_RX_BCK_DIV_NUM_S | |
| I2S_TX_BCK_DIV_NUM | |
| I2S_TX_BCK_DIV_NUM_V | |
| I2S_TX_BCK_DIV_NUM_S | |
| I2S_TX_PDM_HP_BYPASS_V | |
| I2S_TX_PDM_HP_BYPASS_S | |
| I2S_TX_PDM_SIGMADELTA_IN_SHIFT | |
| I2S_TX_PDM_SIGMADELTA_IN_SHIFT_V | |
| I2S_TX_PDM_SIGMADELTA_IN_SHIFT_S | |
| I2S_TX_PDM_SINC_IN_SHIFT | |
| I2S_TX_PDM_SINC_IN_SHIFT_V | |
| I2S_TX_PDM_SINC_IN_SHIFT_S | |
| I2S_TX_PDM_LP_IN_SHIFT | |
| I2S_TX_PDM_LP_IN_SHIFT_V | |
| I2S_TX_PDM_LP_IN_SHIFT_S | |
| I2S_TX_PDM_HP_IN_SHIFT | |
| I2S_TX_PDM_HP_IN_SHIFT_V | |
| I2S_TX_PDM_HP_IN_SHIFT_S | |
| I2S_TX_PDM_PRESCALE | |
| I2S_TX_PDM_PRESCALE_V | |
| I2S_TX_PDM_PRESCALE_S | |
| I2S_RX_PDM_EN_V | |
| I2S_RX_PDM_EN_S | |
| I2S_TX_PDM_EN_V | |
| I2S_TX_PDM_EN_S | |
| I2S_TX_PDM_FP | |
| I2S_TX_PDM_FP_V | |
| I2S_TX_PDM_FP_S | |
| I2S_TX_PDM_FS | |
| I2S_TX_PDM_FS_V | |
| I2S_TX_PDM_FS_S | |
| I2S_RX_FIFO_RESET_BACK_V | |
| I2S_RX_FIFO_RESET_BACK_S | |
| I2S_TX_FIFO_RESET_BACK_V | |
| I2S_TX_FIFO_RESET_BACK_S | |
| I2S_TX_IDLE_V | |
| I2S_TX_IDLE_S | |
| I2S_PIN_NO_CHANGE | |
| I2CEXT0_SCL_IN_IDX | |
| I2CEXT0_SDA_IN_IDX | |
| I2CEXT0_SCL_OUT_IDX | |
| I2CEXT0_SDA_OUT_IDX | |
| I2CEXT1_SCL_IN_IDX | |
| I2CEXT1_SCL_OUT_IDX | |
| I2CEXT1_SDA_IN_IDX | |
| I2CEXT1_SDA_OUT_IDX | |
| I2S0O_WS_IN_IDX | |
| I2S0I_WS_IN_IDX | |
| I2S0O_BCK_IN_IDX | |
| I2S0O_WS_OUT_IDX | |
| I2S0I_BCK_IN_IDX | |
| I2S0I_WS_OUT_IDX | |
| I2S0I_H_SYNC_IDX | |
| I2S0I_V_SYNC_IDX | |
| I2S0O_BCK_OUT_IDX | |
| I2S0I_BCK_OUT_IDX | |
| I2S0I_H_ENABLE_IDX | |
| I2S1O_BCK_IN_IDX | |
| I2S1O_BCK_OUT_IDX | |
| I2S1O_WS_IN_IDX | |
| I2S1O_WS_OUT_IDX | |
| I2S1I_BCK_IN_IDX | |
| I2S1I_BCK_OUT_IDX | |
| I2S1I_WS_IN_IDX | |
| I2S1I_WS_OUT_IDX | |
| I2S1I_H_SYNC_IDX | |
| I2S1I_V_SYNC_IDX | |
| I2S1I_H_ENABLE_IDX | |
| I2S0I_DATA_IN0_IDX | |
| I2S0I_DATA_IN1_IDX | |
| I2S0I_DATA_IN2_IDX | |
| I2S0I_DATA_IN3_IDX | |
| I2S0I_DATA_IN4_IDX | |
| I2S0I_DATA_IN5_IDX | |
| I2S0I_DATA_IN6_IDX | |
| I2S0I_DATA_IN7_IDX | |
| I2S0I_DATA_IN8_IDX | |
| I2S0I_DATA_IN9_IDX | |
| I2S0I_DATA_IN10_IDX | |
| I2S0I_DATA_IN11_IDX | |
| I2S0I_DATA_IN12_IDX | |
| I2S0I_DATA_IN13_IDX | |
| I2S0I_DATA_IN14_IDX | |
| I2S0I_DATA_IN15_IDX | |
| I2S0O_DATA_OUT0_IDX | |
| I2S0O_DATA_OUT1_IDX | |
| I2S0O_DATA_OUT2_IDX | |
| I2S0O_DATA_OUT3_IDX | |
| I2S0O_DATA_OUT4_IDX | |
| I2S0O_DATA_OUT5_IDX | |
| I2S0O_DATA_OUT6_IDX | |
| I2S0O_DATA_OUT7_IDX | |
| I2S0O_DATA_OUT8_IDX | |
| I2S0O_DATA_OUT9_IDX | |
| I2S0O_DATA_OUT10_IDX | |
| I2S0O_DATA_OUT11_IDX | |
| I2S0O_DATA_OUT12_IDX | |
| I2S0O_DATA_OUT13_IDX | |
| I2S0O_DATA_OUT14_IDX | |
| I2S0O_DATA_OUT15_IDX | |
| I2S0O_DATA_OUT16_IDX | |
| I2S0O_DATA_OUT17_IDX | |
| I2S0O_DATA_OUT18_IDX | |
| I2S0O_DATA_OUT19_IDX | |
| I2S0O_DATA_OUT20_IDX | |
| I2S0O_DATA_OUT21_IDX | |
| I2S0O_DATA_OUT22_IDX | |
| I2S0O_DATA_OUT23_IDX | |
| I2S1I_DATA_IN0_IDX | |
| I2S1I_DATA_IN1_IDX | |
| I2S1I_DATA_IN2_IDX | |
| I2S1I_DATA_IN3_IDX | |
| I2S1I_DATA_IN4_IDX | |
| I2S1I_DATA_IN5_IDX | |
| I2S1I_DATA_IN6_IDX | |
| I2S1I_DATA_IN7_IDX | |
| I2S1I_DATA_IN8_IDX | |
| I2S1I_DATA_IN9_IDX | |
| I2S1I_DATA_IN10_IDX | |
| I2S1I_DATA_IN11_IDX | |
| I2S1I_DATA_IN12_IDX | |
| I2S1I_DATA_IN13_IDX | |
| I2S1I_DATA_IN14_IDX | |
| I2S1I_DATA_IN15_IDX | |
| I2S1O_DATA_OUT0_IDX | |
| I2S1O_DATA_OUT1_IDX | |
| I2S1O_DATA_OUT2_IDX | |
| I2S1O_DATA_OUT3_IDX | |
| I2S1O_DATA_OUT4_IDX | |
| I2S1O_DATA_OUT5_IDX | |
| I2S1O_DATA_OUT6_IDX | |
| I2S1O_DATA_OUT7_IDX | |
| I2S1O_DATA_OUT8_IDX | |
| I2S1O_DATA_OUT9_IDX | |
| I2S1O_DATA_OUT10_IDX | |
| I2S1O_DATA_OUT11_IDX | |
| I2S1O_DATA_OUT12_IDX | |
| I2S1O_DATA_OUT13_IDX | |
| I2S1O_DATA_OUT14_IDX | |
| I2S1O_DATA_OUT15_IDX | |
| I2S1O_DATA_OUT16_IDX | |
| I2S1O_DATA_OUT17_IDX | |
| I2S1O_DATA_OUT18_IDX | |
| I2S1O_DATA_OUT19_IDX | |
| I2S1O_DATA_OUT20_IDX | |
| I2S1O_DATA_OUT21_IDX | |
| I2S1O_DATA_OUT22_IDX | |
| I2S1O_DATA_OUT23_IDX | |
| I2S_BAD_OLA_WIN2_PARA | |
| I2S_BAD_OLA_WIN2_PARA_V | |
| I2S_BAD_OLA_WIN2_PARA_S | |
| I2S_BAD_OLA_WIN2_PARA_SHIFT | |
| I2S_BAD_OLA_WIN2_PARA_SHIFT_V | |
| I2S_BAD_OLA_WIN2_PARA_SHIFT_S | |
| I2S_ESCO_CVSD_PACK_LEN_8K | |
| I2S_ESCO_CVSD_PACK_LEN_8K_V | |
| I2S_ESCO_CVSD_PACK_LEN_8K_S | |
| I2S_I2SDATE | |
| I2S_I2SDATE_V | |
| I2S_I2SDATE_S | |
| I2S_INLINK_DSCR_BF0 | |
| I2S_INLINK_DSCR_BF0_V | |
| I2S_INLINK_DSCR_BF0_S | |
| I2S_INLINK_DSCR_BF1 | |
| I2S_INLINK_DSCR_BF1_V | |
| I2S_INLINK_DSCR_BF1_S | |
| I2S_LCD_TX_SDX2_EN_V | |
| I2S_LCD_TX_SDX2_EN_S | |
| I2S_LCD_TX_WRX2_EN_V | |
| I2S_LCD_TX_WRX2_EN_S | |
| I2S_LC_STATE0 | |
| I2S_LC_STATE0_V | |
| I2S_LC_STATE0_S | |
| I2S_LC_STATE1 | |
| I2S_LC_STATE1_V | |
| I2S_LC_STATE1_S | |
| I2S_OUTLINK_DSCR_BF0 | |
| I2S_OUTLINK_DSCR_BF0_V | |
| I2S_OUTLINK_DSCR_BF0_S | |
| I2S_OUTLINK_DSCR_BF1 | |
| I2S_OUTLINK_DSCR_BF1_V | |
| I2S_OUTLINK_DSCR_BF1_S | |
| I2S_PACK_LEN_8K | |
| I2S_PACK_LEN_8K_V | |
| I2S_PACK_LEN_8K_S | |
| I2S_PCM2PDM_CONV_EN_V | |
| I2S_PCM2PDM_CONV_EN_S | |
| I2S_PDM2PCM_CONV_EN_V | |
| I2S_PDM2PCM_CONV_EN_S | |
| I2S_PLC2DMA_EN_V | |
| I2S_PLC2DMA_EN_S | |
| I2S_RX_PDM_SINC_DSR_16_EN_V | |
| I2S_RX_PDM_SINC_DSR_16_EN_S | |
| I2S_SCO_NO_I2S_EN_V | |
| I2S_SCO_NO_I2S_EN_S | |
| I2S_SCO_WITH_I2S_EN_V | |
| I2S_SCO_WITH_I2S_EN_S | |
| I2S_TX_PDM_SINC_OSR2 | |
| I2S_TX_PDM_SINC_OSR2_V | |
| I2S_TX_PDM_SINC_OSR2_S | |
| IBREAKA | |
| IBREAKA_0 | |
| IBREAKA_1 | |
| IBREAKENABLE | |
| ICOUNT | |
| ICOUNTLEVEL | |
| INCLUDE_eTaskGetState | |
| INCLUDE_pcTaskGetTaskName | |
| INCLUDE_pxTaskGetStackStart | |
| INCLUDE_uxTaskGetStackHighWaterMark | |
| INCLUDE_uxTaskPriorityGet | |
| INCLUDE_vTaskCleanUpResources | |
| INCLUDE_vTaskDelay | |
| INCLUDE_vTaskDelayUntil | |
| INCLUDE_vTaskDelete | |
| INCLUDE_vTaskPrioritySet | |
| INCLUDE_vTaskSuspend | |
| INCLUDE_xEventGroupSetBitFromISR | |
| INCLUDE_xQueueGetMutexHolder | |
| INCLUDE_xSemaphoreGetMutexHolder | |
| INCLUDE_xTaskGetCurrentTaskHandle | |
| INCLUDE_xTaskGetIdleTaskHandle | |
| INCLUDE_xTaskGetSchedulerState | |
| INCLUDE_xTaskResumeFromISR | |
| INCLUDE_xTimerGetTimerDaemonTaskHandle | |
| INCLUDE_xTimerPendFunctionCall | |
| INTCLEAR | |
| INTENABLE | |
| INTERRUPT | |
| INTREAD | |
| INTSET | |
| IO_MUX_GPIO0_REG | |
| IO_MUX_GPIO1_REG | |
| IO_MUX_GPIO2_REG | |
| IO_MUX_GPIO3_REG | |
| IO_MUX_GPIO4_REG | |
| IO_MUX_GPIO5_REG | |
| IO_MUX_GPIO6_REG | |
| IO_MUX_GPIO7_REG | |
| IO_MUX_GPIO8_REG | |
| IO_MUX_GPIO9_REG | |
| IO_MUX_GPIO10_REG | |
| IO_MUX_GPIO11_REG | |
| IO_MUX_GPIO12_REG | |
| IO_MUX_GPIO13_REG | |
| IO_MUX_GPIO14_REG | |
| IO_MUX_GPIO15_REG | |
| IO_MUX_GPIO16_REG | |
| IO_MUX_GPIO17_REG | |
| IO_MUX_GPIO18_REG | |
| IO_MUX_GPIO19_REG | |
| IO_MUX_GPIO20_REG | |
| IO_MUX_GPIO21_REG | |
| IO_MUX_GPIO22_REG | |
| IO_MUX_GPIO23_REG | |
| IO_MUX_GPIO24_REG | |
| IO_MUX_GPIO25_REG | |
| IO_MUX_GPIO26_REG | |
| IO_MUX_GPIO27_REG | |
| IO_MUX_GPIO32_REG | |
| IO_MUX_GPIO33_REG | |
| IO_MUX_GPIO34_REG | |
| IO_MUX_GPIO35_REG | |
| IO_MUX_GPIO36_REG | |
| IO_MUX_GPIO37_REG | |
| IO_MUX_GPIO38_REG | |
| IO_MUX_GPIO39_REG | |
| KERNELSTACKSIZE | |
| LBEG | |
| LCOUNT | |
| LEDC_APB_CLK_HZ | |
| LEDC_ERR_DUTY | |
| LEDC_ERR_VAL | |
| LEDC_HS_SIG_OUT0_IDX | |
| LEDC_HS_SIG_OUT1_IDX | |
| LEDC_HS_SIG_OUT2_IDX | |
| LEDC_HS_SIG_OUT3_IDX | |
| LEDC_HS_SIG_OUT4_IDX | |
| LEDC_HS_SIG_OUT5_IDX | |
| LEDC_HS_SIG_OUT6_IDX | |
| LEDC_HS_SIG_OUT7_IDX | |
| LEDC_LS_SIG_OUT0_IDX | |
| LEDC_LS_SIG_OUT1_IDX | |
| LEDC_LS_SIG_OUT2_IDX | |
| LEDC_LS_SIG_OUT3_IDX | |
| LEDC_LS_SIG_OUT4_IDX | |
| LEDC_LS_SIG_OUT5_IDX | |
| LEDC_LS_SIG_OUT6_IDX | |
| LEDC_LS_SIG_OUT7_IDX | |
| LEDC_REF_CLK_HZ | |
| LEND | |
| LLDESC_ADDR_MASK | |
| LLDESC_EOF_MASK | |
| LLDESC_EOF_SHIFT | |
| LLDESC_HW_OWNED | |
| LLDESC_LENGTH_MASK | |
| LLDESC_LENGTH_SHIFT | |
| LLDESC_OWNER_MASK | |
| LLDESC_OWNER_SHIFT | |
| LLDESC_RX_AMPDU_ENTRY_MBLK_NUM | |
| LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE | |
| LLDESC_RX_AMPDU_LEN_MBLK_SIZE | |
| LLDESC_RX_AMPDU_LEN_MLBK_NUM | |
| LLDESC_RX_MBLK_NUM | |
| LLDESC_RX_MBLK_SIZE | |
| LLDESC_RX_SMBLK_SIZE | |
| LLDESC_SIZE_MASK | |
| LLDESC_SIZE_SHIFT | |
| LLDESC_SOSF_MASK | |
| LLDESC_SOSF_SHIFT | |
| LLDESC_SW_OWNED | |
| LLDESC_TX_MBLK_NUM | |
| LLDESC_TX_MBLK_SIZE | |
| L_cuserid | |
| L_tmpnam | |
| MACSTR | |
| MALLOC_CAP_8BIT | |
| MALLOC_CAP_32BIT | |
| MALLOC_CAP_DEFAULT | |
| MALLOC_CAP_DMA | |
| MALLOC_CAP_EXEC | |
| MALLOC_CAP_INTERNAL | |
| MALLOC_CAP_INVALID | |
| MALLOC_CAP_PID2 | |
| MALLOC_CAP_PID3 | |
| MALLOC_CAP_PID4 | |
| MALLOC_CAP_PID5 | |
| MALLOC_CAP_PID6 | |
| MALLOC_CAP_PID7 | |
| MALLOC_CAP_SPIRAM | |
| MB_LEN_MAX | |
| MCU_SEL | |
| MCU_SEL_S | |
| MCU_SEL_V | |
| MEMCTL | |
| MEMCTL_DCWA_BITS | |
| MEMCTL_DCWA_CLR_MASK | |
| MEMCTL_DCWA_MASK | |
| MEMCTL_DCWA_SHIFT | |
| MEMCTL_DCWU_BITS | |
| MEMCTL_DCWU_CLR_MASK | |
| MEMCTL_DCWU_MASK | |
| MEMCTL_DCWU_SHIFT | |
| MEMCTL_DCW_CLR_MASK | |
| MEMCTL_ICWU_BITS | |
| MEMCTL_ICWU_CLR_MASK | |
| MEMCTL_ICWU_MASK | |
| MEMCTL_ICWU_SHIFT | |
| MEMCTL_IDCW_CLR_MASK | |
| MEMCTL_INV_EN | |
| MEMCTL_INV_EN_SHIFT | |
| MEMCTL_L0IBUF_EN | |
| MEMCTL_L0IBUF_EN_SHIFT | |
| MEMCTL_SNOOP_EN | |
| MEMCTL_SNOOP_EN_SHIFT | |
| MESR_ACCTYPE_SHIFT | |
| MESR_DATEXC | |
| MESR_DATEXC_SHIFT | |
| MESR_DME | |
| MESR_DME_SHIFT | |
| MESR_ERRENAB | |
| MESR_ERRENAB_SHIFT | |
| MESR_ERRTEST | |
| MESR_ERRTEST_SHIFT | |
| MESR_ERRTYPE_SHIFT | |
| MESR_INSEXC | |
| MESR_INSEXC_SHIFT | |
| MESR_MEME | |
| MESR_MEME_SHIFT | |
| MESR_MEMTYPE_SHIFT | |
| MESR_RCE | |
| MESR_RCE_SHIFT | |
| MESR_WAYNUM_SHIFT | |
| MISC_REG_0 | |
| MISC_REG_1 | |
| MISC_REG_2 | |
| MISC_REG_3 | |
| MR | |
| MR_0 | |
| MR_1 | |
| MR_2 | |
| MR_3 | |
| NBBY | |
| NL_ARGMAX | |
| PATH_MAX | |
| PCMCLK_IN_IDX | |
| PCMCLK_OUT_IDX | |
| PCMDIN_IDX | |
| PCMDOUT_IDX | |
| PCMFSYNC_IN_IDX | |
| PCMFSYNC_OUT_IDX | |
| PCNT_CTRL_CH0_IN0_IDX | |
| PCNT_CTRL_CH0_IN1_IDX | |
| PCNT_CTRL_CH0_IN2_IDX | |
| PCNT_CTRL_CH0_IN3_IDX | |
| PCNT_CTRL_CH0_IN4_IDX | |
| PCNT_CTRL_CH0_IN5_IDX | |
| PCNT_CTRL_CH0_IN6_IDX | |
| PCNT_CTRL_CH0_IN7_IDX | |
| PCNT_CTRL_CH1_IN0_IDX | |
| PCNT_CTRL_CH1_IN1_IDX | |
| PCNT_CTRL_CH1_IN2_IDX | |
| PCNT_CTRL_CH1_IN3_IDX | |
| PCNT_CTRL_CH1_IN4_IDX | |
| PCNT_CTRL_CH1_IN5_IDX | |
| PCNT_CTRL_CH1_IN6_IDX | |
| PCNT_CTRL_CH1_IN7_IDX | |
| PCNT_SIG_CH0_IN0_IDX | |
| PCNT_SIG_CH0_IN1_IDX | |
| PCNT_SIG_CH0_IN2_IDX | |
| PCNT_SIG_CH0_IN3_IDX | |
| PCNT_SIG_CH0_IN4_IDX | |
| PCNT_SIG_CH0_IN5_IDX | |
| PCNT_SIG_CH0_IN6_IDX | |
| PCNT_SIG_CH0_IN7_IDX | |
| PCNT_SIG_CH1_IN0_IDX | |
| PCNT_SIG_CH1_IN1_IDX | |
| PCNT_SIG_CH1_IN2_IDX | |
| PCNT_SIG_CH1_IN3_IDX | |
| PCNT_SIG_CH1_IN4_IDX | |
| PCNT_SIG_CH1_IN5_IDX | |
| PCNT_SIG_CH1_IN6_IDX | |
| PCNT_SIG_CH1_IN7_IDX | |
| PERIPHS_IO_MUX_GPIO0_U | |
| PERIPHS_IO_MUX_GPIO2_U | |
| PERIPHS_IO_MUX_GPIO4_U | |
| PERIPHS_IO_MUX_GPIO5_U | |
| PERIPHS_IO_MUX_GPIO16_U | |
| PERIPHS_IO_MUX_GPIO17_U | |
| PERIPHS_IO_MUX_GPIO18_U | |
| PERIPHS_IO_MUX_GPIO19_U | |
| PERIPHS_IO_MUX_GPIO20_U | |
| PERIPHS_IO_MUX_GPIO21_U | |
| PERIPHS_IO_MUX_GPIO22_U | |
| PERIPHS_IO_MUX_GPIO23_U | |
| PERIPHS_IO_MUX_GPIO24_U | |
| PERIPHS_IO_MUX_GPIO25_U | |
| PERIPHS_IO_MUX_GPIO26_U | |
| PERIPHS_IO_MUX_GPIO27_U | |
| PERIPHS_IO_MUX_GPIO32_U | |
| PERIPHS_IO_MUX_GPIO33_U | |
| PERIPHS_IO_MUX_GPIO34_U | |
| PERIPHS_IO_MUX_GPIO35_U | |
| PERIPHS_IO_MUX_GPIO36_U | |
| PERIPHS_IO_MUX_GPIO37_U | |
| PERIPHS_IO_MUX_GPIO38_U | |
| PERIPHS_IO_MUX_GPIO39_U | |
| PERIPHS_IO_MUX_MTCK_U | |
| PERIPHS_IO_MUX_MTDI_U | |
| PERIPHS_IO_MUX_MTDO_U | |
| PERIPHS_IO_MUX_MTMS_U | |
| PERIPHS_IO_MUX_SD_CLK_U | |
| PERIPHS_IO_MUX_SD_CMD_U | |
| PERIPHS_IO_MUX_SD_DATA0_U | |
| PERIPHS_IO_MUX_SD_DATA1_U | |
| PERIPHS_IO_MUX_SD_DATA2_U | |
| PERIPHS_IO_MUX_SD_DATA3_U | |
| PERIPHS_IO_MUX_U0TXD_U | |
| PERIPHS_IO_MUX_U0RXD_U | |
| PERIPHS_SPI_ENCRYPT_BASEADDR | |
| PIN_CTRL | |
| PIN_FUNC_GPIO | |
| PRID | |
| PRO_CPU_NUM | |
| PS | |
| PS_CALLINC_MASK | |
| PS_CALLINC_SHIFT | |
| PS_EXCM | |
| PS_EXCM_MASK | |
| PS_EXCM_SHIFT | |
| PS_INTLEVEL_MASK | |
| PS_INTLEVEL_SHIFT | |
| PS_OWB_MASK | |
| PS_OWB_SHIFT | |
| PS_PROG | |
| PS_PROGSTACK_MASK | |
| PS_PROGSTACK_SHIFT | |
| PS_PROG_MASK | |
| PS_PROG_SHIFT | |
| PS_RING_MASK | |
| PS_RING_SHIFT | |
| PS_UM | |
| PS_UM_MASK | |
| PS_UM_SHIFT | |
| PS_WOE | |
| PS_WOE_MASK | |
| PS_WOE_SHIFT | |
| PTHREAD_CREATE_DETACHED | |
| PTHREAD_CREATE_JOINABLE | |
| PTHREAD_EXPLICIT_SCHED | |
| PTHREAD_INHERIT_SCHED | |
| PTHREAD_MUTEX_DEFAULT | |
| PTHREAD_MUTEX_ERRORCHECK | |
| PTHREAD_MUTEX_NORMAL | |
| PTHREAD_MUTEX_RECURSIVE | |
| PTHREAD_SCOPE_PROCESS | |
| PTHREAD_SCOPE_SYSTEM | |
| PWM2_FLTA_IDX | |
| PWM2_FLTB_IDX | |
| PWM3_FLTA_IDX | |
| PWM3_FLTB_IDX | |
| PWM0_CAP0_IN_IDX | |
| PWM0_CAP1_IN_IDX | |
| PWM0_CAP2_IN_IDX | |
| PWM0_F0_IN_IDX | |
| PWM0_F1_IN_IDX | |
| PWM0_F2_IN_IDX | |
| PWM0_OUT0A_IDX | |
| PWM0_OUT0B_IDX | |
| PWM0_OUT1A_IDX | |
| PWM0_OUT1B_IDX | |
| PWM0_OUT2A_IDX | |
| PWM0_OUT2B_IDX | |
| PWM0_SYNC0_IN_IDX | |
| PWM0_SYNC1_IN_IDX | |
| PWM0_SYNC2_IN_IDX | |
| PWM1_CAP0_IN_IDX | |
| PWM1_CAP1_IN_IDX | |
| PWM1_CAP2_IN_IDX | |
| PWM1_F0_IN_IDX | |
| PWM1_F1_IN_IDX | |
| PWM1_F2_IN_IDX | |
| PWM1_OUT0A_IDX | |
| PWM1_OUT0B_IDX | |
| PWM1_OUT1A_IDX | |
| PWM1_OUT1B_IDX | |
| PWM1_OUT2A_IDX | |
| PWM1_OUT2B_IDX | |
| PWM1_SYNC0_IN_IDX | |
| PWM1_SYNC1_IN_IDX | |
| PWM1_SYNC2_IN_IDX | |
| PWM2_CAP1_IN_IDX | |
| PWM2_CAP2_IN_IDX | |
| PWM2_CAP3_IN_IDX | |
| PWM2_OUT1H_IDX | |
| PWM2_OUT1L_IDX | |
| PWM2_OUT2H_IDX | |
| PWM2_OUT2L_IDX | |
| PWM2_OUT3H_IDX | |
| PWM2_OUT3L_IDX | |
| PWM2_OUT4H_IDX | |
| PWM2_OUT4L_IDX | |
| PWM3_CAP1_IN_IDX | |
| PWM3_CAP2_IN_IDX | |
| PWM3_CAP3_IN_IDX | |
| PWM3_OUT1H_IDX | |
| PWM3_OUT1L_IDX | |
| PWM3_OUT2H_IDX | |
| PWM3_OUT2L_IDX | |
| PWM3_OUT3H_IDX | |
| PWM3_OUT3L_IDX | |
| PWM3_OUT4H_IDX | |
| PWM3_OUT4L_IDX | |
| P_tmpdir | |
| RAND_MAX | |
| REF_CLK_FREQ | |
| RMT_APB_CONF_REG | |
| RMT_APB_FIFO_MASK_S | |
| RMT_APB_FIFO_MASK_V | |
| RMT_APB_MEM_ADDR_CH0 | |
| RMT_APB_MEM_ADDR_CH0_V | |
| RMT_APB_MEM_ADDR_CH0_S | |
| RMT_APB_MEM_ADDR_CH1 | |
| RMT_APB_MEM_ADDR_CH1_V | |
| RMT_APB_MEM_ADDR_CH1_S | |
| RMT_APB_MEM_ADDR_CH2 | |
| RMT_APB_MEM_ADDR_CH2_V | |
| RMT_APB_MEM_ADDR_CH2_S | |
| RMT_APB_MEM_ADDR_CH3 | |
| RMT_APB_MEM_ADDR_CH3_V | |
| RMT_APB_MEM_ADDR_CH3_S | |
| RMT_APB_MEM_ADDR_CH4 | |
| RMT_APB_MEM_ADDR_CH4_V | |
| RMT_APB_MEM_ADDR_CH4_S | |
| RMT_APB_MEM_ADDR_CH5 | |
| RMT_APB_MEM_ADDR_CH5_V | |
| RMT_APB_MEM_ADDR_CH5_S | |
| RMT_APB_MEM_ADDR_CH6 | |
| RMT_APB_MEM_ADDR_CH6_V | |
| RMT_APB_MEM_ADDR_CH6_S | |
| RMT_APB_MEM_ADDR_CH7 | |
| RMT_APB_MEM_ADDR_CH7_V | |
| RMT_APB_MEM_ADDR_CH7_S | |
| RMT_APB_MEM_RST_CH0_V | |
| RMT_APB_MEM_RST_CH0_S | |
| RMT_APB_MEM_RST_CH1_V | |
| RMT_APB_MEM_RST_CH1_S | |
| RMT_APB_MEM_RST_CH2_V | |
| RMT_APB_MEM_RST_CH2_S | |
| RMT_APB_MEM_RST_CH3_V | |
| RMT_APB_MEM_RST_CH3_S | |
| RMT_APB_MEM_RST_CH4_V | |
| RMT_APB_MEM_RST_CH4_S | |
| RMT_APB_MEM_RST_CH5_V | |
| RMT_APB_MEM_RST_CH5_S | |
| RMT_APB_MEM_RST_CH6_V | |
| RMT_APB_MEM_RST_CH6_S | |
| RMT_APB_MEM_RST_CH7_V | |
| RMT_APB_MEM_RST_CH7_S | |
| RMT_CARRIER_EN_CH0_V | |
| RMT_CARRIER_EN_CH0_S | |
| RMT_CARRIER_EN_CH1_V | |
| RMT_CARRIER_EN_CH1_S | |
| RMT_CARRIER_EN_CH2_V | |
| RMT_CARRIER_EN_CH2_S | |
| RMT_CARRIER_EN_CH3_V | |
| RMT_CARRIER_EN_CH3_S | |
| RMT_CARRIER_EN_CH4_V | |
| RMT_CARRIER_EN_CH4_S | |
| RMT_CARRIER_EN_CH5_V | |
| RMT_CARRIER_EN_CH5_S | |
| RMT_CARRIER_EN_CH6_V | |
| RMT_CARRIER_EN_CH6_S | |
| RMT_CARRIER_EN_CH7_V | |
| RMT_CARRIER_EN_CH7_S | |
| RMT_CARRIER_HIGH_CH0 | |
| RMT_CARRIER_HIGH_CH0_V | |
| RMT_CARRIER_HIGH_CH0_S | |
| RMT_CARRIER_HIGH_CH1 | |
| RMT_CARRIER_HIGH_CH1_V | |
| RMT_CARRIER_HIGH_CH1_S | |
| RMT_CARRIER_HIGH_CH2 | |
| RMT_CARRIER_HIGH_CH2_V | |
| RMT_CARRIER_HIGH_CH2_S | |
| RMT_CARRIER_HIGH_CH3 | |
| RMT_CARRIER_HIGH_CH3_V | |
| RMT_CARRIER_HIGH_CH3_S | |
| RMT_CARRIER_HIGH_CH4 | |
| RMT_CARRIER_HIGH_CH4_V | |
| RMT_CARRIER_HIGH_CH4_S | |
| RMT_CARRIER_HIGH_CH5 | |
| RMT_CARRIER_HIGH_CH5_V | |
| RMT_CARRIER_HIGH_CH5_S | |
| RMT_CARRIER_HIGH_CH6 | |
| RMT_CARRIER_HIGH_CH6_V | |
| RMT_CARRIER_HIGH_CH6_S | |
| RMT_CARRIER_HIGH_CH7 | |
| RMT_CARRIER_HIGH_CH7_V | |
| RMT_CARRIER_HIGH_CH7_S | |
| RMT_CARRIER_LOW_CH0 | |
| RMT_CARRIER_LOW_CH0_V | |
| RMT_CARRIER_LOW_CH0_S | |
| RMT_CARRIER_LOW_CH1 | |
| RMT_CARRIER_LOW_CH1_V | |
| RMT_CARRIER_LOW_CH1_S | |
| RMT_CARRIER_LOW_CH2 | |
| RMT_CARRIER_LOW_CH2_V | |
| RMT_CARRIER_LOW_CH2_S | |
| RMT_CARRIER_LOW_CH3 | |
| RMT_CARRIER_LOW_CH3_V | |
| RMT_CARRIER_LOW_CH3_S | |
| RMT_CARRIER_LOW_CH4 | |
| RMT_CARRIER_LOW_CH4_V | |
| RMT_CARRIER_LOW_CH4_S | |
| RMT_CARRIER_LOW_CH5 | |
| RMT_CARRIER_LOW_CH5_V | |
| RMT_CARRIER_LOW_CH5_S | |
| RMT_CARRIER_LOW_CH6 | |
| RMT_CARRIER_LOW_CH6_V | |
| RMT_CARRIER_LOW_CH6_S | |
| RMT_CARRIER_LOW_CH7 | |
| RMT_CARRIER_LOW_CH7_V | |
| RMT_CARRIER_LOW_CH7_S | |
| RMT_CARRIER_OUT_LV_CH0_V | |
| RMT_CARRIER_OUT_LV_CH0_S | |
| RMT_CARRIER_OUT_LV_CH1_V | |
| RMT_CARRIER_OUT_LV_CH1_S | |
| RMT_CARRIER_OUT_LV_CH2_V | |
| RMT_CARRIER_OUT_LV_CH2_S | |
| RMT_CARRIER_OUT_LV_CH3_V | |
| RMT_CARRIER_OUT_LV_CH3_S | |
| RMT_CARRIER_OUT_LV_CH4_V | |
| RMT_CARRIER_OUT_LV_CH4_S | |
| RMT_CARRIER_OUT_LV_CH5_V | |
| RMT_CARRIER_OUT_LV_CH5_S | |
| RMT_CARRIER_OUT_LV_CH6_V | |
| RMT_CARRIER_OUT_LV_CH6_S | |
| RMT_CARRIER_OUT_LV_CH7_V | |
| RMT_CARRIER_OUT_LV_CH7_S | |
| RMT_CH0DATA_REG | |
| RMT_CH0ADDR_REG | |
| RMT_CH0STATUS_REG | |
| RMT_CH0_TX_LIM_REG | |
| RMT_CH0_ERR_INT_ST_V | |
| RMT_CH0_ERR_INT_ST_S | |
| RMT_CH0_ERR_INT_RAW_V | |
| RMT_CH0_ERR_INT_RAW_S | |
| RMT_CH0_ERR_INT_ENA_V | |
| RMT_CH0_ERR_INT_ENA_S | |
| RMT_CH0_ERR_INT_CLR_V | |
| RMT_CH0_ERR_INT_CLR_S | |
| RMT_CH0_RX_END_INT_ST_V | |
| RMT_CH0_RX_END_INT_ST_S | |
| RMT_CH0_TX_END_INT_ST_V | |
| RMT_CH0_TX_END_INT_ST_S | |
| RMT_CH0CARRIER_DUTY_REG | |
| RMT_CH0_RX_END_INT_RAW_V | |
| RMT_CH0_RX_END_INT_RAW_S | |
| RMT_CH0_TX_END_INT_RAW_V | |
| RMT_CH0_TX_END_INT_RAW_S | |
| RMT_CH0_RX_END_INT_ENA_V | |
| RMT_CH0_RX_END_INT_ENA_S | |
| RMT_CH0_TX_END_INT_ENA_V | |
| RMT_CH0_TX_END_INT_ENA_S | |
| RMT_CH0_RX_END_INT_CLR_V | |
| RMT_CH0_RX_END_INT_CLR_S | |
| RMT_CH0_TX_END_INT_CLR_V | |
| RMT_CH0_TX_END_INT_CLR_S | |
| RMT_CH0_TX_THR_EVENT_INT_ST_V | |
| RMT_CH0_TX_THR_EVENT_INT_ST_S | |
| RMT_CH0_TX_THR_EVENT_INT_RAW_V | |
| RMT_CH0_TX_THR_EVENT_INT_RAW_S | |
| RMT_CH0_TX_THR_EVENT_INT_ENA_V | |
| RMT_CH0_TX_THR_EVENT_INT_ENA_S | |
| RMT_CH0_TX_THR_EVENT_INT_CLR_V | |
| RMT_CH0_TX_THR_EVENT_INT_CLR_S | |
| RMT_CH1DATA_REG | |
| RMT_CH1STATUS_REG | |
| RMT_CH1ADDR_REG | |
| RMT_CH1_TX_THR_EVENT_INT_RAW_V | |
| RMT_CH1_TX_THR_EVENT_INT_RAW_S | |
| RMT_CH1_ERR_INT_RAW_V | |
| RMT_CH1_ERR_INT_RAW_S | |
| RMT_CH1_RX_END_INT_RAW_V | |
| RMT_CH1_RX_END_INT_RAW_S | |
| RMT_CH1_TX_END_INT_RAW_V | |
| RMT_CH1_TX_END_INT_RAW_S | |
| RMT_CH1_TX_THR_EVENT_INT_ST_V | |
| RMT_CH1_TX_THR_EVENT_INT_ST_S | |
| RMT_CH1_ERR_INT_ST_V | |
| RMT_CH1_ERR_INT_ST_S | |
| RMT_CH1_RX_END_INT_ST_V | |
| RMT_CH1_RX_END_INT_ST_S | |
| RMT_CH1_TX_END_INT_ST_V | |
| RMT_CH1_TX_END_INT_ST_S | |
| RMT_CH1_TX_THR_EVENT_INT_ENA_V | |
| RMT_CH1_TX_THR_EVENT_INT_ENA_S | |
| RMT_CH1_ERR_INT_ENA_V | |
| RMT_CH1_ERR_INT_ENA_S | |
| RMT_CH1_RX_END_INT_ENA_V | |
| RMT_CH1_RX_END_INT_ENA_S | |
| RMT_CH1_TX_END_INT_ENA_V | |
| RMT_CH1_TX_END_INT_ENA_S | |
| RMT_CH1_TX_THR_EVENT_INT_CLR_V | |
| RMT_CH1_TX_THR_EVENT_INT_CLR_S | |
| RMT_CH1_ERR_INT_CLR_V | |
| RMT_CH1_ERR_INT_CLR_S | |
| RMT_CH1_RX_END_INT_CLR_V | |
| RMT_CH1_RX_END_INT_CLR_S | |
| RMT_CH1_TX_END_INT_CLR_V | |
| RMT_CH1_TX_END_INT_CLR_S | |
| RMT_CH1CARRIER_DUTY_REG | |
| RMT_CH1_TX_LIM_REG | |
| RMT_CH2DATA_REG | |
| RMT_CH2STATUS_REG | |
| RMT_CH2ADDR_REG | |
| RMT_CH2_TX_THR_EVENT_INT_RAW_V | |
| RMT_CH2_TX_THR_EVENT_INT_RAW_S | |
| RMT_CH2_ERR_INT_RAW_V | |
| RMT_CH2_ERR_INT_RAW_S | |
| RMT_CH2_RX_END_INT_RAW_V | |
| RMT_CH2_RX_END_INT_RAW_S | |
| RMT_CH2_TX_END_INT_RAW_V | |
| RMT_CH2_TX_END_INT_RAW_S | |
| RMT_CH2_TX_THR_EVENT_INT_ST_V | |
| RMT_CH2_TX_THR_EVENT_INT_ST_S | |
| RMT_CH2_ERR_INT_ST_V | |
| RMT_CH2_ERR_INT_ST_S | |
| RMT_CH2_RX_END_INT_ST_V | |
| RMT_CH2_RX_END_INT_ST_S | |
| RMT_CH2_TX_END_INT_ST_V | |
| RMT_CH2_TX_END_INT_ST_S | |
| RMT_CH2_TX_THR_EVENT_INT_ENA_V | |
| RMT_CH2_TX_THR_EVENT_INT_ENA_S | |
| RMT_CH2_ERR_INT_ENA_V | |
| RMT_CH2_ERR_INT_ENA_S | |
| RMT_CH2_RX_END_INT_ENA_V | |
| RMT_CH2_RX_END_INT_ENA_S | |
| RMT_CH2_TX_END_INT_ENA_V | |
| RMT_CH2_TX_END_INT_ENA_S | |
| RMT_CH2_TX_THR_EVENT_INT_CLR_V | |
| RMT_CH2_TX_THR_EVENT_INT_CLR_S | |
| RMT_CH2_ERR_INT_CLR_V | |
| RMT_CH2_ERR_INT_CLR_S | |
| RMT_CH2_RX_END_INT_CLR_V | |
| RMT_CH2_RX_END_INT_CLR_S | |
| RMT_CH2_TX_END_INT_CLR_V | |
| RMT_CH2_TX_END_INT_CLR_S | |
| RMT_CH2CARRIER_DUTY_REG | |
| RMT_CH2_TX_LIM_REG | |
| RMT_CH3DATA_REG | |
| RMT_CH3STATUS_REG | |
| RMT_CH3ADDR_REG | |
| RMT_CH3_TX_THR_EVENT_INT_RAW_V | |
| RMT_CH3_TX_THR_EVENT_INT_RAW_S | |
| RMT_CH3_ERR_INT_RAW_V | |
| RMT_CH3_ERR_INT_RAW_S | |
| RMT_CH3_RX_END_INT_RAW_V | |
| RMT_CH3_RX_END_INT_RAW_S | |
| RMT_CH3_TX_END_INT_RAW_V | |
| RMT_CH3_TX_END_INT_RAW_S | |
| RMT_CH3_TX_THR_EVENT_INT_ST_V | |
| RMT_CH3_TX_THR_EVENT_INT_ST_S | |
| RMT_CH3_ERR_INT_ST_V | |
| RMT_CH3_ERR_INT_ST_S | |
| RMT_CH3_RX_END_INT_ST_V | |
| RMT_CH3_RX_END_INT_ST_S | |
| RMT_CH3_TX_END_INT_ST_V | |
| RMT_CH3_TX_END_INT_ST_S | |
| RMT_CH3_TX_THR_EVENT_INT_ENA_V | |
| RMT_CH3_TX_THR_EVENT_INT_ENA_S | |
| RMT_CH3_ERR_INT_ENA_V | |
| RMT_CH3_ERR_INT_ENA_S | |
| RMT_CH3_RX_END_INT_ENA_V | |
| RMT_CH3_RX_END_INT_ENA_S | |
| RMT_CH3_TX_END_INT_ENA_V | |
| RMT_CH3_TX_END_INT_ENA_S | |
| RMT_CH3_TX_THR_EVENT_INT_CLR_V | |
| RMT_CH3_TX_THR_EVENT_INT_CLR_S | |
| RMT_CH3_ERR_INT_CLR_V | |
| RMT_CH3_ERR_INT_CLR_S | |
| RMT_CH3_RX_END_INT_CLR_V | |
| RMT_CH3_RX_END_INT_CLR_S | |
| RMT_CH3_TX_END_INT_CLR_V | |
| RMT_CH3_TX_END_INT_CLR_S | |
| RMT_CH3CARRIER_DUTY_REG | |
| RMT_CH3_TX_LIM_REG | |
| RMT_CH4DATA_REG | |
| RMT_CH4STATUS_REG | |
| RMT_CH4ADDR_REG | |
| RMT_CH4_TX_THR_EVENT_INT_RAW_V | |
| RMT_CH4_TX_THR_EVENT_INT_RAW_S | |
| RMT_CH4_ERR_INT_RAW_V | |
| RMT_CH4_ERR_INT_RAW_S | |
| RMT_CH4_RX_END_INT_RAW_V | |
| RMT_CH4_RX_END_INT_RAW_S | |
| RMT_CH4_TX_END_INT_RAW_V | |
| RMT_CH4_TX_END_INT_RAW_S | |
| RMT_CH4_TX_THR_EVENT_INT_ST_V | |
| RMT_CH4_TX_THR_EVENT_INT_ST_S | |
| RMT_CH4_ERR_INT_ST_V | |
| RMT_CH4_ERR_INT_ST_S | |
| RMT_CH4_RX_END_INT_ST_V | |
| RMT_CH4_RX_END_INT_ST_S | |
| RMT_CH4_TX_END_INT_ST_V | |
| RMT_CH4_TX_END_INT_ST_S | |
| RMT_CH4_TX_THR_EVENT_INT_ENA_V | |
| RMT_CH4_TX_THR_EVENT_INT_ENA_S | |
| RMT_CH4_ERR_INT_ENA_V | |
| RMT_CH4_ERR_INT_ENA_S | |
| RMT_CH4_RX_END_INT_ENA_V | |
| RMT_CH4_RX_END_INT_ENA_S | |
| RMT_CH4_TX_END_INT_ENA_V | |
| RMT_CH4_TX_END_INT_ENA_S | |
| RMT_CH4_TX_THR_EVENT_INT_CLR_V | |
| RMT_CH4_TX_THR_EVENT_INT_CLR_S | |
| RMT_CH4_ERR_INT_CLR_V | |
| RMT_CH4_ERR_INT_CLR_S | |
| RMT_CH4_RX_END_INT_CLR_V | |
| RMT_CH4_RX_END_INT_CLR_S | |
| RMT_CH4_TX_END_INT_CLR_V | |
| RMT_CH4_TX_END_INT_CLR_S | |
| RMT_CH4CARRIER_DUTY_REG | |
| RMT_CH4_TX_LIM_REG | |
| RMT_CH5DATA_REG | |
| RMT_CH5STATUS_REG | |
| RMT_CH5ADDR_REG | |
| RMT_CH5_TX_THR_EVENT_INT_RAW_V | |
| RMT_CH5_TX_THR_EVENT_INT_RAW_S | |
| RMT_CH5_ERR_INT_RAW_V | |
| RMT_CH5_ERR_INT_RAW_S | |
| RMT_CH5_RX_END_INT_RAW_V | |
| RMT_CH5_RX_END_INT_RAW_S | |
| RMT_CH5_TX_END_INT_RAW_V | |
| RMT_CH5_TX_END_INT_RAW_S | |
| RMT_CH5_TX_THR_EVENT_INT_ST_V | |
| RMT_CH5_TX_THR_EVENT_INT_ST_S | |
| RMT_CH5_ERR_INT_ST_V | |
| RMT_CH5_ERR_INT_ST_S | |
| RMT_CH5_RX_END_INT_ST_V | |
| RMT_CH5_RX_END_INT_ST_S | |
| RMT_CH5_TX_END_INT_ST_V | |
| RMT_CH5_TX_END_INT_ST_S | |
| RMT_CH5_TX_THR_EVENT_INT_ENA_V | |
| RMT_CH5_TX_THR_EVENT_INT_ENA_S | |
| RMT_CH5_ERR_INT_ENA_V | |
| RMT_CH5_ERR_INT_ENA_S | |
| RMT_CH5_RX_END_INT_ENA_V | |
| RMT_CH5_RX_END_INT_ENA_S | |
| RMT_CH5_TX_END_INT_ENA_V | |
| RMT_CH5_TX_END_INT_ENA_S | |
| RMT_CH5_TX_THR_EVENT_INT_CLR_V | |
| RMT_CH5_TX_THR_EVENT_INT_CLR_S | |
| RMT_CH5_ERR_INT_CLR_V | |
| RMT_CH5_ERR_INT_CLR_S | |
| RMT_CH5_RX_END_INT_CLR_V | |
| RMT_CH5_RX_END_INT_CLR_S | |
| RMT_CH5_TX_END_INT_CLR_V | |
| RMT_CH5_TX_END_INT_CLR_S | |
| RMT_CH5CARRIER_DUTY_REG | |
| RMT_CH5_TX_LIM_REG | |
| RMT_CH6DATA_REG | |
| RMT_CH6STATUS_REG | |
| RMT_CH6ADDR_REG | |
| RMT_CH6_TX_THR_EVENT_INT_RAW_V | |
| RMT_CH6_TX_THR_EVENT_INT_RAW_S | |
| RMT_CH6_ERR_INT_RAW_V | |
| RMT_CH6_ERR_INT_RAW_S | |
| RMT_CH6_RX_END_INT_RAW_V | |
| RMT_CH6_RX_END_INT_RAW_S | |
| RMT_CH6_TX_END_INT_RAW_V | |
| RMT_CH6_TX_END_INT_RAW_S | |
| RMT_CH6_TX_THR_EVENT_INT_ST_V | |
| RMT_CH6_TX_THR_EVENT_INT_ST_S | |
| RMT_CH6_ERR_INT_ST_V | |
| RMT_CH6_ERR_INT_ST_S | |
| RMT_CH6_RX_END_INT_ST_V | |
| RMT_CH6_RX_END_INT_ST_S | |
| RMT_CH6_TX_END_INT_ST_V | |
| RMT_CH6_TX_END_INT_ST_S | |
| RMT_CH6_TX_THR_EVENT_INT_ENA_V | |
| RMT_CH6_TX_THR_EVENT_INT_ENA_S | |
| RMT_CH6_ERR_INT_ENA_V | |
| RMT_CH6_ERR_INT_ENA_S | |
| RMT_CH6_RX_END_INT_ENA_V | |
| RMT_CH6_RX_END_INT_ENA_S | |
| RMT_CH6_TX_END_INT_ENA_V | |
| RMT_CH6_TX_END_INT_ENA_S | |
| RMT_CH6_TX_THR_EVENT_INT_CLR_V | |
| RMT_CH6_TX_THR_EVENT_INT_CLR_S | |
| RMT_CH6_ERR_INT_CLR_V | |
| RMT_CH6_ERR_INT_CLR_S | |
| RMT_CH6_RX_END_INT_CLR_V | |
| RMT_CH6_RX_END_INT_CLR_S | |
| RMT_CH6_TX_END_INT_CLR_V | |
| RMT_CH6_TX_END_INT_CLR_S | |
| RMT_CH6CARRIER_DUTY_REG | |
| RMT_CH6_TX_LIM_REG | |
| RMT_CH7DATA_REG | |
| RMT_CH7STATUS_REG | |
| RMT_CH7ADDR_REG | |
| RMT_CH7_TX_THR_EVENT_INT_RAW_V | |
| RMT_CH7_TX_THR_EVENT_INT_RAW_S | |
| RMT_CH7_ERR_INT_RAW_V | |
| RMT_CH7_ERR_INT_RAW_S | |
| RMT_CH7_RX_END_INT_RAW_V | |
| RMT_CH7_RX_END_INT_RAW_S | |
| RMT_CH7_TX_END_INT_RAW_V | |
| RMT_CH7_TX_END_INT_RAW_S | |
| RMT_CH7_TX_THR_EVENT_INT_ST_V | |
| RMT_CH7_TX_THR_EVENT_INT_ST_S | |
| RMT_CH7_ERR_INT_ST_V | |
| RMT_CH7_ERR_INT_ST_S | |
| RMT_CH7_RX_END_INT_ST_V | |
| RMT_CH7_RX_END_INT_ST_S | |
| RMT_CH7_TX_END_INT_ST_V | |
| RMT_CH7_TX_END_INT_ST_S | |
| RMT_CH7_TX_THR_EVENT_INT_ENA_V | |
| RMT_CH7_TX_THR_EVENT_INT_ENA_S | |
| RMT_CH7_ERR_INT_ENA_V | |
| RMT_CH7_ERR_INT_ENA_S | |
| RMT_CH7_RX_END_INT_ENA_V | |
| RMT_CH7_RX_END_INT_ENA_S | |
| RMT_CH7_TX_END_INT_ENA_V | |
| RMT_CH7_TX_END_INT_ENA_S | |
| RMT_CH7_TX_THR_EVENT_INT_CLR_V | |
| RMT_CH7_TX_THR_EVENT_INT_CLR_S | |
| RMT_CH7_ERR_INT_CLR_V | |
| RMT_CH7_ERR_INT_CLR_S | |
| RMT_CH7_RX_END_INT_CLR_V | |
| RMT_CH7_RX_END_INT_CLR_S | |
| RMT_CH7_TX_END_INT_CLR_V | |
| RMT_CH7_TX_END_INT_CLR_S | |
| RMT_CH7CARRIER_DUTY_REG | |
| RMT_CH7_TX_LIM_REG | |
| RMT_CH0CONF0_REG | |
| RMT_CH0CONF1_REG | |
| RMT_CH1CONF0_REG | |
| RMT_CH1CONF1_REG | |
| RMT_CH2CONF0_REG | |
| RMT_CH2CONF1_REG | |
| RMT_CH3CONF0_REG | |
| RMT_CH3CONF1_REG | |
| RMT_CH4CONF0_REG | |
| RMT_CH4CONF1_REG | |
| RMT_CH5CONF0_REG | |
| RMT_CH5CONF1_REG | |
| RMT_CH6CONF0_REG | |
| RMT_CH6CONF1_REG | |
| RMT_CH7CONF0_REG | |
| RMT_CH7CONF1_REG | |
| RMT_CLK_EN_S | |
| RMT_CLK_EN_V | |
| RMT_DATE | |
| RMT_DATE_REG | |
| RMT_DATE_S | |
| RMT_DATE_V | |
| RMT_DIV_CNT_CH0 | |
| RMT_DIV_CNT_CH0_V | |
| RMT_DIV_CNT_CH0_S | |
| RMT_DIV_CNT_CH1 | |
| RMT_DIV_CNT_CH1_V | |
| RMT_DIV_CNT_CH1_S | |
| RMT_DIV_CNT_CH2 | |
| RMT_DIV_CNT_CH2_V | |
| RMT_DIV_CNT_CH2_S | |
| RMT_DIV_CNT_CH3 | |
| RMT_DIV_CNT_CH3_V | |
| RMT_DIV_CNT_CH3_S | |
| RMT_DIV_CNT_CH4 | |
| RMT_DIV_CNT_CH4_V | |
| RMT_DIV_CNT_CH4_S | |
| RMT_DIV_CNT_CH5 | |
| RMT_DIV_CNT_CH5_V | |
| RMT_DIV_CNT_CH5_S | |
| RMT_DIV_CNT_CH6 | |
| RMT_DIV_CNT_CH6_V | |
| RMT_DIV_CNT_CH6_S | |
| RMT_DIV_CNT_CH7 | |
| RMT_DIV_CNT_CH7_V | |
| RMT_DIV_CNT_CH7_S | |
| RMT_IDLE_OUT_EN_CH0_V | |
| RMT_IDLE_OUT_EN_CH0_S | |
| RMT_IDLE_OUT_EN_CH1_V | |
| RMT_IDLE_OUT_EN_CH1_S | |
| RMT_IDLE_OUT_EN_CH2_V | |
| RMT_IDLE_OUT_EN_CH2_S | |
| RMT_IDLE_OUT_EN_CH3_V | |
| RMT_IDLE_OUT_EN_CH3_S | |
| RMT_IDLE_OUT_EN_CH4_V | |
| RMT_IDLE_OUT_EN_CH4_S | |
| RMT_IDLE_OUT_EN_CH5_V | |
| RMT_IDLE_OUT_EN_CH5_S | |
| RMT_IDLE_OUT_EN_CH6_V | |
| RMT_IDLE_OUT_EN_CH6_S | |
| RMT_IDLE_OUT_EN_CH7_V | |
| RMT_IDLE_OUT_EN_CH7_S | |
| RMT_IDLE_OUT_LV_CH0_V | |
| RMT_IDLE_OUT_LV_CH0_S | |
| RMT_IDLE_OUT_LV_CH1_V | |
| RMT_IDLE_OUT_LV_CH1_S | |
| RMT_IDLE_OUT_LV_CH2_V | |
| RMT_IDLE_OUT_LV_CH2_S | |
| RMT_IDLE_OUT_LV_CH3_V | |
| RMT_IDLE_OUT_LV_CH3_S | |
| RMT_IDLE_OUT_LV_CH4_V | |
| RMT_IDLE_OUT_LV_CH4_S | |
| RMT_IDLE_OUT_LV_CH5_V | |
| RMT_IDLE_OUT_LV_CH5_S | |
| RMT_IDLE_OUT_LV_CH6_V | |
| RMT_IDLE_OUT_LV_CH6_S | |
| RMT_IDLE_OUT_LV_CH7_V | |
| RMT_IDLE_OUT_LV_CH7_S | |
| RMT_IDLE_THRES_CH0 | |
| RMT_IDLE_THRES_CH0_V | |
| RMT_IDLE_THRES_CH0_S | |
| RMT_IDLE_THRES_CH1 | |
| RMT_IDLE_THRES_CH1_V | |
| RMT_IDLE_THRES_CH1_S | |
| RMT_IDLE_THRES_CH2 | |
| RMT_IDLE_THRES_CH2_V | |
| RMT_IDLE_THRES_CH2_S | |
| RMT_IDLE_THRES_CH3 | |
| RMT_IDLE_THRES_CH3_V | |
| RMT_IDLE_THRES_CH3_S | |
| RMT_IDLE_THRES_CH4 | |
| RMT_IDLE_THRES_CH4_V | |
| RMT_IDLE_THRES_CH4_S | |
| RMT_IDLE_THRES_CH5 | |
| RMT_IDLE_THRES_CH5_V | |
| RMT_IDLE_THRES_CH5_S | |
| RMT_IDLE_THRES_CH6 | |
| RMT_IDLE_THRES_CH6_V | |
| RMT_IDLE_THRES_CH6_S | |
| RMT_IDLE_THRES_CH7 | |
| RMT_IDLE_THRES_CH7_V | |
| RMT_IDLE_THRES_CH7_S | |
| RMT_INT_CLR_REG | |
| RMT_INT_ENA_REG | |
| RMT_INT_RAW_REG | |
| RMT_INT_ST_REG | |
| RMT_MEM_BLOCK_BYTE_NUM | |
| RMT_MEM_ITEM_NUM | |
| RMT_MEM_OWNER_CH0_V | |
| RMT_MEM_OWNER_CH0_S | |
| RMT_MEM_OWNER_CH1_V | |
| RMT_MEM_OWNER_CH1_S | |
| RMT_MEM_OWNER_CH2_V | |
| RMT_MEM_OWNER_CH2_S | |
| RMT_MEM_OWNER_CH3_V | |
| RMT_MEM_OWNER_CH3_S | |
| RMT_MEM_OWNER_CH4_V | |
| RMT_MEM_OWNER_CH4_S | |
| RMT_MEM_OWNER_CH5_V | |
| RMT_MEM_OWNER_CH5_S | |
| RMT_MEM_OWNER_CH6_V | |
| RMT_MEM_OWNER_CH6_S | |
| RMT_MEM_OWNER_CH7_V | |
| RMT_MEM_OWNER_CH7_S | |
| RMT_MEM_PD_S | |
| RMT_MEM_PD_V | |
| RMT_MEM_RD_RST_CH0_V | |
| RMT_MEM_RD_RST_CH0_S | |
| RMT_MEM_RD_RST_CH1_V | |
| RMT_MEM_RD_RST_CH1_S | |
| RMT_MEM_RD_RST_CH2_V | |
| RMT_MEM_RD_RST_CH2_S | |
| RMT_MEM_RD_RST_CH3_V | |
| RMT_MEM_RD_RST_CH3_S | |
| RMT_MEM_RD_RST_CH4_V | |
| RMT_MEM_RD_RST_CH4_S | |
| RMT_MEM_RD_RST_CH5_V | |
| RMT_MEM_RD_RST_CH5_S | |
| RMT_MEM_RD_RST_CH6_V | |
| RMT_MEM_RD_RST_CH6_S | |
| RMT_MEM_RD_RST_CH7_V | |
| RMT_MEM_RD_RST_CH7_S | |
| RMT_MEM_SIZE_CH0 | |
| RMT_MEM_SIZE_CH0_V | |
| RMT_MEM_SIZE_CH0_S | |
| RMT_MEM_SIZE_CH1 | |
| RMT_MEM_SIZE_CH1_V | |
| RMT_MEM_SIZE_CH1_S | |
| RMT_MEM_SIZE_CH2 | |
| RMT_MEM_SIZE_CH2_V | |
| RMT_MEM_SIZE_CH2_S | |
| RMT_MEM_SIZE_CH3 | |
| RMT_MEM_SIZE_CH3_V | |
| RMT_MEM_SIZE_CH3_S | |
| RMT_MEM_SIZE_CH4 | |
| RMT_MEM_SIZE_CH4_V | |
| RMT_MEM_SIZE_CH4_S | |
| RMT_MEM_SIZE_CH5 | |
| RMT_MEM_SIZE_CH5_V | |
| RMT_MEM_SIZE_CH5_S | |
| RMT_MEM_SIZE_CH6 | |
| RMT_MEM_SIZE_CH6_V | |
| RMT_MEM_SIZE_CH6_S | |
| RMT_MEM_SIZE_CH7 | |
| RMT_MEM_SIZE_CH7_V | |
| RMT_MEM_SIZE_CH7_S | |
| RMT_MEM_TX_WRAP_EN_S | |
| RMT_MEM_TX_WRAP_EN_V | |
| RMT_MEM_WR_RST_CH0_V | |
| RMT_MEM_WR_RST_CH0_S | |
| RMT_MEM_WR_RST_CH1_V | |
| RMT_MEM_WR_RST_CH1_S | |
| RMT_MEM_WR_RST_CH2_V | |
| RMT_MEM_WR_RST_CH2_S | |
| RMT_MEM_WR_RST_CH3_V | |
| RMT_MEM_WR_RST_CH3_S | |
| RMT_MEM_WR_RST_CH4_V | |
| RMT_MEM_WR_RST_CH4_S | |
| RMT_MEM_WR_RST_CH5_V | |
| RMT_MEM_WR_RST_CH5_S | |
| RMT_MEM_WR_RST_CH6_V | |
| RMT_MEM_WR_RST_CH6_S | |
| RMT_MEM_WR_RST_CH7_V | |
| RMT_MEM_WR_RST_CH7_S | |
| RMT_REF_ALWAYS_ON_CH0_V | |
| RMT_REF_ALWAYS_ON_CH0_S | |
| RMT_REF_ALWAYS_ON_CH1_V | |
| RMT_REF_ALWAYS_ON_CH1_S | |
| RMT_REF_ALWAYS_ON_CH2_V | |
| RMT_REF_ALWAYS_ON_CH2_S | |
| RMT_REF_ALWAYS_ON_CH3_V | |
| RMT_REF_ALWAYS_ON_CH3_S | |
| RMT_REF_ALWAYS_ON_CH4_V | |
| RMT_REF_ALWAYS_ON_CH4_S | |
| RMT_REF_ALWAYS_ON_CH5_V | |
| RMT_REF_ALWAYS_ON_CH5_S | |
| RMT_REF_ALWAYS_ON_CH6_V | |
| RMT_REF_ALWAYS_ON_CH6_S | |
| RMT_REF_ALWAYS_ON_CH7_V | |
| RMT_REF_ALWAYS_ON_CH7_S | |
| RMT_REF_CNT_RST_CH0_V | |
| RMT_REF_CNT_RST_CH0_S | |
| RMT_REF_CNT_RST_CH1_V | |
| RMT_REF_CNT_RST_CH1_S | |
| RMT_REF_CNT_RST_CH2_V | |
| RMT_REF_CNT_RST_CH2_S | |
| RMT_REF_CNT_RST_CH3_V | |
| RMT_REF_CNT_RST_CH3_S | |
| RMT_REF_CNT_RST_CH4_V | |
| RMT_REF_CNT_RST_CH4_S | |
| RMT_REF_CNT_RST_CH5_V | |
| RMT_REF_CNT_RST_CH5_S | |
| RMT_REF_CNT_RST_CH6_V | |
| RMT_REF_CNT_RST_CH6_S | |
| RMT_REF_CNT_RST_CH7_V | |
| RMT_REF_CNT_RST_CH7_S | |
| RMT_RX_EN_CH0_V | |
| RMT_RX_EN_CH0_S | |
| RMT_RX_EN_CH1_V | |
| RMT_RX_EN_CH1_S | |
| RMT_RX_EN_CH2_V | |
| RMT_RX_EN_CH2_S | |
| RMT_RX_EN_CH3_V | |
| RMT_RX_EN_CH3_S | |
| RMT_RX_EN_CH4_V | |
| RMT_RX_EN_CH4_S | |
| RMT_RX_EN_CH5_V | |
| RMT_RX_EN_CH5_S | |
| RMT_RX_EN_CH6_V | |
| RMT_RX_EN_CH6_S | |
| RMT_RX_EN_CH7_V | |
| RMT_RX_EN_CH7_S | |
| RMT_RX_FILTER_EN_CH0_V | |
| RMT_RX_FILTER_EN_CH0_S | |
| RMT_RX_FILTER_EN_CH1_V | |
| RMT_RX_FILTER_EN_CH1_S | |
| RMT_RX_FILTER_EN_CH2_V | |
| RMT_RX_FILTER_EN_CH2_S | |
| RMT_RX_FILTER_EN_CH3_V | |
| RMT_RX_FILTER_EN_CH3_S | |
| RMT_RX_FILTER_EN_CH4_V | |
| RMT_RX_FILTER_EN_CH4_S | |
| RMT_RX_FILTER_EN_CH5_V | |
| RMT_RX_FILTER_EN_CH5_S | |
| RMT_RX_FILTER_EN_CH6_V | |
| RMT_RX_FILTER_EN_CH6_S | |
| RMT_RX_FILTER_EN_CH7_V | |
| RMT_RX_FILTER_EN_CH7_S | |
| RMT_RX_FILTER_THRES_CH0 | |
| RMT_RX_FILTER_THRES_CH0_V | |
| RMT_RX_FILTER_THRES_CH0_S | |
| RMT_RX_FILTER_THRES_CH1 | |
| RMT_RX_FILTER_THRES_CH1_V | |
| RMT_RX_FILTER_THRES_CH1_S | |
| RMT_RX_FILTER_THRES_CH2 | |
| RMT_RX_FILTER_THRES_CH2_V | |
| RMT_RX_FILTER_THRES_CH2_S | |
| RMT_RX_FILTER_THRES_CH3 | |
| RMT_RX_FILTER_THRES_CH3_V | |
| RMT_RX_FILTER_THRES_CH3_S | |
| RMT_RX_FILTER_THRES_CH4 | |
| RMT_RX_FILTER_THRES_CH4_V | |
| RMT_RX_FILTER_THRES_CH4_S | |
| RMT_RX_FILTER_THRES_CH5 | |
| RMT_RX_FILTER_THRES_CH5_V | |
| RMT_RX_FILTER_THRES_CH5_S | |
| RMT_RX_FILTER_THRES_CH6 | |
| RMT_RX_FILTER_THRES_CH6_V | |
| RMT_RX_FILTER_THRES_CH6_S | |
| RMT_RX_FILTER_THRES_CH7 | |
| RMT_RX_FILTER_THRES_CH7_V | |
| RMT_RX_FILTER_THRES_CH7_S | |
| RMT_SIG_IN0_IDX | |
| RMT_SIG_IN1_IDX | |
| RMT_SIG_IN2_IDX | |
| RMT_SIG_IN3_IDX | |
| RMT_SIG_IN4_IDX | |
| RMT_SIG_IN5_IDX | |
| RMT_SIG_IN6_IDX | |
| RMT_SIG_IN7_IDX | |
| RMT_SIG_OUT0_IDX | |
| RMT_SIG_OUT1_IDX | |
| RMT_SIG_OUT2_IDX | |
| RMT_SIG_OUT3_IDX | |
| RMT_SIG_OUT4_IDX | |
| RMT_SIG_OUT5_IDX | |
| RMT_SIG_OUT6_IDX | |
| RMT_SIG_OUT7_IDX | |
| RMT_STATUS_CH0 | |
| RMT_STATUS_CH0_V | |
| RMT_STATUS_CH0_S | |
| RMT_STATUS_CH1 | |
| RMT_STATUS_CH1_V | |
| RMT_STATUS_CH1_S | |
| RMT_STATUS_CH2 | |
| RMT_STATUS_CH2_V | |
| RMT_STATUS_CH2_S | |
| RMT_STATUS_CH3 | |
| RMT_STATUS_CH3_V | |
| RMT_STATUS_CH3_S | |
| RMT_STATUS_CH4 | |
| RMT_STATUS_CH4_V | |
| RMT_STATUS_CH4_S | |
| RMT_STATUS_CH5 | |
| RMT_STATUS_CH5_V | |
| RMT_STATUS_CH5_S | |
| RMT_STATUS_CH6 | |
| RMT_STATUS_CH6_V | |
| RMT_STATUS_CH6_S | |
| RMT_STATUS_CH7 | |
| RMT_STATUS_CH7_V | |
| RMT_STATUS_CH7_S | |
| RMT_TX_CONTI_MODE_CH0_V | |
| RMT_TX_CONTI_MODE_CH0_S | |
| RMT_TX_CONTI_MODE_CH1_V | |
| RMT_TX_CONTI_MODE_CH1_S | |
| RMT_TX_CONTI_MODE_CH2_V | |
| RMT_TX_CONTI_MODE_CH2_S | |
| RMT_TX_CONTI_MODE_CH3_V | |
| RMT_TX_CONTI_MODE_CH3_S | |
| RMT_TX_CONTI_MODE_CH4_V | |
| RMT_TX_CONTI_MODE_CH4_S | |
| RMT_TX_CONTI_MODE_CH5_V | |
| RMT_TX_CONTI_MODE_CH5_S | |
| RMT_TX_CONTI_MODE_CH6_V | |
| RMT_TX_CONTI_MODE_CH6_S | |
| RMT_TX_CONTI_MODE_CH7_V | |
| RMT_TX_CONTI_MODE_CH7_S | |
| RMT_TX_LIM_CH0 | |
| RMT_TX_LIM_CH0_V | |
| RMT_TX_LIM_CH0_S | |
| RMT_TX_LIM_CH1 | |
| RMT_TX_LIM_CH1_V | |
| RMT_TX_LIM_CH1_S | |
| RMT_TX_LIM_CH2 | |
| RMT_TX_LIM_CH2_V | |
| RMT_TX_LIM_CH2_S | |
| RMT_TX_LIM_CH3 | |
| RMT_TX_LIM_CH3_V | |
| RMT_TX_LIM_CH3_S | |
| RMT_TX_LIM_CH4 | |
| RMT_TX_LIM_CH4_V | |
| RMT_TX_LIM_CH4_S | |
| RMT_TX_LIM_CH5 | |
| RMT_TX_LIM_CH5_V | |
| RMT_TX_LIM_CH5_S | |
| RMT_TX_LIM_CH6 | |
| RMT_TX_LIM_CH6_V | |
| RMT_TX_LIM_CH6_S | |
| RMT_TX_LIM_CH7 | |
| RMT_TX_LIM_CH7_V | |
| RMT_TX_LIM_CH7_S | |
| RMT_TX_START_CH0_V | |
| RMT_TX_START_CH0_S | |
| RMT_TX_START_CH1_V | |
| RMT_TX_START_CH1_S | |
| RMT_TX_START_CH2_V | |
| RMT_TX_START_CH2_S | |
| RMT_TX_START_CH3_V | |
| RMT_TX_START_CH3_S | |
| RMT_TX_START_CH4_V | |
| RMT_TX_START_CH4_S | |
| RMT_TX_START_CH5_V | |
| RMT_TX_START_CH5_S | |
| RMT_TX_START_CH6_V | |
| RMT_TX_START_CH6_S | |
| RMT_TX_START_CH7_V | |
| RMT_TX_START_CH7_S | |
| RTC_GPIO_ENABLE | |
| RTC_GPIO_ENABLE_REG | |
| RTC_GPIO_ENABLE_S | |
| RTC_GPIO_ENABLE_V | |
| RTC_GPIO_ENABLE_W1TS_REG | |
| RTC_GPIO_ENABLE_W1TS | |
| RTC_GPIO_ENABLE_W1TS_V | |
| RTC_GPIO_ENABLE_W1TS_S | |
| RTC_GPIO_ENABLE_W1TC_REG | |
| RTC_GPIO_ENABLE_W1TC | |
| RTC_GPIO_ENABLE_W1TC_V | |
| RTC_GPIO_ENABLE_W1TC_S | |
| RTC_GPIO_IN_NEXT | |
| RTC_GPIO_IN_NEXT_S | |
| RTC_GPIO_IN_NEXT_V | |
| RTC_GPIO_IN_REG | |
| RTC_GPIO_OUT_DATA | |
| RTC_GPIO_OUT_DATA_S | |
| RTC_GPIO_OUT_DATA_V | |
| RTC_GPIO_OUT_DATA_W1TS | |
| RTC_GPIO_OUT_DATA_W1TS_V | |
| RTC_GPIO_OUT_DATA_W1TS_S | |
| RTC_GPIO_OUT_DATA_W1TC | |
| RTC_GPIO_OUT_DATA_W1TC_V | |
| RTC_GPIO_OUT_DATA_W1TC_S | |
| RTC_GPIO_OUT_REG | |
| RTC_GPIO_OUT_W1TS_REG | |
| RTC_GPIO_OUT_W1TC_REG | |
| RTC_GPIO_PIN0_REG | |
| RTC_GPIO_PIN0_INT_TYPE | |
| RTC_GPIO_PIN0_INT_TYPE_V | |
| RTC_GPIO_PIN0_INT_TYPE_S | |
| RTC_GPIO_PIN0_PAD_DRIVER_V | |
| RTC_GPIO_PIN0_PAD_DRIVER_S | |
| RTC_GPIO_PIN0_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN0_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN1_REG | |
| RTC_GPIO_PIN1_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN1_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN1_INT_TYPE | |
| RTC_GPIO_PIN1_INT_TYPE_V | |
| RTC_GPIO_PIN1_INT_TYPE_S | |
| RTC_GPIO_PIN1_PAD_DRIVER_V | |
| RTC_GPIO_PIN1_PAD_DRIVER_S | |
| RTC_GPIO_PIN2_REG | |
| RTC_GPIO_PIN2_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN2_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN2_INT_TYPE | |
| RTC_GPIO_PIN2_INT_TYPE_V | |
| RTC_GPIO_PIN2_INT_TYPE_S | |
| RTC_GPIO_PIN2_PAD_DRIVER_V | |
| RTC_GPIO_PIN2_PAD_DRIVER_S | |
| RTC_GPIO_PIN3_REG | |
| RTC_GPIO_PIN3_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN3_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN3_INT_TYPE | |
| RTC_GPIO_PIN3_INT_TYPE_V | |
| RTC_GPIO_PIN3_INT_TYPE_S | |
| RTC_GPIO_PIN3_PAD_DRIVER_V | |
| RTC_GPIO_PIN3_PAD_DRIVER_S | |
| RTC_GPIO_PIN4_REG | |
| RTC_GPIO_PIN4_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN4_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN4_INT_TYPE | |
| RTC_GPIO_PIN4_INT_TYPE_V | |
| RTC_GPIO_PIN4_INT_TYPE_S | |
| RTC_GPIO_PIN4_PAD_DRIVER_V | |
| RTC_GPIO_PIN4_PAD_DRIVER_S | |
| RTC_GPIO_PIN5_REG | |
| RTC_GPIO_PIN5_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN5_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN5_INT_TYPE | |
| RTC_GPIO_PIN5_INT_TYPE_V | |
| RTC_GPIO_PIN5_INT_TYPE_S | |
| RTC_GPIO_PIN5_PAD_DRIVER_V | |
| RTC_GPIO_PIN5_PAD_DRIVER_S | |
| RTC_GPIO_PIN6_REG | |
| RTC_GPIO_PIN6_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN6_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN6_INT_TYPE | |
| RTC_GPIO_PIN6_INT_TYPE_V | |
| RTC_GPIO_PIN6_INT_TYPE_S | |
| RTC_GPIO_PIN6_PAD_DRIVER_V | |
| RTC_GPIO_PIN6_PAD_DRIVER_S | |
| RTC_GPIO_PIN7_REG | |
| RTC_GPIO_PIN7_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN7_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN7_INT_TYPE | |
| RTC_GPIO_PIN7_INT_TYPE_V | |
| RTC_GPIO_PIN7_INT_TYPE_S | |
| RTC_GPIO_PIN7_PAD_DRIVER_V | |
| RTC_GPIO_PIN7_PAD_DRIVER_S | |
| RTC_GPIO_PIN8_REG | |
| RTC_GPIO_PIN8_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN8_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN8_INT_TYPE | |
| RTC_GPIO_PIN8_INT_TYPE_V | |
| RTC_GPIO_PIN8_INT_TYPE_S | |
| RTC_GPIO_PIN8_PAD_DRIVER_V | |
| RTC_GPIO_PIN8_PAD_DRIVER_S | |
| RTC_GPIO_PIN9_REG | |
| RTC_GPIO_PIN9_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN9_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN9_INT_TYPE | |
| RTC_GPIO_PIN9_INT_TYPE_V | |
| RTC_GPIO_PIN9_INT_TYPE_S | |
| RTC_GPIO_PIN9_PAD_DRIVER_V | |
| RTC_GPIO_PIN9_PAD_DRIVER_S | |
| RTC_GPIO_PIN10_REG | |
| RTC_GPIO_PIN10_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN10_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN10_INT_TYPE | |
| RTC_GPIO_PIN10_INT_TYPE_V | |
| RTC_GPIO_PIN10_INT_TYPE_S | |
| RTC_GPIO_PIN10_PAD_DRIVER_V | |
| RTC_GPIO_PIN10_PAD_DRIVER_S | |
| RTC_GPIO_PIN11_REG | |
| RTC_GPIO_PIN11_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN11_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN11_INT_TYPE | |
| RTC_GPIO_PIN11_INT_TYPE_V | |
| RTC_GPIO_PIN11_INT_TYPE_S | |
| RTC_GPIO_PIN11_PAD_DRIVER_V | |
| RTC_GPIO_PIN11_PAD_DRIVER_S | |
| RTC_GPIO_PIN12_REG | |
| RTC_GPIO_PIN12_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN12_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN12_INT_TYPE | |
| RTC_GPIO_PIN12_INT_TYPE_V | |
| RTC_GPIO_PIN12_INT_TYPE_S | |
| RTC_GPIO_PIN12_PAD_DRIVER_V | |
| RTC_GPIO_PIN12_PAD_DRIVER_S | |
| RTC_GPIO_PIN13_REG | |
| RTC_GPIO_PIN13_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN13_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN13_INT_TYPE | |
| RTC_GPIO_PIN13_INT_TYPE_V | |
| RTC_GPIO_PIN13_INT_TYPE_S | |
| RTC_GPIO_PIN13_PAD_DRIVER_V | |
| RTC_GPIO_PIN13_PAD_DRIVER_S | |
| RTC_GPIO_PIN14_REG | |
| RTC_GPIO_PIN14_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN14_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN14_INT_TYPE | |
| RTC_GPIO_PIN14_INT_TYPE_V | |
| RTC_GPIO_PIN14_INT_TYPE_S | |
| RTC_GPIO_PIN14_PAD_DRIVER_V | |
| RTC_GPIO_PIN14_PAD_DRIVER_S | |
| RTC_GPIO_PIN15_REG | |
| RTC_GPIO_PIN15_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN15_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN15_INT_TYPE | |
| RTC_GPIO_PIN15_INT_TYPE_V | |
| RTC_GPIO_PIN15_INT_TYPE_S | |
| RTC_GPIO_PIN15_PAD_DRIVER_V | |
| RTC_GPIO_PIN15_PAD_DRIVER_S | |
| RTC_GPIO_PIN16_REG | |
| RTC_GPIO_PIN16_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN16_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN16_INT_TYPE | |
| RTC_GPIO_PIN16_INT_TYPE_V | |
| RTC_GPIO_PIN16_INT_TYPE_S | |
| RTC_GPIO_PIN16_PAD_DRIVER_V | |
| RTC_GPIO_PIN16_PAD_DRIVER_S | |
| RTC_GPIO_PIN17_REG | |
| RTC_GPIO_PIN17_WAKEUP_ENABLE_V | |
| RTC_GPIO_PIN17_WAKEUP_ENABLE_S | |
| RTC_GPIO_PIN17_INT_TYPE | |
| RTC_GPIO_PIN17_INT_TYPE_V | |
| RTC_GPIO_PIN17_INT_TYPE_S | |
| RTC_GPIO_PIN17_PAD_DRIVER_V | |
| RTC_GPIO_PIN17_PAD_DRIVER_S | |
| RTC_GPIO_STATUS_INT | |
| RTC_GPIO_STATUS_INT_S | |
| RTC_GPIO_STATUS_INT_V | |
| RTC_GPIO_STATUS_INT_W1TS | |
| RTC_GPIO_STATUS_INT_W1TS_V | |
| RTC_GPIO_STATUS_INT_W1TS_S | |
| RTC_GPIO_STATUS_INT_W1TC | |
| RTC_GPIO_STATUS_INT_W1TC_V | |
| RTC_GPIO_STATUS_INT_W1TC_S | |
| RTC_GPIO_STATUS_REG | |
| RTC_GPIO_STATUS_W1TS_REG | |
| RTC_GPIO_STATUS_W1TC_REG | |
| RTC_IO_ADC1_HOLD_V | |
| RTC_IO_ADC1_HOLD_S | |
| RTC_IO_ADC1_MUX_SEL_V | |
| RTC_IO_ADC1_MUX_SEL_S | |
| RTC_IO_ADC1_FUN_SEL | |
| RTC_IO_ADC1_FUN_SEL_V | |
| RTC_IO_ADC1_FUN_SEL_S | |
| RTC_IO_ADC1_SLP_SEL_V | |
| RTC_IO_ADC1_SLP_SEL_S | |
| RTC_IO_ADC1_SLP_IE_V | |
| RTC_IO_ADC1_SLP_IE_S | |
| RTC_IO_ADC1_FUN_IE_V | |
| RTC_IO_ADC1_FUN_IE_S | |
| RTC_IO_ADC2_HOLD_V | |
| RTC_IO_ADC2_HOLD_S | |
| RTC_IO_ADC2_MUX_SEL_V | |
| RTC_IO_ADC2_MUX_SEL_S | |
| RTC_IO_ADC2_FUN_SEL | |
| RTC_IO_ADC2_FUN_SEL_V | |
| RTC_IO_ADC2_FUN_SEL_S | |
| RTC_IO_ADC2_SLP_SEL_V | |
| RTC_IO_ADC2_SLP_SEL_S | |
| RTC_IO_ADC2_SLP_IE_V | |
| RTC_IO_ADC2_SLP_IE_S | |
| RTC_IO_ADC2_FUN_IE_V | |
| RTC_IO_ADC2_FUN_IE_S | |
| RTC_IO_ADC_PAD_REG | |
| RTC_IO_DAC_XTAL_32K | |
| RTC_IO_DAC_XTAL_32K_V | |
| RTC_IO_DAC_XTAL_32K_S | |
| RTC_IO_DATE_REG | |
| RTC_IO_DBIAS_XTAL_32K | |
| RTC_IO_DBIAS_XTAL_32K_V | |
| RTC_IO_DBIAS_XTAL_32K_S | |
| RTC_IO_DEBUG_12M_NO_GATING_V | |
| RTC_IO_DEBUG_12M_NO_GATING_S | |
| RTC_IO_DEBUG_SEL0 | |
| RTC_IO_DEBUG_SEL0_V | |
| RTC_IO_DEBUG_SEL0_S | |
| RTC_IO_DEBUG_SEL1 | |
| RTC_IO_DEBUG_SEL1_V | |
| RTC_IO_DEBUG_SEL1_S | |
| RTC_IO_DEBUG_SEL2 | |
| RTC_IO_DEBUG_SEL2_V | |
| RTC_IO_DEBUG_SEL2_S | |
| RTC_IO_DEBUG_SEL3 | |
| RTC_IO_DEBUG_SEL3_V | |
| RTC_IO_DEBUG_SEL3_S | |
| RTC_IO_DEBUG_SEL4 | |
| RTC_IO_DEBUG_SEL4_V | |
| RTC_IO_DEBUG_SEL4_S | |
| RTC_IO_DEBUG_SEL0_8M | |
| RTC_IO_DEBUG_SEL0_32K_XTAL | |
| RTC_IO_DEBUG_SEL0_150K_OSC | |
| RTC_IO_DIG_PAD_HOLD | |
| RTC_IO_DIG_PAD_HOLD_REG | |
| RTC_IO_DIG_PAD_HOLD_S | |
| RTC_IO_DIG_PAD_HOLD_V | |
| RTC_IO_DRES_XTAL_32K | |
| RTC_IO_DRES_XTAL_32K_V | |
| RTC_IO_DRES_XTAL_32K_S | |
| RTC_IO_EXT_WAKEUP0_REG | |
| RTC_IO_EXT_WAKEUP0_SEL | |
| RTC_IO_EXT_WAKEUP0_SEL_V | |
| RTC_IO_EXT_WAKEUP0_SEL_S | |
| RTC_IO_HALL_PHASE_S | |
| RTC_IO_HALL_PHASE_V | |
| RTC_IO_HALL_SENS_REG | |
| RTC_IO_IO_DATE | |
| RTC_IO_IO_DATE_S | |
| RTC_IO_IO_DATE_V | |
| RTC_IO_PAD_DAC1_REG | |
| RTC_IO_PAD_DAC2_REG | |
| RTC_IO_PDAC1_DRV | |
| RTC_IO_PDAC1_DRV_V | |
| RTC_IO_PDAC1_DRV_S | |
| RTC_IO_PDAC1_HOLD_V | |
| RTC_IO_PDAC1_HOLD_S | |
| RTC_IO_PDAC1_RDE_V | |
| RTC_IO_PDAC1_RDE_S | |
| RTC_IO_PDAC1_RUE_V | |
| RTC_IO_PDAC1_RUE_S | |
| RTC_IO_PDAC1_DAC | |
| RTC_IO_PDAC1_DAC_V | |
| RTC_IO_PDAC1_DAC_S | |
| RTC_IO_PDAC1_XPD_DAC_V | |
| RTC_IO_PDAC1_XPD_DAC_S | |
| RTC_IO_PDAC1_MUX_SEL_V | |
| RTC_IO_PDAC1_MUX_SEL_S | |
| RTC_IO_PDAC1_FUN_SEL | |
| RTC_IO_PDAC1_FUN_SEL_V | |
| RTC_IO_PDAC1_FUN_SEL_S | |
| RTC_IO_PDAC1_SLP_SEL_V | |
| RTC_IO_PDAC1_SLP_SEL_S | |
| RTC_IO_PDAC1_SLP_IE_V | |
| RTC_IO_PDAC1_SLP_IE_S | |
| RTC_IO_PDAC1_SLP_OE_V | |
| RTC_IO_PDAC1_SLP_OE_S | |
| RTC_IO_PDAC1_FUN_IE_V | |
| RTC_IO_PDAC1_FUN_IE_S | |
| RTC_IO_PDAC1_DAC_XPD_FORCE_V | |
| RTC_IO_PDAC1_DAC_XPD_FORCE_S | |
| RTC_IO_PDAC2_DRV | |
| RTC_IO_PDAC2_DRV_V | |
| RTC_IO_PDAC2_DRV_S | |
| RTC_IO_PDAC2_HOLD_V | |
| RTC_IO_PDAC2_HOLD_S | |
| RTC_IO_PDAC2_RDE_V | |
| RTC_IO_PDAC2_RDE_S | |
| RTC_IO_PDAC2_RUE_V | |
| RTC_IO_PDAC2_RUE_S | |
| RTC_IO_PDAC2_DAC | |
| RTC_IO_PDAC2_DAC_V | |
| RTC_IO_PDAC2_DAC_S | |
| RTC_IO_PDAC2_XPD_DAC_V | |
| RTC_IO_PDAC2_XPD_DAC_S | |
| RTC_IO_PDAC2_MUX_SEL_V | |
| RTC_IO_PDAC2_MUX_SEL_S | |
| RTC_IO_PDAC2_FUN_SEL | |
| RTC_IO_PDAC2_FUN_SEL_V | |
| RTC_IO_PDAC2_FUN_SEL_S | |
| RTC_IO_PDAC2_SLP_SEL_V | |
| RTC_IO_PDAC2_SLP_SEL_S | |
| RTC_IO_PDAC2_SLP_IE_V | |
| RTC_IO_PDAC2_SLP_IE_S | |
| RTC_IO_PDAC2_SLP_OE_V | |
| RTC_IO_PDAC2_SLP_OE_S | |
| RTC_IO_PDAC2_FUN_IE_V | |
| RTC_IO_PDAC2_FUN_IE_S | |
| RTC_IO_PDAC2_DAC_XPD_FORCE_V | |
| RTC_IO_PDAC2_DAC_XPD_FORCE_S | |
| RTC_IO_RTC_DEBUG_SEL_REG | |
| RTC_IO_RTC_IO_DATE_VERSION | |
| RTC_IO_SAR_DEBUG_BIT_SEL | |
| RTC_IO_SAR_DEBUG_BIT_SEL_S | |
| RTC_IO_SAR_DEBUG_BIT_SEL_V | |
| RTC_IO_SAR_I2C_IO_REG | |
| RTC_IO_SAR_I2C_SDA_SEL | |
| RTC_IO_SAR_I2C_SDA_SEL_V | |
| RTC_IO_SAR_I2C_SDA_SEL_S | |
| RTC_IO_SAR_I2C_SCL_SEL | |
| RTC_IO_SAR_I2C_SCL_SEL_V | |
| RTC_IO_SAR_I2C_SCL_SEL_S | |
| RTC_IO_SENSE1_HOLD_V | |
| RTC_IO_SENSE1_HOLD_S | |
| RTC_IO_SENSE1_MUX_SEL_V | |
| RTC_IO_SENSE1_MUX_SEL_S | |
| RTC_IO_SENSE1_FUN_SEL | |
| RTC_IO_SENSE1_FUN_SEL_V | |
| RTC_IO_SENSE1_FUN_SEL_S | |
| RTC_IO_SENSE1_SLP_SEL_V | |
| RTC_IO_SENSE1_SLP_SEL_S | |
| RTC_IO_SENSE1_SLP_IE_V | |
| RTC_IO_SENSE1_SLP_IE_S | |
| RTC_IO_SENSE1_FUN_IE_V | |
| RTC_IO_SENSE1_FUN_IE_S | |
| RTC_IO_SENSE2_HOLD_V | |
| RTC_IO_SENSE2_HOLD_S | |
| RTC_IO_SENSE2_MUX_SEL_V | |
| RTC_IO_SENSE2_MUX_SEL_S | |
| RTC_IO_SENSE2_FUN_SEL | |
| RTC_IO_SENSE2_FUN_SEL_V | |
| RTC_IO_SENSE2_FUN_SEL_S | |
| RTC_IO_SENSE2_SLP_SEL_V | |
| RTC_IO_SENSE2_SLP_SEL_S | |
| RTC_IO_SENSE2_SLP_IE_V | |
| RTC_IO_SENSE2_SLP_IE_S | |
| RTC_IO_SENSE2_FUN_IE_V | |
| RTC_IO_SENSE2_FUN_IE_S | |
| RTC_IO_SENSE3_HOLD_V | |
| RTC_IO_SENSE3_HOLD_S | |
| RTC_IO_SENSE3_MUX_SEL_V | |
| RTC_IO_SENSE3_MUX_SEL_S | |
| RTC_IO_SENSE3_FUN_SEL | |
| RTC_IO_SENSE3_FUN_SEL_V | |
| RTC_IO_SENSE3_FUN_SEL_S | |
| RTC_IO_SENSE3_SLP_SEL_V | |
| RTC_IO_SENSE3_SLP_SEL_S | |
| RTC_IO_SENSE3_SLP_IE_V | |
| RTC_IO_SENSE3_SLP_IE_S | |
| RTC_IO_SENSE3_FUN_IE_V | |
| RTC_IO_SENSE3_FUN_IE_S | |
| RTC_IO_SENSE4_HOLD_V | |
| RTC_IO_SENSE4_HOLD_S | |
| RTC_IO_SENSE4_MUX_SEL_V | |
| RTC_IO_SENSE4_MUX_SEL_S | |
| RTC_IO_SENSE4_FUN_SEL | |
| RTC_IO_SENSE4_FUN_SEL_V | |
| RTC_IO_SENSE4_FUN_SEL_S | |
| RTC_IO_SENSE4_SLP_SEL_V | |
| RTC_IO_SENSE4_SLP_SEL_S | |
| RTC_IO_SENSE4_SLP_IE_V | |
| RTC_IO_SENSE4_SLP_IE_S | |
| RTC_IO_SENSE4_FUN_IE_V | |
| RTC_IO_SENSE4_FUN_IE_S | |
| RTC_IO_SENSOR_PADS_REG | |
| RTC_IO_TOUCH_CFG_REG | |
| RTC_IO_TOUCH_DCUR | |
| RTC_IO_TOUCH_DCUR_S | |
| RTC_IO_TOUCH_DCUR_V | |
| RTC_IO_TOUCH_DRANGE | |
| RTC_IO_TOUCH_DRANGE_S | |
| RTC_IO_TOUCH_DRANGE_V | |
| RTC_IO_TOUCH_DREFH | |
| RTC_IO_TOUCH_DREFH_S | |
| RTC_IO_TOUCH_DREFH_V | |
| RTC_IO_TOUCH_DREFL | |
| RTC_IO_TOUCH_DREFL_S | |
| RTC_IO_TOUCH_DREFL_V | |
| RTC_IO_TOUCH_PAD0_REG | |
| RTC_IO_TOUCH_PAD0_DRV | |
| RTC_IO_TOUCH_PAD0_DAC | |
| RTC_IO_TOUCH_PAD0_DRV_V | |
| RTC_IO_TOUCH_PAD0_DRV_S | |
| RTC_IO_TOUCH_PAD0_RDE_V | |
| RTC_IO_TOUCH_PAD0_RDE_S | |
| RTC_IO_TOUCH_PAD0_RUE_V | |
| RTC_IO_TOUCH_PAD0_RUE_S | |
| RTC_IO_TOUCH_PAD0_DAC_V | |
| RTC_IO_TOUCH_PAD0_DAC_S | |
| RTC_IO_TOUCH_PAD0_XPD_V | |
| RTC_IO_TOUCH_PAD0_XPD_S | |
| RTC_IO_TOUCH_PAD0_HOLD_V | |
| RTC_IO_TOUCH_PAD0_HOLD_S | |
| RTC_IO_TOUCH_PAD0_START_V | |
| RTC_IO_TOUCH_PAD0_START_S | |
| RTC_IO_TOUCH_PAD0_FUN_SEL | |
| RTC_IO_TOUCH_PAD0_SLP_IE_V | |
| RTC_IO_TOUCH_PAD0_SLP_IE_S | |
| RTC_IO_TOUCH_PAD0_SLP_OE_V | |
| RTC_IO_TOUCH_PAD0_SLP_OE_S | |
| RTC_IO_TOUCH_PAD0_FUN_IE_V | |
| RTC_IO_TOUCH_PAD0_FUN_IE_S | |
| RTC_IO_TOUCH_PAD0_TIE_OPT_V | |
| RTC_IO_TOUCH_PAD0_TIE_OPT_S | |
| RTC_IO_TOUCH_PAD0_MUX_SEL_V | |
| RTC_IO_TOUCH_PAD0_MUX_SEL_S | |
| RTC_IO_TOUCH_PAD0_FUN_SEL_V | |
| RTC_IO_TOUCH_PAD0_FUN_SEL_S | |
| RTC_IO_TOUCH_PAD0_SLP_SEL_V | |
| RTC_IO_TOUCH_PAD0_SLP_SEL_S | |
| RTC_IO_TOUCH_PAD0_TO_GPIO_V | |
| RTC_IO_TOUCH_PAD0_TO_GPIO_S | |
| RTC_IO_TOUCH_PAD1_REG | |
| RTC_IO_TOUCH_PAD1_HOLD_V | |
| RTC_IO_TOUCH_PAD1_HOLD_S | |
| RTC_IO_TOUCH_PAD1_DRV | |
| RTC_IO_TOUCH_PAD1_DRV_V | |
| RTC_IO_TOUCH_PAD1_DRV_S | |
| RTC_IO_TOUCH_PAD1_RDE_V | |
| RTC_IO_TOUCH_PAD1_RDE_S | |
| RTC_IO_TOUCH_PAD1_RUE_V | |
| RTC_IO_TOUCH_PAD1_RUE_S | |
| RTC_IO_TOUCH_PAD1_DAC | |
| RTC_IO_TOUCH_PAD1_DAC_V | |
| RTC_IO_TOUCH_PAD1_DAC_S | |
| RTC_IO_TOUCH_PAD1_START_V | |
| RTC_IO_TOUCH_PAD1_START_S | |
| RTC_IO_TOUCH_PAD1_TIE_OPT_V | |
| RTC_IO_TOUCH_PAD1_TIE_OPT_S | |
| RTC_IO_TOUCH_PAD1_XPD_V | |
| RTC_IO_TOUCH_PAD1_XPD_S | |
| RTC_IO_TOUCH_PAD1_MUX_SEL_V | |
| RTC_IO_TOUCH_PAD1_MUX_SEL_S | |
| RTC_IO_TOUCH_PAD1_FUN_SEL | |
| RTC_IO_TOUCH_PAD1_FUN_SEL_V | |
| RTC_IO_TOUCH_PAD1_FUN_SEL_S | |
| RTC_IO_TOUCH_PAD1_SLP_SEL_V | |
| RTC_IO_TOUCH_PAD1_SLP_SEL_S | |
| RTC_IO_TOUCH_PAD1_SLP_IE_V | |
| RTC_IO_TOUCH_PAD1_SLP_IE_S | |
| RTC_IO_TOUCH_PAD1_SLP_OE_V | |
| RTC_IO_TOUCH_PAD1_SLP_OE_S | |
| RTC_IO_TOUCH_PAD1_FUN_IE_V | |
| RTC_IO_TOUCH_PAD1_FUN_IE_S | |
| RTC_IO_TOUCH_PAD1_TO_GPIO_V | |
| RTC_IO_TOUCH_PAD1_TO_GPIO_S | |
| RTC_IO_TOUCH_PAD2_REG | |
| RTC_IO_TOUCH_PAD2_HOLD_V | |
| RTC_IO_TOUCH_PAD2_HOLD_S | |
| RTC_IO_TOUCH_PAD2_DRV | |
| RTC_IO_TOUCH_PAD2_DRV_V | |
| RTC_IO_TOUCH_PAD2_DRV_S | |
| RTC_IO_TOUCH_PAD2_RDE_V | |
| RTC_IO_TOUCH_PAD2_RDE_S | |
| RTC_IO_TOUCH_PAD2_RUE_V | |
| RTC_IO_TOUCH_PAD2_RUE_S | |
| RTC_IO_TOUCH_PAD2_DAC | |
| RTC_IO_TOUCH_PAD2_DAC_V | |
| RTC_IO_TOUCH_PAD2_DAC_S | |
| RTC_IO_TOUCH_PAD2_START_V | |
| RTC_IO_TOUCH_PAD2_START_S | |
| RTC_IO_TOUCH_PAD2_TIE_OPT_V | |
| RTC_IO_TOUCH_PAD2_TIE_OPT_S | |
| RTC_IO_TOUCH_PAD2_XPD_V | |
| RTC_IO_TOUCH_PAD2_XPD_S | |
| RTC_IO_TOUCH_PAD2_MUX_SEL_V | |
| RTC_IO_TOUCH_PAD2_MUX_SEL_S | |
| RTC_IO_TOUCH_PAD2_FUN_SEL | |
| RTC_IO_TOUCH_PAD2_FUN_SEL_V | |
| RTC_IO_TOUCH_PAD2_FUN_SEL_S | |
| RTC_IO_TOUCH_PAD2_SLP_SEL_V | |
| RTC_IO_TOUCH_PAD2_SLP_SEL_S | |
| RTC_IO_TOUCH_PAD2_SLP_IE_V | |
| RTC_IO_TOUCH_PAD2_SLP_IE_S | |
| RTC_IO_TOUCH_PAD2_SLP_OE_V | |
| RTC_IO_TOUCH_PAD2_SLP_OE_S | |
| RTC_IO_TOUCH_PAD2_FUN_IE_V | |
| RTC_IO_TOUCH_PAD2_FUN_IE_S | |
| RTC_IO_TOUCH_PAD2_TO_GPIO_V | |
| RTC_IO_TOUCH_PAD2_TO_GPIO_S | |
| RTC_IO_TOUCH_PAD3_REG | |
| RTC_IO_TOUCH_PAD3_HOLD_V | |
| RTC_IO_TOUCH_PAD3_HOLD_S | |
| RTC_IO_TOUCH_PAD3_DRV | |
| RTC_IO_TOUCH_PAD3_DRV_V | |
| RTC_IO_TOUCH_PAD3_DRV_S | |
| RTC_IO_TOUCH_PAD3_RDE_V | |
| RTC_IO_TOUCH_PAD3_RDE_S | |
| RTC_IO_TOUCH_PAD3_RUE_V | |
| RTC_IO_TOUCH_PAD3_RUE_S | |
| RTC_IO_TOUCH_PAD3_DAC | |
| RTC_IO_TOUCH_PAD3_DAC_V | |
| RTC_IO_TOUCH_PAD3_DAC_S | |
| RTC_IO_TOUCH_PAD3_START_V | |
| RTC_IO_TOUCH_PAD3_START_S | |
| RTC_IO_TOUCH_PAD3_TIE_OPT_V | |
| RTC_IO_TOUCH_PAD3_TIE_OPT_S | |
| RTC_IO_TOUCH_PAD3_XPD_V | |
| RTC_IO_TOUCH_PAD3_XPD_S | |
| RTC_IO_TOUCH_PAD3_MUX_SEL_V | |
| RTC_IO_TOUCH_PAD3_MUX_SEL_S | |
| RTC_IO_TOUCH_PAD3_FUN_SEL | |
| RTC_IO_TOUCH_PAD3_FUN_SEL_V | |
| RTC_IO_TOUCH_PAD3_FUN_SEL_S | |
| RTC_IO_TOUCH_PAD3_SLP_SEL_V | |
| RTC_IO_TOUCH_PAD3_SLP_SEL_S | |
| RTC_IO_TOUCH_PAD3_SLP_IE_V | |
| RTC_IO_TOUCH_PAD3_SLP_IE_S | |
| RTC_IO_TOUCH_PAD3_SLP_OE_V | |
| RTC_IO_TOUCH_PAD3_SLP_OE_S | |
| RTC_IO_TOUCH_PAD3_FUN_IE_V | |
| RTC_IO_TOUCH_PAD3_FUN_IE_S | |
| RTC_IO_TOUCH_PAD3_TO_GPIO_V | |
| RTC_IO_TOUCH_PAD3_TO_GPIO_S | |
| RTC_IO_TOUCH_PAD4_REG | |
| RTC_IO_TOUCH_PAD4_HOLD_V | |
| RTC_IO_TOUCH_PAD4_HOLD_S | |
| RTC_IO_TOUCH_PAD4_DRV | |
| RTC_IO_TOUCH_PAD4_DRV_V | |
| RTC_IO_TOUCH_PAD4_DRV_S | |
| RTC_IO_TOUCH_PAD4_RDE_V | |
| RTC_IO_TOUCH_PAD4_RDE_S | |
| RTC_IO_TOUCH_PAD4_RUE_V | |
| RTC_IO_TOUCH_PAD4_RUE_S | |
| RTC_IO_TOUCH_PAD4_DAC | |
| RTC_IO_TOUCH_PAD4_DAC_V | |
| RTC_IO_TOUCH_PAD4_DAC_S | |
| RTC_IO_TOUCH_PAD4_START_V | |
| RTC_IO_TOUCH_PAD4_START_S | |
| RTC_IO_TOUCH_PAD4_TIE_OPT_V | |
| RTC_IO_TOUCH_PAD4_TIE_OPT_S | |
| RTC_IO_TOUCH_PAD4_XPD_V | |
| RTC_IO_TOUCH_PAD4_XPD_S | |
| RTC_IO_TOUCH_PAD4_MUX_SEL_V | |
| RTC_IO_TOUCH_PAD4_MUX_SEL_S | |
| RTC_IO_TOUCH_PAD4_FUN_SEL | |
| RTC_IO_TOUCH_PAD4_FUN_SEL_V | |
| RTC_IO_TOUCH_PAD4_FUN_SEL_S | |
| RTC_IO_TOUCH_PAD4_SLP_SEL_V | |
| RTC_IO_TOUCH_PAD4_SLP_SEL_S | |
| RTC_IO_TOUCH_PAD4_SLP_IE_V | |
| RTC_IO_TOUCH_PAD4_SLP_IE_S | |
| RTC_IO_TOUCH_PAD4_SLP_OE_V | |
| RTC_IO_TOUCH_PAD4_SLP_OE_S | |
| RTC_IO_TOUCH_PAD4_FUN_IE_V | |
| RTC_IO_TOUCH_PAD4_FUN_IE_S | |
| RTC_IO_TOUCH_PAD4_TO_GPIO_V | |
| RTC_IO_TOUCH_PAD4_TO_GPIO_S | |
| RTC_IO_TOUCH_PAD5_REG | |
| RTC_IO_TOUCH_PAD5_HOLD_V | |
| RTC_IO_TOUCH_PAD5_HOLD_S | |
| RTC_IO_TOUCH_PAD5_DRV | |
| RTC_IO_TOUCH_PAD5_DRV_V | |
| RTC_IO_TOUCH_PAD5_DRV_S | |
| RTC_IO_TOUCH_PAD5_RDE_V | |
| RTC_IO_TOUCH_PAD5_RDE_S | |
| RTC_IO_TOUCH_PAD5_RUE_V | |
| RTC_IO_TOUCH_PAD5_RUE_S | |
| RTC_IO_TOUCH_PAD5_DAC | |
| RTC_IO_TOUCH_PAD5_DAC_V | |
| RTC_IO_TOUCH_PAD5_DAC_S | |
| RTC_IO_TOUCH_PAD5_START_V | |
| RTC_IO_TOUCH_PAD5_START_S | |
| RTC_IO_TOUCH_PAD5_TIE_OPT_V | |
| RTC_IO_TOUCH_PAD5_TIE_OPT_S | |
| RTC_IO_TOUCH_PAD5_XPD_V | |
| RTC_IO_TOUCH_PAD5_XPD_S | |
| RTC_IO_TOUCH_PAD5_MUX_SEL_V | |
| RTC_IO_TOUCH_PAD5_MUX_SEL_S | |
| RTC_IO_TOUCH_PAD5_FUN_SEL | |
| RTC_IO_TOUCH_PAD5_FUN_SEL_V | |
| RTC_IO_TOUCH_PAD5_FUN_SEL_S | |
| RTC_IO_TOUCH_PAD5_SLP_SEL_V | |
| RTC_IO_TOUCH_PAD5_SLP_SEL_S | |
| RTC_IO_TOUCH_PAD5_SLP_IE_V | |
| RTC_IO_TOUCH_PAD5_SLP_IE_S | |
| RTC_IO_TOUCH_PAD5_SLP_OE_V | |
| RTC_IO_TOUCH_PAD5_SLP_OE_S | |
| RTC_IO_TOUCH_PAD5_FUN_IE_V | |
| RTC_IO_TOUCH_PAD5_FUN_IE_S | |
| RTC_IO_TOUCH_PAD5_TO_GPIO_V | |
| RTC_IO_TOUCH_PAD5_TO_GPIO_S | |
| RTC_IO_TOUCH_PAD6_REG | |
| RTC_IO_TOUCH_PAD6_HOLD_V | |
| RTC_IO_TOUCH_PAD6_HOLD_S | |
| RTC_IO_TOUCH_PAD6_DRV | |
| RTC_IO_TOUCH_PAD6_DRV_V | |
| RTC_IO_TOUCH_PAD6_DRV_S | |
| RTC_IO_TOUCH_PAD6_RDE_V | |
| RTC_IO_TOUCH_PAD6_RDE_S | |
| RTC_IO_TOUCH_PAD6_RUE_V | |
| RTC_IO_TOUCH_PAD6_RUE_S | |
| RTC_IO_TOUCH_PAD6_DAC | |
| RTC_IO_TOUCH_PAD6_DAC_V | |
| RTC_IO_TOUCH_PAD6_DAC_S | |
| RTC_IO_TOUCH_PAD6_START_V | |
| RTC_IO_TOUCH_PAD6_START_S | |
| RTC_IO_TOUCH_PAD6_TIE_OPT_V | |
| RTC_IO_TOUCH_PAD6_TIE_OPT_S | |
| RTC_IO_TOUCH_PAD6_XPD_V | |
| RTC_IO_TOUCH_PAD6_XPD_S | |
| RTC_IO_TOUCH_PAD6_MUX_SEL_V | |
| RTC_IO_TOUCH_PAD6_MUX_SEL_S | |
| RTC_IO_TOUCH_PAD6_FUN_SEL | |
| RTC_IO_TOUCH_PAD6_FUN_SEL_V | |
| RTC_IO_TOUCH_PAD6_FUN_SEL_S | |
| RTC_IO_TOUCH_PAD6_SLP_SEL_V | |
| RTC_IO_TOUCH_PAD6_SLP_SEL_S | |
| RTC_IO_TOUCH_PAD6_SLP_IE_V | |
| RTC_IO_TOUCH_PAD6_SLP_IE_S | |
| RTC_IO_TOUCH_PAD6_SLP_OE_V | |
| RTC_IO_TOUCH_PAD6_SLP_OE_S | |
| RTC_IO_TOUCH_PAD6_FUN_IE_V | |
| RTC_IO_TOUCH_PAD6_FUN_IE_S | |
| RTC_IO_TOUCH_PAD6_TO_GPIO_V | |
| RTC_IO_TOUCH_PAD6_TO_GPIO_S | |
| RTC_IO_TOUCH_PAD7_REG | |
| RTC_IO_TOUCH_PAD7_HOLD_V | |
| RTC_IO_TOUCH_PAD7_HOLD_S | |
| RTC_IO_TOUCH_PAD7_DRV | |
| RTC_IO_TOUCH_PAD7_DRV_V | |
| RTC_IO_TOUCH_PAD7_DRV_S | |
| RTC_IO_TOUCH_PAD7_RDE_V | |
| RTC_IO_TOUCH_PAD7_RDE_S | |
| RTC_IO_TOUCH_PAD7_RUE_V | |
| RTC_IO_TOUCH_PAD7_RUE_S | |
| RTC_IO_TOUCH_PAD7_DAC | |
| RTC_IO_TOUCH_PAD7_DAC_V | |
| RTC_IO_TOUCH_PAD7_DAC_S | |
| RTC_IO_TOUCH_PAD7_START_V | |
| RTC_IO_TOUCH_PAD7_START_S | |
| RTC_IO_TOUCH_PAD7_TIE_OPT_V | |
| RTC_IO_TOUCH_PAD7_TIE_OPT_S | |
| RTC_IO_TOUCH_PAD7_XPD_V | |
| RTC_IO_TOUCH_PAD7_XPD_S | |
| RTC_IO_TOUCH_PAD7_MUX_SEL_V | |
| RTC_IO_TOUCH_PAD7_MUX_SEL_S | |
| RTC_IO_TOUCH_PAD7_FUN_SEL | |
| RTC_IO_TOUCH_PAD7_FUN_SEL_V | |
| RTC_IO_TOUCH_PAD7_FUN_SEL_S | |
| RTC_IO_TOUCH_PAD7_SLP_SEL_V | |
| RTC_IO_TOUCH_PAD7_SLP_SEL_S | |
| RTC_IO_TOUCH_PAD7_SLP_IE_V | |
| RTC_IO_TOUCH_PAD7_SLP_IE_S | |
| RTC_IO_TOUCH_PAD7_SLP_OE_V | |
| RTC_IO_TOUCH_PAD7_SLP_OE_S | |
| RTC_IO_TOUCH_PAD7_FUN_IE_V | |
| RTC_IO_TOUCH_PAD7_FUN_IE_S | |
| RTC_IO_TOUCH_PAD7_TO_GPIO_V | |
| RTC_IO_TOUCH_PAD7_TO_GPIO_S | |
| RTC_IO_TOUCH_PAD8_REG | |
| RTC_IO_TOUCH_PAD8_DAC | |
| RTC_IO_TOUCH_PAD8_DAC_V | |
| RTC_IO_TOUCH_PAD8_DAC_S | |
| RTC_IO_TOUCH_PAD8_START_V | |
| RTC_IO_TOUCH_PAD8_START_S | |
| RTC_IO_TOUCH_PAD8_TIE_OPT_V | |
| RTC_IO_TOUCH_PAD8_TIE_OPT_S | |
| RTC_IO_TOUCH_PAD8_XPD_V | |
| RTC_IO_TOUCH_PAD8_XPD_S | |
| RTC_IO_TOUCH_PAD8_TO_GPIO_V | |
| RTC_IO_TOUCH_PAD8_TO_GPIO_S | |
| RTC_IO_TOUCH_PAD9_REG | |
| RTC_IO_TOUCH_PAD9_DAC | |
| RTC_IO_TOUCH_PAD9_DAC_V | |
| RTC_IO_TOUCH_PAD9_DAC_S | |
| RTC_IO_TOUCH_PAD9_START_V | |
| RTC_IO_TOUCH_PAD9_START_S | |
| RTC_IO_TOUCH_PAD9_TIE_OPT_V | |
| RTC_IO_TOUCH_PAD9_TIE_OPT_S | |
| RTC_IO_TOUCH_PAD9_XPD_V | |
| RTC_IO_TOUCH_PAD9_XPD_S | |
| RTC_IO_TOUCH_PAD9_TO_GPIO_V | |
| RTC_IO_TOUCH_PAD9_TO_GPIO_S | |
| RTC_IO_TOUCH_XPD_BIAS_S | |
| RTC_IO_TOUCH_XPD_BIAS_V | |
| RTC_IO_X32N_DRV | |
| RTC_IO_X32N_DRV_V | |
| RTC_IO_X32N_DRV_S | |
| RTC_IO_X32N_HOLD_V | |
| RTC_IO_X32N_HOLD_S | |
| RTC_IO_X32N_RDE_V | |
| RTC_IO_X32N_RDE_S | |
| RTC_IO_X32N_RUE_V | |
| RTC_IO_X32N_RUE_S | |
| RTC_IO_X32P_DRV | |
| RTC_IO_X32P_DRV_V | |
| RTC_IO_X32P_DRV_S | |
| RTC_IO_X32P_HOLD_V | |
| RTC_IO_X32P_HOLD_S | |
| RTC_IO_X32P_RDE_V | |
| RTC_IO_X32P_RDE_S | |
| RTC_IO_X32P_RUE_V | |
| RTC_IO_X32P_RUE_S | |
| RTC_IO_X32N_MUX_SEL_V | |
| RTC_IO_X32N_MUX_SEL_S | |
| RTC_IO_X32P_MUX_SEL_V | |
| RTC_IO_X32P_MUX_SEL_S | |
| RTC_IO_X32N_FUN_SEL | |
| RTC_IO_X32N_FUN_SEL_V | |
| RTC_IO_X32N_FUN_SEL_S | |
| RTC_IO_X32N_SLP_SEL_V | |
| RTC_IO_X32N_SLP_SEL_S | |
| RTC_IO_X32N_SLP_IE_V | |
| RTC_IO_X32N_SLP_IE_S | |
| RTC_IO_X32N_SLP_OE_V | |
| RTC_IO_X32N_SLP_OE_S | |
| RTC_IO_X32N_FUN_IE_V | |
| RTC_IO_X32N_FUN_IE_S | |
| RTC_IO_X32P_FUN_SEL | |
| RTC_IO_X32P_FUN_SEL_V | |
| RTC_IO_X32P_FUN_SEL_S | |
| RTC_IO_X32P_SLP_SEL_V | |
| RTC_IO_X32P_SLP_SEL_S | |
| RTC_IO_X32P_SLP_IE_V | |
| RTC_IO_X32P_SLP_IE_S | |
| RTC_IO_X32P_SLP_OE_V | |
| RTC_IO_X32P_SLP_OE_S | |
| RTC_IO_X32P_FUN_IE_V | |
| RTC_IO_X32P_FUN_IE_S | |
| RTC_IO_XPD_HALL_S | |
| RTC_IO_XPD_HALL_V | |
| RTC_IO_XPD_XTAL_32K_V | |
| RTC_IO_XPD_XTAL_32K_S | |
| RTC_IO_XTAL_32K_PAD_REG | |
| RTC_IO_XTL_EXT_CTR_REG | |
| RTC_IO_XTL_EXT_CTR_SEL | |
| RTC_IO_XTL_EXT_CTR_SEL_S | |
| RTC_IO_XTL_EXT_CTR_SEL_V | |
| SAR | |
| SCHED_FIFO | |
| SCHED_OTHER | |
| SCHED_RR | |
| SCOMPARE1 | |
| SDIO_TOHOST_INT_OUT_IDX | |
| SEEK_CUR | |
| SEEK_END | |
| SEEK_SET | |
| SIG_GPIO_OUT_IDX | |
| SIG_IN_FUNC224_IDX | |
| SIG_IN_FUNC225_IDX | |
| SIG_IN_FUNC226_IDX | |
| SIG_IN_FUNC227_IDX | |
| SIG_IN_FUNC228_IDX | |
| SLP_DRV | |
| SLP_DRV_S | |
| SLP_DRV_V | |
| SLP_IE_S | |
| SLP_IE_V | |
| SLP_OE_S | |
| SLP_OE_V | |
| SLP_PD_S | |
| SLP_PD_V | |
| SLP_PU_S | |
| SLP_PU_V | |
| SLP_SEL_S | |
| SLP_SEL_V | |
| SOC_BYTE_ACCESSIBLE_HIGH | |
| SOC_BYTE_ACCESSIBLE_LOW | |
| SOC_CACHE_APP_HIGH | |
| SOC_CACHE_APP_LOW | |
| SOC_CACHE_PRO_HIGH | |
| SOC_CACHE_PRO_LOW | |
| SOC_DIRAM_DRAM_HIGH | |
| SOC_DIRAM_DRAM_LOW | |
| SOC_DIRAM_IRAM_HIGH | |
| SOC_DIRAM_IRAM_LOW | |
| SOC_DMA_HIGH | |
| SOC_DMA_LOW | |
| SOC_DRAM_HIGH | |
| SOC_DRAM_LOW | |
| SOC_DROM_HIGH | |
| SOC_DROM_LOW | |
| SOC_EXTRAM_DATA_HIGH | |
| SOC_EXTRAM_DATA_LOW | |
| SOC_IRAM_HIGH | |
| SOC_IRAM_LOW | |
| SOC_IROM_HIGH | |
| SOC_IROM_LOW | |
| SOC_IROM_MASK_HIGH | |
| SOC_IROM_MASK_LOW | |
| SOC_MAX_CONTIGUOUS_RAM_SIZE | |
| SOC_MEMORY_TYPE_NO_PRIOS | |
| SOC_MEM_INTERNAL_HIGH | |
| SOC_MEM_INTERNAL_LOW | |
| SOC_RTC_DATA_HIGH | |
| SOC_RTC_DATA_LOW | |
| SOC_RTC_DRAM_HIGH | |
| SOC_RTC_DRAM_LOW | |
| SOC_RTC_IRAM_HIGH | |
| SOC_RTC_IRAM_LOW | |
| SPICLK_IN_IDX | |
| SPICLK_OUT_IDX | |
| SPICOMMON_BUSFLAG_DUAL | |
| SPICOMMON_BUSFLAG_MASTER | |
| SPICOMMON_BUSFLAG_MISO | |
| SPICOMMON_BUSFLAG_MOSI | |
| SPICOMMON_BUSFLAG_NATIVE_PINS | |
| SPICOMMON_BUSFLAG_QUAD | |
| SPICOMMON_BUSFLAG_SCLK | |
| SPICOMMON_BUSFLAG_SLAVE | |
| SPICOMMON_BUSFLAG_WPHD | |
| SPICS0_IN_IDX | |
| SPICS0_OUT_IDX | |
| SPICS1_IN_IDX | |
| SPICS1_OUT_IDX | |
| SPICS2_IN_IDX | |
| SPICS2_OUT_IDX | |
| SPID4_IN_IDX | |
| SPID4_OUT_IDX | |
| SPID5_IN_IDX | |
| SPID5_OUT_IDX | |
| SPID6_IN_IDX | |
| SPID6_OUT_IDX | |
| SPID7_IN_IDX | |
| SPID7_OUT_IDX | |
| SPID_IN_IDX | |
| SPID_OUT_IDX | |
| SPIHD_IN_IDX | |
| SPIHD_OUT_IDX | |
| SPIQ_IN_IDX | |
| SPIQ_OUT_IDX | |
| SPIWP_IN_IDX | |
| SPIWP_OUT_IDX | |
| SPI_AHBM_FIFO_RST_S | |
| SPI_AHBM_FIFO_RST_V | |
| SPI_AHBM_RST_S | |
| SPI_AHBM_RST_V | |
| SPI_BUF0 | |
| SPI_BUF0_V | |
| SPI_BUF0_S | |
| SPI_BUF1 | |
| SPI_BUF1_V | |
| SPI_BUF1_S | |
| SPI_BUF2 | |
| SPI_BUF2_V | |
| SPI_BUF2_S | |
| SPI_BUF3 | |
| SPI_BUF3_V | |
| SPI_BUF3_S | |
| SPI_BUF4 | |
| SPI_BUF4_V | |
| SPI_BUF4_S | |
| SPI_BUF5 | |
| SPI_BUF5_V | |
| SPI_BUF5_S | |
| SPI_BUF6 | |
| SPI_BUF6_V | |
| SPI_BUF6_S | |
| SPI_BUF7 | |
| SPI_BUF7_V | |
| SPI_BUF7_S | |
| SPI_BUF8 | |
| SPI_BUF8_V | |
| SPI_BUF8_S | |
| SPI_BUF9 | |
| SPI_BUF9_V | |
| SPI_BUF9_S | |
| SPI_BUF10 | |
| SPI_BUF10_V | |
| SPI_BUF10_S | |
| SPI_BUF11 | |
| SPI_BUF11_V | |
| SPI_BUF11_S | |
| SPI_BUF12 | |
| SPI_BUF12_V | |
| SPI_BUF12_S | |
| SPI_BUF13 | |
| SPI_BUF13_V | |
| SPI_BUF13_S | |
| SPI_BUF14 | |
| SPI_BUF14_V | |
| SPI_BUF14_S | |
| SPI_BUF15 | |
| SPI_BUF15_V | |
| SPI_BUF15_S | |
| SPI_CACHE_FLASH_PES_EN_S | |
| SPI_CACHE_FLASH_PES_EN_V | |
| SPI_CACHE_FLASH_USR_CMD_S | |
| SPI_CACHE_FLASH_USR_CMD_V | |
| SPI_CACHE_REQ_EN_S | |
| SPI_CACHE_REQ_EN_V | |
| SPI_CACHE_SRAM_USR_RCMD_S | |
| SPI_CACHE_SRAM_USR_RCMD_V | |
| SPI_CACHE_SRAM_USR_RD_CMD_BITLEN | |
| SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_S | |
| SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_V | |
| SPI_CACHE_SRAM_USR_RD_CMD_VALUE | |
| SPI_CACHE_SRAM_USR_RD_CMD_VALUE_S | |
| SPI_CACHE_SRAM_USR_RD_CMD_VALUE_V | |
| SPI_CACHE_SRAM_USR_WCMD_S | |
| SPI_CACHE_SRAM_USR_WCMD_V | |
| SPI_CACHE_SRAM_USR_WR_CMD_BITLEN | |
| SPI_CACHE_SRAM_USR_WR_CMD_BITLEN_S | |
| SPI_CACHE_SRAM_USR_WR_CMD_BITLEN_V | |
| SPI_CACHE_SRAM_USR_WR_CMD_VALUE | |
| SPI_CACHE_SRAM_USR_WR_CMD_VALUE_S | |
| SPI_CACHE_SRAM_USR_WR_CMD_VALUE_V | |
| SPI_CACHE_USR_CMD_4BYTE_V | |
| SPI_CACHE_USR_CMD_4BYTE_S | |
| SPI_CK_DIS_S | |
| SPI_CK_DIS_V | |
| SPI_CK_IDLE_EDGE_S | |
| SPI_CK_IDLE_EDGE_V | |
| SPI_CK_I_EDGE_S | |
| SPI_CK_I_EDGE_V | |
| SPI_CK_OUT_EDGE_S | |
| SPI_CK_OUT_EDGE_V | |
| SPI_CK_OUT_HIGH_MODE | |
| SPI_CK_OUT_HIGH_MODE_S | |
| SPI_CK_OUT_HIGH_MODE_V | |
| SPI_CK_OUT_LOW_MODE | |
| SPI_CK_OUT_LOW_MODE_S | |
| SPI_CK_OUT_LOW_MODE_V | |
| SPI_CLKCNT_H | |
| SPI_CLKCNT_H_S | |
| SPI_CLKCNT_H_V | |
| SPI_CLKCNT_L | |
| SPI_CLKCNT_L_S | |
| SPI_CLKCNT_L_V | |
| SPI_CLKCNT_N | |
| SPI_CLKCNT_N_S | |
| SPI_CLKCNT_N_V | |
| SPI_CLKDIV_PRE | |
| SPI_CLKDIV_PRE_S | |
| SPI_CLKDIV_PRE_V | |
| SPI_CLK_DIV | |
| SPI_CLK_EQU_SYSCLK_S | |
| SPI_CLK_EQU_SYSCLK_V | |
| SPI_CS0_DIS_V | |
| SPI_CS0_DIS_S | |
| SPI_CS1_DIS_V | |
| SPI_CS1_DIS_S | |
| SPI_CS2_DIS_V | |
| SPI_CS2_DIS_S | |
| SPI_CS_DELAY_MODE | |
| SPI_CS_DELAY_MODE_S | |
| SPI_CS_DELAY_MODE_V | |
| SPI_CS_DELAY_NUM | |
| SPI_CS_DELAY_NUM_S | |
| SPI_CS_DELAY_NUM_V | |
| SPI_CS_HOLD_DELAY | |
| SPI_CS_HOLD_DELAY_RES | |
| SPI_CS_HOLD_DELAY_RES_S | |
| SPI_CS_HOLD_DELAY_RES_V | |
| SPI_CS_HOLD_DELAY_S | |
| SPI_CS_HOLD_DELAY_V | |
| SPI_CS_HOLD_S | |
| SPI_CS_HOLD_V | |
| SPI_CS_I_MODE | |
| SPI_CS_I_MODE_S | |
| SPI_CS_I_MODE_V | |
| SPI_CS_KEEP_ACTIVE_S | |
| SPI_CS_KEEP_ACTIVE_V | |
| SPI_CS_SETUP_S | |
| SPI_CS_SETUP_V | |
| SPI_DATE | |
| SPI_DATE_S | |
| SPI_DATE_V | |
| SPI_DEVICE_3WIRE | |
| SPI_DEVICE_BIT_LSBFIRST | |
| SPI_DEVICE_CLK_AS_CS | |
| SPI_DEVICE_HALFDUPLEX | |
| SPI_DEVICE_NO_DUMMY | |
| SPI_DEVICE_POSITIVE_CS | |
| SPI_DEVICE_RXBIT_LSBFIRST | |
| SPI_DEVICE_TXBIT_LSBFIRST | |
| SPI_DMA_CONTINUE_S | |
| SPI_DMA_CONTINUE_V | |
| SPI_DMA_INLINK_DSCR | |
| SPI_DMA_INLINK_DSCR_BF0 | |
| SPI_DMA_INLINK_DSCR_BF0_V | |
| SPI_DMA_INLINK_DSCR_BF0_S | |
| SPI_DMA_INLINK_DSCR_BF1 | |
| SPI_DMA_INLINK_DSCR_BF1_V | |
| SPI_DMA_INLINK_DSCR_BF1_S | |
| SPI_DMA_INLINK_DSCR_S | |
| SPI_DMA_INLINK_DSCR_V | |
| SPI_DMA_IN_ERR_EOF_DES_ADDR | |
| SPI_DMA_IN_ERR_EOF_DES_ADDR_S | |
| SPI_DMA_IN_ERR_EOF_DES_ADDR_V | |
| SPI_DMA_IN_STATUS | |
| SPI_DMA_IN_STATUS_S | |
| SPI_DMA_IN_STATUS_V | |
| SPI_DMA_IN_SUC_EOF_DES_ADDR | |
| SPI_DMA_IN_SUC_EOF_DES_ADDR_S | |
| SPI_DMA_IN_SUC_EOF_DES_ADDR_V | |
| SPI_DMA_OUTLINK_DSCR | |
| SPI_DMA_OUTLINK_DSCR_BF0 | |
| SPI_DMA_OUTLINK_DSCR_BF0_V | |
| SPI_DMA_OUTLINK_DSCR_BF0_S | |
| SPI_DMA_OUTLINK_DSCR_BF1 | |
| SPI_DMA_OUTLINK_DSCR_BF1_V | |
| SPI_DMA_OUTLINK_DSCR_BF1_S | |
| SPI_DMA_OUTLINK_DSCR_S | |
| SPI_DMA_OUTLINK_DSCR_V | |
| SPI_DMA_OUT_EOF_BFR_DES_ADDR | |
| SPI_DMA_OUT_EOF_BFR_DES_ADDR_S | |
| SPI_DMA_OUT_EOF_BFR_DES_ADDR_V | |
| SPI_DMA_OUT_EOF_DES_ADDR | |
| SPI_DMA_OUT_EOF_DES_ADDR_S | |
| SPI_DMA_OUT_EOF_DES_ADDR_V | |
| SPI_DMA_OUT_STATUS | |
| SPI_DMA_OUT_STATUS_S | |
| SPI_DMA_OUT_STATUS_V | |
| SPI_DMA_RX_EN_S | |
| SPI_DMA_RX_EN_V | |
| SPI_DMA_RX_STOP_S | |
| SPI_DMA_RX_STOP_V | |
| SPI_DMA_TX_EN_S | |
| SPI_DMA_TX_EN_V | |
| SPI_DMA_TX_STOP_S | |
| SPI_DMA_TX_STOP_V | |
| SPI_DOUTDIN_S | |
| SPI_DOUTDIN_V | |
| SPI_FASTRD_MODE_S | |
| SPI_FASTRD_MODE_V | |
| SPI_FCS_CRC_EN_S | |
| SPI_FCS_CRC_EN_V | |
| SPI_FLASH_BE_S | |
| SPI_FLASH_BE_V | |
| SPI_FLASH_CE_S | |
| SPI_FLASH_CE_V | |
| SPI_FLASH_DP_S | |
| SPI_FLASH_DP_V | |
| SPI_FLASH_HPM_S | |
| SPI_FLASH_HPM_V | |
| SPI_FLASH_PER_S | |
| SPI_FLASH_PER_V | |
| SPI_FLASH_PES_S | |
| SPI_FLASH_PES_V | |
| SPI_FLASH_PP_S | |
| SPI_FLASH_PP_V | |
| SPI_FLASH_RDID_S | |
| SPI_FLASH_RDID_V | |
| SPI_FLASH_RDSR_S | |
| SPI_FLASH_RDSR_V | |
| SPI_FLASH_READ_S | |
| SPI_FLASH_READ_V | |
| SPI_FLASH_RES_S | |
| SPI_FLASH_RES_V | |
| SPI_FLASH_SE_S | |
| SPI_FLASH_SE_V | |
| SPI_FLASH_WRDI_S | |
| SPI_FLASH_WRDI_V | |
| SPI_FLASH_WREN_S | |
| SPI_FLASH_WREN_V | |
| SPI_FLASH_WRSR_S | |
| SPI_FLASH_WRSR_V | |
| SPI_FREAD_DIO_S | |
| SPI_FREAD_DIO_V | |
| SPI_FREAD_DUAL_S | |
| SPI_FREAD_DUAL_V | |
| SPI_FREAD_QIO_S | |
| SPI_FREAD_QIO_V | |
| SPI_FREAD_QUAD_S | |
| SPI_FREAD_QUAD_V | |
| SPI_FWRITE_DIO_S | |
| SPI_FWRITE_DIO_V | |
| SPI_FWRITE_DUAL_S | |
| SPI_FWRITE_DUAL_V | |
| SPI_FWRITE_QIO_S | |
| SPI_FWRITE_QIO_V | |
| SPI_FWRITE_QUAD_S | |
| SPI_FWRITE_QUAD_V | |
| SPI_HOLD_TIME | |
| SPI_HOLD_TIME_S | |
| SPI_HOLD_TIME_V | |
| SPI_INDSCR_BURST_EN_S | |
| SPI_INDSCR_BURST_EN_V | |
| SPI_INLINK_ADDR | |
| SPI_INLINK_ADDR_S | |
| SPI_INLINK_ADDR_V | |
| SPI_INLINK_AUTO_RET_S | |
| SPI_INLINK_AUTO_RET_V | |
| SPI_INLINK_DSCR_EMPTY_INT_CLR_S | |
| SPI_INLINK_DSCR_EMPTY_INT_CLR_V | |
| SPI_INLINK_DSCR_EMPTY_INT_ENA_S | |
| SPI_INLINK_DSCR_EMPTY_INT_ENA_V | |
| SPI_INLINK_DSCR_EMPTY_INT_RAW_S | |
| SPI_INLINK_DSCR_EMPTY_INT_RAW_V | |
| SPI_INLINK_DSCR_EMPTY_INT_ST_S | |
| SPI_INLINK_DSCR_EMPTY_INT_ST_V | |
| SPI_INLINK_DSCR_ERROR_INT_CLR_S | |
| SPI_INLINK_DSCR_ERROR_INT_CLR_V | |
| SPI_INLINK_DSCR_ERROR_INT_ENA_S | |
| SPI_INLINK_DSCR_ERROR_INT_ENA_V | |
| SPI_INLINK_DSCR_ERROR_INT_RAW_S | |
| SPI_INLINK_DSCR_ERROR_INT_RAW_V | |
| SPI_INLINK_DSCR_ERROR_INT_ST_S | |
| SPI_INLINK_DSCR_ERROR_INT_ST_V | |
| SPI_INLINK_RESTART_S | |
| SPI_INLINK_RESTART_V | |
| SPI_INLINK_START_S | |
| SPI_INLINK_START_V | |
| SPI_INLINK_STOP_S | |
| SPI_INLINK_STOP_V | |
| SPI_INT_EN | |
| SPI_INT_EN_S | |
| SPI_INT_EN_V | |
| SPI_INT_HOLD_ENA | |
| SPI_INT_HOLD_ENA_S | |
| SPI_INT_HOLD_ENA_V | |
| SPI_IN_DONE_INT_CLR_S | |
| SPI_IN_DONE_INT_CLR_V | |
| SPI_IN_DONE_INT_ENA_S | |
| SPI_IN_DONE_INT_ENA_V | |
| SPI_IN_DONE_INT_RAW_S | |
| SPI_IN_DONE_INT_RAW_V | |
| SPI_IN_DONE_INT_ST_S | |
| SPI_IN_DONE_INT_ST_V | |
| SPI_IN_ERR_EOF_INT_CLR_S | |
| SPI_IN_ERR_EOF_INT_CLR_V | |
| SPI_IN_ERR_EOF_INT_ENA_S | |
| SPI_IN_ERR_EOF_INT_ENA_V | |
| SPI_IN_ERR_EOF_INT_RAW_S | |
| SPI_IN_ERR_EOF_INT_RAW_V | |
| SPI_IN_ERR_EOF_INT_ST_S | |
| SPI_IN_ERR_EOF_INT_ST_V | |
| SPI_IN_LOOP_TEST_S | |
| SPI_IN_LOOP_TEST_V | |
| SPI_IN_RST_S | |
| SPI_IN_RST_V | |
| SPI_IN_SUC_EOF_INT_CLR_S | |
| SPI_IN_SUC_EOF_INT_CLR_V | |
| SPI_IN_SUC_EOF_INT_ENA_S | |
| SPI_IN_SUC_EOF_INT_ENA_V | |
| SPI_IN_SUC_EOF_INT_RAW_S | |
| SPI_IN_SUC_EOF_INT_RAW_V | |
| SPI_IN_SUC_EOF_INT_ST_S | |
| SPI_IN_SUC_EOF_INT_ST_V | |
| SPI_IOMUX_PIN_NUM_CLK | |
| SPI_IOMUX_PIN_NUM_CS | |
| SPI_IOMUX_PIN_NUM_HD | |
| SPI_IOMUX_PIN_NUM_MISO | |
| SPI_IOMUX_PIN_NUM_MOSI | |
| SPI_IOMUX_PIN_NUM_WP | |
| SPI_MASTER_CK_SEL | |
| SPI_MASTER_CK_SEL_S | |
| SPI_MASTER_CK_SEL_V | |
| SPI_MASTER_CS_POL | |
| SPI_MASTER_CS_POL_S | |
| SPI_MASTER_CS_POL_V | |
| SPI_MASTER_FREQ_8M | |
| SPI_MASTER_FREQ_9M | |
| SPI_MASTER_FREQ_10M | |
| SPI_MASTER_FREQ_11M | |
| SPI_MASTER_FREQ_13M | |
| SPI_MASTER_FREQ_16M | |
| SPI_MASTER_FREQ_20M | |
| SPI_MASTER_FREQ_26M | |
| SPI_MASTER_FREQ_40M | |
| SPI_MASTER_FREQ_80M | |
| SPI_MAX_DMA_LEN | |
| SPI_MISO_DELAY_MODE | |
| SPI_MISO_DELAY_MODE_S | |
| SPI_MISO_DELAY_MODE_V | |
| SPI_MISO_DELAY_NUM | |
| SPI_MISO_DELAY_NUM_S | |
| SPI_MISO_DELAY_NUM_V | |
| SPI_MOSI_DELAY_MODE | |
| SPI_MOSI_DELAY_MODE_S | |
| SPI_MOSI_DELAY_MODE_V | |
| SPI_MOSI_DELAY_NUM | |
| SPI_MOSI_DELAY_NUM_S | |
| SPI_MOSI_DELAY_NUM_V | |
| SPI_OUTDSCR_BURST_EN_S | |
| SPI_OUTDSCR_BURST_EN_V | |
| SPI_OUTLINK_ADDR | |
| SPI_OUTLINK_ADDR_S | |
| SPI_OUTLINK_ADDR_V | |
| SPI_OUTLINK_DSCR_ERROR_INT_CLR_S | |
| SPI_OUTLINK_DSCR_ERROR_INT_CLR_V | |
| SPI_OUTLINK_DSCR_ERROR_INT_ENA_S | |
| SPI_OUTLINK_DSCR_ERROR_INT_ENA_V | |
| SPI_OUTLINK_DSCR_ERROR_INT_RAW_S | |
| SPI_OUTLINK_DSCR_ERROR_INT_RAW_V | |
| SPI_OUTLINK_DSCR_ERROR_INT_ST_S | |
| SPI_OUTLINK_DSCR_ERROR_INT_ST_V | |
| SPI_OUTLINK_RESTART_S | |
| SPI_OUTLINK_RESTART_V | |
| SPI_OUTLINK_START_S | |
| SPI_OUTLINK_START_V | |
| SPI_OUTLINK_STOP_S | |
| SPI_OUTLINK_STOP_V | |
| SPI_OUT_AUTO_WRBACK_S | |
| SPI_OUT_AUTO_WRBACK_V | |
| SPI_OUT_DATA_BURST_EN_S | |
| SPI_OUT_DATA_BURST_EN_V | |
| SPI_OUT_DONE_INT_CLR_S | |
| SPI_OUT_DONE_INT_CLR_V | |
| SPI_OUT_DONE_INT_ENA_S | |
| SPI_OUT_DONE_INT_ENA_V | |
| SPI_OUT_DONE_INT_RAW_S | |
| SPI_OUT_DONE_INT_RAW_V | |
| SPI_OUT_DONE_INT_ST_S | |
| SPI_OUT_DONE_INT_ST_V | |
| SPI_OUT_EOF_INT_CLR_S | |
| SPI_OUT_EOF_INT_CLR_V | |
| SPI_OUT_EOF_INT_ENA_S | |
| SPI_OUT_EOF_INT_ENA_V | |
| SPI_OUT_EOF_INT_RAW_S | |
| SPI_OUT_EOF_INT_RAW_V | |
| SPI_OUT_EOF_INT_ST_S | |
| SPI_OUT_EOF_INT_ST_V | |
| SPI_OUT_EOF_MODE_S | |
| SPI_OUT_EOF_MODE_V | |
| SPI_OUT_LOOP_TEST_S | |
| SPI_OUT_LOOP_TEST_V | |
| SPI_OUT_RST_S | |
| SPI_OUT_RST_V | |
| SPI_OUT_TOTAL_EOF_INT_CLR_S | |
| SPI_OUT_TOTAL_EOF_INT_CLR_V | |
| SPI_OUT_TOTAL_EOF_INT_ENA_S | |
| SPI_OUT_TOTAL_EOF_INT_ENA_V | |
| SPI_OUT_TOTAL_EOF_INT_RAW_S | |
| SPI_OUT_TOTAL_EOF_INT_RAW_V | |
| SPI_OUT_TOTAL_EOF_INT_ST_S | |
| SPI_OUT_TOTAL_EOF_INT_ST_V | |
| SPI_RD_BIT_ORDER_S | |
| SPI_RD_BIT_ORDER_V | |
| SPI_RD_BYTE_ORDER_S | |
| SPI_RD_BYTE_ORDER_V | |
| SPI_RESANDRES_S | |
| SPI_RESANDRES_V | |
| SPI_SETUP_TIME | |
| SPI_SETUP_TIME_S | |
| SPI_SETUP_TIME_V | |
| SPI_SIO_S | |
| SPI_SIO_V | |
| SPI_SLAVE_BIT_LSBFIRST | |
| SPI_SLAVE_MODE_S | |
| SPI_SLAVE_MODE_V | |
| SPI_SLAVE_RXBIT_LSBFIRST | |
| SPI_SLAVE_TXBIT_LSBFIRST | |
| SPI_SLV_CMD_DEFINE_S | |
| SPI_SLV_CMD_DEFINE_V | |
| SPI_SLV_LAST_COMMAND | |
| SPI_SLV_LAST_COMMAND_S | |
| SPI_SLV_LAST_COMMAND_V | |
| SPI_SLV_LAST_STATE | |
| SPI_SLV_LAST_STATE_S | |
| SPI_SLV_LAST_STATE_V | |
| SPI_SLV_RDATA_BIT | |
| SPI_SLV_RDATA_BIT_S | |
| SPI_SLV_RDATA_BIT_V | |
| SPI_SLV_RDBUF_CMD_VALUE | |
| SPI_SLV_RDBUF_CMD_VALUE_S | |
| SPI_SLV_RDBUF_CMD_VALUE_V | |
| SPI_SLV_RDBUF_DBITLEN | |
| SPI_SLV_RDBUF_DBITLEN_S | |
| SPI_SLV_RDBUF_DBITLEN_V | |
| SPI_SLV_RDBUF_DUMMY_CYCLELEN | |
| SPI_SLV_RDBUF_DUMMY_CYCLELEN_S | |
| SPI_SLV_RDBUF_DUMMY_CYCLELEN_V | |
| SPI_SLV_RDBUF_DUMMY_EN_S | |
| SPI_SLV_RDBUF_DUMMY_EN_V | |
| SPI_SLV_RDSTA_CMD_VALUE | |
| SPI_SLV_RDSTA_CMD_VALUE_S | |
| SPI_SLV_RDSTA_CMD_VALUE_V | |
| SPI_SLV_RDSTA_DUMMY_CYCLELEN | |
| SPI_SLV_RDSTA_DUMMY_CYCLELEN_S | |
| SPI_SLV_RDSTA_DUMMY_CYCLELEN_V | |
| SPI_SLV_RDSTA_DUMMY_EN_S | |
| SPI_SLV_RDSTA_DUMMY_EN_V | |
| SPI_SLV_RD_ADDR_BITLEN | |
| SPI_SLV_RD_ADDR_BITLEN_S | |
| SPI_SLV_RD_ADDR_BITLEN_V | |
| SPI_SLV_RD_BUF_DONE_S | |
| SPI_SLV_RD_BUF_DONE_V | |
| SPI_SLV_RD_STA_DONE_S | |
| SPI_SLV_RD_STA_DONE_V | |
| SPI_SLV_STATUS_BITLEN | |
| SPI_SLV_STATUS_BITLEN_S | |
| SPI_SLV_STATUS_BITLEN_V | |
| SPI_SLV_STATUS_FAST_EN_S | |
| SPI_SLV_STATUS_FAST_EN_V | |
| SPI_SLV_STATUS_READBACK_S | |
| SPI_SLV_STATUS_READBACK_V | |
| SPI_SLV_WRBUF_CMD_VALUE | |
| SPI_SLV_WRBUF_CMD_VALUE_S | |
| SPI_SLV_WRBUF_CMD_VALUE_V | |
| SPI_SLV_WRBUF_DBITLEN | |
| SPI_SLV_WRBUF_DBITLEN_S | |
| SPI_SLV_WRBUF_DBITLEN_V | |
| SPI_SLV_WRBUF_DUMMY_CYCLELEN | |
| SPI_SLV_WRBUF_DUMMY_CYCLELEN_S | |
| SPI_SLV_WRBUF_DUMMY_CYCLELEN_V | |
| SPI_SLV_WRBUF_DUMMY_EN_S | |
| SPI_SLV_WRBUF_DUMMY_EN_V | |
| SPI_SLV_WRSTA_CMD_VALUE | |
| SPI_SLV_WRSTA_CMD_VALUE_S | |
| SPI_SLV_WRSTA_CMD_VALUE_V | |
| SPI_SLV_WRSTA_DUMMY_CYCLELEN | |
| SPI_SLV_WRSTA_DUMMY_CYCLELEN_S | |
| SPI_SLV_WRSTA_DUMMY_CYCLELEN_V | |
| SPI_SLV_WRSTA_DUMMY_EN_S | |
| SPI_SLV_WRSTA_DUMMY_EN_V | |
| SPI_SLV_WR_ADDR_BITLEN | |
| SPI_SLV_WR_ADDR_BITLEN_S | |
| SPI_SLV_WR_ADDR_BITLEN_V | |
| SPI_SLV_WR_BUF_DONE_S | |
| SPI_SLV_WR_BUF_DONE_V | |
| SPI_SLV_WR_RD_BUF_EN_S | |
| SPI_SLV_WR_RD_BUF_EN_V | |
| SPI_SLV_WR_RD_STA_EN_S | |
| SPI_SLV_WR_RD_STA_EN_V | |
| SPI_SLV_WR_ST | |
| SPI_SLV_WR_STA_DONE_S | |
| SPI_SLV_WR_STA_DONE_V | |
| SPI_SLV_WR_ST_S | |
| SPI_SLV_WR_ST_V | |
| SPI_SRAM_ADDR_BITLEN | |
| SPI_SRAM_ADDR_BITLEN_S | |
| SPI_SRAM_ADDR_BITLEN_V | |
| SPI_SRAM_BYTES_LEN | |
| SPI_SRAM_BYTES_LEN_S | |
| SPI_SRAM_BYTES_LEN_V | |
| SPI_SRAM_DIO_S | |
| SPI_SRAM_DIO_V | |
| SPI_SRAM_DUMMY_CYCLELEN | |
| SPI_SRAM_DUMMY_CYCLELEN_S | |
| SPI_SRAM_DUMMY_CYCLELEN_V | |
| SPI_SRAM_QIO_S | |
| SPI_SRAM_QIO_V | |
| SPI_SRAM_RSTIO_S | |
| SPI_SRAM_RSTIO_V | |
| SPI_ST | |
| SPI_STATUS | |
| SPI_STATUS_EXT | |
| SPI_STATUS_EXT_S | |
| SPI_STATUS_EXT_V | |
| SPI_STATUS_S | |
| SPI_STATUS_V | |
| SPI_ST_S | |
| SPI_ST_V | |
| SPI_SYNC_RESET_S | |
| SPI_SYNC_RESET_V | |
| SPI_TRANS_CNT | |
| SPI_TRANS_CNT_S | |
| SPI_TRANS_CNT_V | |
| SPI_TRANS_DONE_S | |
| SPI_TRANS_DONE_V | |
| SPI_TRANS_MODE_DIO | |
| SPI_TRANS_MODE_DIOQIO_ADDR | |
| SPI_TRANS_MODE_QIO | |
| SPI_TRANS_USE_RXDATA | |
| SPI_TRANS_USE_TXDATA | |
| SPI_TRANS_VARIABLE_ADDR | |
| SPI_TRANS_VARIABLE_CMD | |
| SPI_TX_CRC_DATA | |
| SPI_TX_CRC_DATA_S | |
| SPI_TX_CRC_DATA_V | |
| SPI_TX_CRC_EN_S | |
| SPI_TX_CRC_EN_V | |
| SPI_T_ERASE_ENA_S | |
| SPI_T_ERASE_ENA_V | |
| SPI_T_ERASE_SHIFT | |
| SPI_T_ERASE_SHIFT_S | |
| SPI_T_ERASE_SHIFT_V | |
| SPI_T_ERASE_TIME | |
| SPI_T_ERASE_TIME_S | |
| SPI_T_ERASE_TIME_V | |
| SPI_T_PP_ENA_S | |
| SPI_T_PP_ENA_V | |
| SPI_T_PP_SHIFT | |
| SPI_T_PP_SHIFT_S | |
| SPI_T_PP_SHIFT_V | |
| SPI_T_PP_TIME | |
| SPI_T_PP_TIME_S | |
| SPI_T_PP_TIME_V | |
| SPI_USR_ADDR_BITLEN | |
| SPI_USR_ADDR_BITLEN_S | |
| SPI_USR_ADDR_BITLEN_V | |
| SPI_USR_ADDR_HOLD_S | |
| SPI_USR_ADDR_HOLD_V | |
| SPI_USR_ADDR_S | |
| SPI_USR_ADDR_V | |
| SPI_USR_CMD_HOLD_S | |
| SPI_USR_CMD_HOLD_V | |
| SPI_USR_COMMAND_BITLEN | |
| SPI_USR_COMMAND_BITLEN_S | |
| SPI_USR_COMMAND_BITLEN_V | |
| SPI_USR_COMMAND_S | |
| SPI_USR_COMMAND_V | |
| SPI_USR_COMMAND_VALUE | |
| SPI_USR_COMMAND_VALUE_S | |
| SPI_USR_COMMAND_VALUE_V | |
| SPI_USR_DIN_HOLD_S | |
| SPI_USR_DIN_HOLD_V | |
| SPI_USR_DOUT_HOLD_S | |
| SPI_USR_DOUT_HOLD_V | |
| SPI_USR_DUMMY_CYCLELEN | |
| SPI_USR_DUMMY_CYCLELEN_S | |
| SPI_USR_DUMMY_CYCLELEN_V | |
| SPI_USR_DUMMY_HOLD_S | |
| SPI_USR_DUMMY_HOLD_V | |
| SPI_USR_DUMMY_IDLE_S | |
| SPI_USR_DUMMY_IDLE_V | |
| SPI_USR_DUMMY_S | |
| SPI_USR_DUMMY_V | |
| SPI_USR_HOLD_POL_S | |
| SPI_USR_HOLD_POL_V | |
| SPI_USR_MISO_DBITLEN | |
| SPI_USR_MISO_DBITLEN_S | |
| SPI_USR_MISO_DBITLEN_V | |
| SPI_USR_MISO_HIGHPART_S | |
| SPI_USR_MISO_HIGHPART_V | |
| SPI_USR_MISO_S | |
| SPI_USR_MISO_V | |
| SPI_USR_MOSI_DBITLEN | |
| SPI_USR_MOSI_DBITLEN_S | |
| SPI_USR_MOSI_DBITLEN_V | |
| SPI_USR_MOSI_HIGHPART_S | |
| SPI_USR_MOSI_HIGHPART_V | |
| SPI_USR_MOSI_S | |
| SPI_USR_MOSI_V | |
| SPI_USR_PREP_HOLD_S | |
| SPI_USR_PREP_HOLD_V | |
| SPI_USR_RD_SRAM_DUMMY_S | |
| SPI_USR_RD_SRAM_DUMMY_V | |
| SPI_USR_S | |
| SPI_USR_SRAM_DIO_S | |
| SPI_USR_SRAM_DIO_V | |
| SPI_USR_SRAM_QIO_S | |
| SPI_USR_SRAM_QIO_V | |
| SPI_USR_V | |
| SPI_USR_WR_SRAM_DUMMY_S | |
| SPI_USR_WR_SRAM_DUMMY_V | |
| SPI_WAIT_FLASH_IDLE_EN_S | |
| SPI_WAIT_FLASH_IDLE_EN_V | |
| SPI_WB_MODE | |
| SPI_WB_MODE_S | |
| SPI_WB_MODE_V | |
| SPI_WP_REG_S | |
| SPI_WP_REG_V | |
| SPI_WRSR_2B_V | |
| SPI_WRSR_2B_S | |
| SPI_WR_BIT_ORDER_S | |
| SPI_WR_BIT_ORDER_V | |
| SPI_WR_BYTE_ORDER_S | |
| SPI_WR_BYTE_ORDER_V | |
| STATUS_BUSY | |
| STATUS_CANCEL | |
| STATUS_FAIL | |
| STATUS_OK | |
| STATUS_PENDING | |
| STK_INTEXC_EXTRA | |
| TICKS_PER_US_ROM | |
| TIMER_BASE_CLK | |
| TIMER_CLK_FREQ | |
| TIMG_CLK_EN_S | |
| TIMG_CLK_EN_V | |
| TIMG_LACT_ALARM_EN_S | |
| TIMG_LACT_ALARM_EN_V | |
| TIMG_LACT_ALARM_HI | |
| TIMG_LACT_ALARM_HI_S | |
| TIMG_LACT_ALARM_HI_V | |
| TIMG_LACT_ALARM_LO | |
| TIMG_LACT_ALARM_LO_S | |
| TIMG_LACT_ALARM_LO_V | |
| TIMG_LACT_AUTORELOAD_S | |
| TIMG_LACT_AUTORELOAD_V | |
| TIMG_LACT_CPST_EN_S | |
| TIMG_LACT_CPST_EN_V | |
| TIMG_LACT_DIVIDER | |
| TIMG_LACT_DIVIDER_S | |
| TIMG_LACT_DIVIDER_V | |
| TIMG_LACT_EDGE_INT_EN_S | |
| TIMG_LACT_EDGE_INT_EN_V | |
| TIMG_LACT_EN_S | |
| TIMG_LACT_EN_V | |
| TIMG_LACT_HI | |
| TIMG_LACT_HI_S | |
| TIMG_LACT_HI_V | |
| TIMG_LACT_INCREASE_S | |
| TIMG_LACT_INCREASE_V | |
| TIMG_LACT_INT_CLR_S | |
| TIMG_LACT_INT_CLR_V | |
| TIMG_LACT_INT_ENA_S | |
| TIMG_LACT_INT_ENA_V | |
| TIMG_LACT_INT_RAW_S | |
| TIMG_LACT_INT_RAW_V | |
| TIMG_LACT_INT_ST_S | |
| TIMG_LACT_INT_ST_V | |
| TIMG_LACT_LAC_EN_S | |
| TIMG_LACT_LAC_EN_V | |
| TIMG_LACT_LEVEL_INT_EN_S | |
| TIMG_LACT_LEVEL_INT_EN_V | |
| TIMG_LACT_LO | |
| TIMG_LACT_LOAD | |
| TIMG_LACT_LOAD_HI | |
| TIMG_LACT_LOAD_HI_S | |
| TIMG_LACT_LOAD_HI_V | |
| TIMG_LACT_LOAD_LO | |
| TIMG_LACT_LOAD_LO_S | |
| TIMG_LACT_LOAD_LO_V | |
| TIMG_LACT_LOAD_S | |
| TIMG_LACT_LOAD_V | |
| TIMG_LACT_LO_S | |
| TIMG_LACT_LO_V | |
| TIMG_LACT_RTC_ONLY_S | |
| TIMG_LACT_RTC_ONLY_V | |
| TIMG_LACT_RTC_STEP_LEN | |
| TIMG_LACT_RTC_STEP_LEN_S | |
| TIMG_LACT_RTC_STEP_LEN_V | |
| TIMG_LACT_UPDATE | |
| TIMG_LACT_UPDATE_S | |
| TIMG_LACT_UPDATE_V | |
| TIMG_NTIMERS_DATE | |
| TIMG_NTIMERS_DATE_S | |
| TIMG_NTIMERS_DATE_V | |
| TIMG_RTC_CALI_CLK_SEL | |
| TIMG_RTC_CALI_CLK_SEL_S | |
| TIMG_RTC_CALI_CLK_SEL_V | |
| TIMG_RTC_CALI_MAX | |
| TIMG_RTC_CALI_MAX_S | |
| TIMG_RTC_CALI_MAX_V | |
| TIMG_RTC_CALI_RDY_S | |
| TIMG_RTC_CALI_RDY_V | |
| TIMG_RTC_CALI_START_CYCLING_S | |
| TIMG_RTC_CALI_START_CYCLING_V | |
| TIMG_RTC_CALI_START_S | |
| TIMG_RTC_CALI_START_V | |
| TIMG_RTC_CALI_VALUE | |
| TIMG_RTC_CALI_VALUE_S | |
| TIMG_RTC_CALI_VALUE_V | |
| TIMG_T0_LO | |
| TIMG_T0_HI | |
| TIMG_T0_EN_V | |
| TIMG_T0_EN_S | |
| TIMG_T0_LO_V | |
| TIMG_T0_LO_S | |
| TIMG_T0_HI_V | |
| TIMG_T0_HI_S | |
| TIMG_T0_LOAD | |
| TIMG_T0_UPDATE | |
| TIMG_T0_LOAD_V | |
| TIMG_T0_LOAD_S | |
| TIMG_T0_DIVIDER | |
| TIMG_T0_LOAD_LO | |
| TIMG_T0_LOAD_HI | |
| TIMG_T0_UPDATE_V | |
| TIMG_T0_UPDATE_S | |
| TIMG_T0_ALARM_LO | |
| TIMG_T0_ALARM_HI | |
| TIMG_T0_INT_ST_V | |
| TIMG_T0_INT_ST_S | |
| TIMG_T0_DIVIDER_V | |
| TIMG_T0_DIVIDER_S | |
| TIMG_T0_LOAD_LO_V | |
| TIMG_T0_LOAD_LO_S | |
| TIMG_T0_LOAD_HI_V | |
| TIMG_T0_LOAD_HI_S | |
| TIMG_T0_INT_ENA_V | |
| TIMG_T0_INT_ENA_S | |
| TIMG_T0_INT_RAW_V | |
| TIMG_T0_INT_RAW_S | |
| TIMG_T0_INT_CLR_V | |
| TIMG_T0_INT_CLR_S | |
| TIMG_T0_INCREASE_V | |
| TIMG_T0_INCREASE_S | |
| TIMG_T0_ALARM_EN_V | |
| TIMG_T0_ALARM_EN_S | |
| TIMG_T0_ALARM_LO_V | |
| TIMG_T0_ALARM_LO_S | |
| TIMG_T0_ALARM_HI_V | |
| TIMG_T0_ALARM_HI_S | |
| TIMG_T0_AUTORELOAD_V | |
| TIMG_T0_AUTORELOAD_S | |
| TIMG_T0_EDGE_INT_EN_V | |
| TIMG_T0_EDGE_INT_EN_S | |
| TIMG_T0_LEVEL_INT_EN_V | |
| TIMG_T0_LEVEL_INT_EN_S | |
| TIMG_T1_EN_V | |
| TIMG_T1_EN_S | |
| TIMG_T1_INCREASE_V | |
| TIMG_T1_INCREASE_S | |
| TIMG_T1_AUTORELOAD_V | |
| TIMG_T1_AUTORELOAD_S | |
| TIMG_T1_DIVIDER | |
| TIMG_T1_DIVIDER_V | |
| TIMG_T1_DIVIDER_S | |
| TIMG_T1_EDGE_INT_EN_V | |
| TIMG_T1_EDGE_INT_EN_S | |
| TIMG_T1_LEVEL_INT_EN_V | |
| TIMG_T1_LEVEL_INT_EN_S | |
| TIMG_T1_ALARM_EN_V | |
| TIMG_T1_ALARM_EN_S | |
| TIMG_T1_LO | |
| TIMG_T1_LO_V | |
| TIMG_T1_LO_S | |
| TIMG_T1_HI | |
| TIMG_T1_HI_V | |
| TIMG_T1_HI_S | |
| TIMG_T1_UPDATE | |
| TIMG_T1_UPDATE_V | |
| TIMG_T1_UPDATE_S | |
| TIMG_T1_ALARM_LO | |
| TIMG_T1_ALARM_LO_V | |
| TIMG_T1_ALARM_LO_S | |
| TIMG_T1_ALARM_HI | |
| TIMG_T1_ALARM_HI_V | |
| TIMG_T1_ALARM_HI_S | |
| TIMG_T1_LOAD_LO | |
| TIMG_T1_LOAD_LO_V | |
| TIMG_T1_LOAD_LO_S | |
| TIMG_T1_LOAD_HI | |
| TIMG_T1_LOAD_HI_V | |
| TIMG_T1_LOAD_HI_S | |
| TIMG_T1_LOAD | |
| TIMG_T1_LOAD_V | |
| TIMG_T1_LOAD_S | |
| TIMG_T1_INT_ENA_V | |
| TIMG_T1_INT_ENA_S | |
| TIMG_T1_INT_RAW_V | |
| TIMG_T1_INT_RAW_S | |
| TIMG_T1_INT_ST_V | |
| TIMG_T1_INT_ST_S | |
| TIMG_T1_INT_CLR_V | |
| TIMG_T1_INT_CLR_S | |
| TIMG_WDT_CLK_PRESCALE | |
| TIMG_WDT_CLK_PRESCALE_S | |
| TIMG_WDT_CLK_PRESCALE_V | |
| TIMG_WDT_CPU_RESET_LENGTH | |
| TIMG_WDT_CPU_RESET_LENGTH_S | |
| TIMG_WDT_CPU_RESET_LENGTH_V | |
| TIMG_WDT_EDGE_INT_EN_S | |
| TIMG_WDT_EDGE_INT_EN_V | |
| TIMG_WDT_EN_S | |
| TIMG_WDT_EN_V | |
| TIMG_WDT_FEED | |
| TIMG_WDT_FEED_S | |
| TIMG_WDT_FEED_V | |
| TIMG_WDT_FLASHBOOT_MOD_EN_S | |
| TIMG_WDT_FLASHBOOT_MOD_EN_V | |
| TIMG_WDT_INT_CLR_S | |
| TIMG_WDT_INT_CLR_V | |
| TIMG_WDT_INT_ENA_S | |
| TIMG_WDT_INT_ENA_V | |
| TIMG_WDT_INT_RAW_S | |
| TIMG_WDT_INT_RAW_V | |
| TIMG_WDT_INT_ST_S | |
| TIMG_WDT_INT_ST_V | |
| TIMG_WDT_LEVEL_INT_EN_S | |
| TIMG_WDT_LEVEL_INT_EN_V | |
| TIMG_WDT_STG0 | |
| TIMG_WDT_STG0_V | |
| TIMG_WDT_STG0_S | |
| TIMG_WDT_STG0_HOLD | |
| TIMG_WDT_STG0_HOLD_V | |
| TIMG_WDT_STG0_HOLD_S | |
| TIMG_WDT_STG1 | |
| TIMG_WDT_STG1_V | |
| TIMG_WDT_STG1_S | |
| TIMG_WDT_STG1_HOLD | |
| TIMG_WDT_STG1_HOLD_V | |
| TIMG_WDT_STG1_HOLD_S | |
| TIMG_WDT_STG2 | |
| TIMG_WDT_STG2_V | |
| TIMG_WDT_STG2_S | |
| TIMG_WDT_STG2_HOLD | |
| TIMG_WDT_STG2_HOLD_V | |
| TIMG_WDT_STG2_HOLD_S | |
| TIMG_WDT_STG3 | |
| TIMG_WDT_STG3_V | |
| TIMG_WDT_STG3_S | |
| TIMG_WDT_STG3_HOLD | |
| TIMG_WDT_STG3_HOLD_V | |
| TIMG_WDT_STG3_HOLD_S | |
| TIMG_WDT_STG_SEL_INT | |
| TIMG_WDT_STG_SEL_OFF | |
| TIMG_WDT_STG_SEL_RESET_CPU | |
| TIMG_WDT_STG_SEL_RESET_SYSTEM | |
| TIMG_WDT_SYS_RESET_LENGTH | |
| TIMG_WDT_SYS_RESET_LENGTH_S | |
| TIMG_WDT_SYS_RESET_LENGTH_V | |
| TIMG_WDT_WKEY | |
| TIMG_WDT_WKEY_S | |
| TIMG_WDT_WKEY_V | |
| TIMG_WDT_WKEY_VALUE | |
| TMP_MAX | |
| TOUCH_PAD_BIT_MASK_MAX | |
| TOUCH_PAD_MEASURE_CYCLE_DEFAULT | |
| TOUCH_PAD_MEASURE_WAIT_DEFAULT | |
| TOUCH_PAD_NUM0_GPIO_NUM | |
| TOUCH_PAD_NUM1_GPIO_NUM | |
| TOUCH_PAD_NUM2_GPIO_NUM | |
| TOUCH_PAD_NUM3_GPIO_NUM | |
| TOUCH_PAD_NUM4_GPIO_NUM | |
| TOUCH_PAD_NUM5_GPIO_NUM | |
| TOUCH_PAD_NUM6_GPIO_NUM | |
| TOUCH_PAD_NUM7_GPIO_NUM | |
| TOUCH_PAD_NUM8_GPIO_NUM | |
| TOUCH_PAD_NUM9_GPIO_NUM | |
| TOUCH_PAD_SLEEP_CYCLE_DEFAULT | |
| TWO_UNIVERSAL_MAC_ADDR | |
| U0RXD_IN_IDX | |
| U0CTS_IN_IDX | |
| U0DSR_IN_IDX | |
| U0TXD_OUT_IDX | |
| U0RTS_OUT_IDX | |
| U0DTR_OUT_IDX | |
| U1RXD_IN_IDX | |
| U1TXD_OUT_IDX | |
| U1CTS_IN_IDX | |
| U1RTS_OUT_IDX | |
| U2RXD_IN_IDX | |
| U2TXD_OUT_IDX | |
| U2CTS_IN_IDX | |
| U2RTS_OUT_IDX | |
| UART_ACTIVE_THRESHOLD | |
| UART_ACTIVE_THRESHOLD_S | |
| UART_ACTIVE_THRESHOLD_V | |
| UART_AT_CMD_CHAR | |
| UART_AT_CMD_CHAR_DET_INT_CLR_S | |
| UART_AT_CMD_CHAR_DET_INT_CLR_V | |
| UART_AT_CMD_CHAR_DET_INT_ENA_S | |
| UART_AT_CMD_CHAR_DET_INT_ENA_V | |
| UART_AT_CMD_CHAR_DET_INT_RAW_S | |
| UART_AT_CMD_CHAR_DET_INT_RAW_V | |
| UART_AT_CMD_CHAR_DET_INT_ST_S | |
| UART_AT_CMD_CHAR_DET_INT_ST_V | |
| UART_AT_CMD_CHAR_S | |
| UART_AT_CMD_CHAR_V | |
| UART_AUTOBAUD_EN_S | |
| UART_AUTOBAUD_EN_V | |
| UART_BITRATE_MAX | |
| UART_BIT_NUM | |
| UART_BIT_NUM_S | |
| UART_BIT_NUM_V | |
| UART_BRK_DET_INT_CLR_S | |
| UART_BRK_DET_INT_CLR_V | |
| UART_BRK_DET_INT_ENA_S | |
| UART_BRK_DET_INT_ENA_V | |
| UART_BRK_DET_INT_RAW_S | |
| UART_BRK_DET_INT_RAW_V | |
| UART_BRK_DET_INT_ST_S | |
| UART_BRK_DET_INT_ST_V | |
| UART_CHAR_NUM | |
| UART_CHAR_NUM_S | |
| UART_CHAR_NUM_V | |
| UART_CLKDIV | |
| UART_CLKDIV_FRAG | |
| UART_CLKDIV_FRAG_S | |
| UART_CLKDIV_FRAG_V | |
| UART_CLKDIV_S | |
| UART_CLKDIV_V | |
| UART_CLK_EN_S | |
| UART_CLK_EN_V | |
| UART_CLK_FREQ | |
| UART_CTSN_S | |
| UART_CTSN_V | |
| UART_CTS_CHG_INT_CLR_S | |
| UART_CTS_CHG_INT_CLR_V | |
| UART_CTS_CHG_INT_ENA_S | |
| UART_CTS_CHG_INT_ENA_V | |
| UART_CTS_CHG_INT_RAW_S | |
| UART_CTS_CHG_INT_RAW_V | |
| UART_CTS_CHG_INT_ST_S | |
| UART_CTS_CHG_INT_ST_V | |
| UART_CTS_INV_S | |
| UART_CTS_INV_V | |
| UART_DATE | |
| UART_DATE_S | |
| UART_DATE_V | |
| UART_DL0_EN_V | |
| UART_DL0_EN_S | |
| UART_DL1_EN_V | |
| UART_DL1_EN_S | |
| UART_DSRN_S | |
| UART_DSRN_V | |
| UART_DSR_CHG_INT_CLR_S | |
| UART_DSR_CHG_INT_CLR_V | |
| UART_DSR_CHG_INT_ENA_S | |
| UART_DSR_CHG_INT_ENA_V | |
| UART_DSR_CHG_INT_RAW_S | |
| UART_DSR_CHG_INT_RAW_V | |
| UART_DSR_CHG_INT_ST_S | |
| UART_DSR_CHG_INT_ST_V | |
| UART_DSR_INV_S | |
| UART_DSR_INV_V | |
| UART_DTRN_S | |
| UART_DTRN_V | |
| UART_DTR_INV_S | |
| UART_DTR_INV_V | |
| UART_ERR_WR_MASK_S | |
| UART_ERR_WR_MASK_V | |
| UART_FIFO_LEN | |
| UART_FORCE_XOFF_S | |
| UART_FORCE_XOFF_V | |
| UART_FORCE_XON_S | |
| UART_FORCE_XON_V | |
| UART_FRM_ERR_INT_CLR_S | |
| UART_FRM_ERR_INT_CLR_V | |
| UART_FRM_ERR_INT_ENA_S | |
| UART_FRM_ERR_INT_ENA_V | |
| UART_FRM_ERR_INT_RAW_S | |
| UART_FRM_ERR_INT_RAW_V | |
| UART_FRM_ERR_INT_ST_S | |
| UART_FRM_ERR_INT_ST_V | |
| UART_GLITCH_DET_INT_CLR_S | |
| UART_GLITCH_DET_INT_CLR_V | |
| UART_GLITCH_DET_INT_ENA_S | |
| UART_GLITCH_DET_INT_ENA_V | |
| UART_GLITCH_DET_INT_RAW_S | |
| UART_GLITCH_DET_INT_RAW_V | |
| UART_GLITCH_DET_INT_ST_S | |
| UART_GLITCH_DET_INT_ST_V | |
| UART_GLITCH_FILT | |
| UART_GLITCH_FILT_S | |
| UART_GLITCH_FILT_V | |
| UART_HIGHPULSE_MIN_CNT | |
| UART_HIGHPULSE_MIN_CNT_S | |
| UART_HIGHPULSE_MIN_CNT_V | |
| UART_ID | |
| UART_ID_S | |
| UART_ID_V | |
| UART_INTR_MASK | |
| UART_INVERSE_DISABLE | |
| UART_IRDA_DPLX_S | |
| UART_IRDA_DPLX_V | |
| UART_IRDA_EN_S | |
| UART_IRDA_EN_V | |
| UART_IRDA_RX_INV_S | |
| UART_IRDA_RX_INV_V | |
| UART_IRDA_TX_EN_S | |
| UART_IRDA_TX_EN_V | |
| UART_IRDA_TX_INV_S | |
| UART_IRDA_TX_INV_V | |
| UART_IRDA_WCTL_S | |
| UART_IRDA_WCTL_V | |
| UART_LINE_INV_MASK | |
| UART_LOOPBACK_S | |
| UART_LOOPBACK_V | |
| UART_LOWPULSE_MIN_CNT | |
| UART_LOWPULSE_MIN_CNT_S | |
| UART_LOWPULSE_MIN_CNT_V | |
| UART_MEM_PD_S | |
| UART_MEM_PD_V | |
| UART_MEM_RX_RD_ADDR | |
| UART_MEM_RX_RD_ADDR_S | |
| UART_MEM_RX_RD_ADDR_V | |
| UART_MEM_RX_STATUS | |
| UART_MEM_RX_STATUS_S | |
| UART_MEM_RX_STATUS_V | |
| UART_MEM_RX_WR_ADDR | |
| UART_MEM_RX_WR_ADDR_S | |
| UART_MEM_RX_WR_ADDR_V | |
| UART_MEM_TX_STATUS | |
| UART_MEM_TX_STATUS_S | |
| UART_MEM_TX_STATUS_V | |
| UART_NEGEDGE_MIN_CNT | |
| UART_NEGEDGE_MIN_CNT_S | |
| UART_NEGEDGE_MIN_CNT_V | |
| UART_NUM_0_TXD_DIRECT_GPIO_NUM | |
| UART_NUM_0_RXD_DIRECT_GPIO_NUM | |
| UART_NUM_0_CTS_DIRECT_GPIO_NUM | |
| UART_NUM_0_RTS_DIRECT_GPIO_NUM | |
| UART_NUM_1_TXD_DIRECT_GPIO_NUM | |
| UART_NUM_1_RXD_DIRECT_GPIO_NUM | |
| UART_NUM_1_CTS_DIRECT_GPIO_NUM | |
| UART_NUM_1_RTS_DIRECT_GPIO_NUM | |
| UART_NUM_2_TXD_DIRECT_GPIO_NUM | |
| UART_NUM_2_RXD_DIRECT_GPIO_NUM | |
| UART_NUM_2_CTS_DIRECT_GPIO_NUM | |
| UART_NUM_2_RTS_DIRECT_GPIO_NUM | |
| UART_PARITY_EN_S | |
| UART_PARITY_EN_V | |
| UART_PARITY_ERR_INT_CLR_S | |
| UART_PARITY_ERR_INT_CLR_V | |
| UART_PARITY_ERR_INT_ENA_S | |
| UART_PARITY_ERR_INT_ENA_V | |
| UART_PARITY_ERR_INT_RAW_S | |
| UART_PARITY_ERR_INT_RAW_V | |
| UART_PARITY_ERR_INT_ST_S | |
| UART_PARITY_ERR_INT_ST_V | |
| UART_PARITY_S | |
| UART_PARITY_V | |
| UART_PIN_NO_CHANGE | |
| UART_POSEDGE_MIN_CNT | |
| UART_POSEDGE_MIN_CNT_S | |
| UART_POSEDGE_MIN_CNT_V | |
| UART_POST_IDLE_NUM | |
| UART_POST_IDLE_NUM_S | |
| UART_POST_IDLE_NUM_V | |
| UART_PRE_IDLE_NUM | |
| UART_PRE_IDLE_NUM_S | |
| UART_PRE_IDLE_NUM_V | |
| UART_RS485_CLASH_INT_RAW_V | |
| UART_RS485_CLASH_INT_RAW_S | |
| UART_RS485_FRM_ERR_INT_RAW_V | |
| UART_RS485_FRM_ERR_INT_RAW_S | |
| UART_RS485_PARITY_ERR_INT_RAW_V | |
| UART_RS485_PARITY_ERR_INT_RAW_S | |
| UART_RS485_CLASH_INT_ST_V | |
| UART_RS485_CLASH_INT_ST_S | |
| UART_RS485_FRM_ERR_INT_ST_V | |
| UART_RS485_FRM_ERR_INT_ST_S | |
| UART_RS485_PARITY_ERR_INT_ST_V | |
| UART_RS485_PARITY_ERR_INT_ST_S | |
| UART_RS485_CLASH_INT_ENA_V | |
| UART_RS485_CLASH_INT_ENA_S | |
| UART_RS485_FRM_ERR_INT_ENA_V | |
| UART_RS485_FRM_ERR_INT_ENA_S | |
| UART_RS485_PARITY_ERR_INT_ENA_V | |
| UART_RS485_PARITY_ERR_INT_ENA_S | |
| UART_RS485_CLASH_INT_CLR_V | |
| UART_RS485_CLASH_INT_CLR_S | |
| UART_RS485_FRM_ERR_INT_CLR_V | |
| UART_RS485_FRM_ERR_INT_CLR_S | |
| UART_RS485_PARITY_ERR_INT_CLR_V | |
| UART_RS485_PARITY_ERR_INT_CLR_S | |
| UART_RS485_TX_DLY_NUM | |
| UART_RS485_TX_DLY_NUM_V | |
| UART_RS485_TX_DLY_NUM_S | |
| UART_RS485_RX_DLY_NUM_V | |
| UART_RS485_RX_DLY_NUM_S | |
| UART_RS485RXBY_TX_EN_V | |
| UART_RS485RXBY_TX_EN_S | |
| UART_RS485TX_RX_EN_V | |
| UART_RS485TX_RX_EN_S | |
| UART_RS485_EN_V | |
| UART_RS485_EN_S | |
| UART_RTSN_S | |
| UART_RTSN_V | |
| UART_RTS_INV_S | |
| UART_RTS_INV_V | |
| UART_RXD_EDGE_CNT | |
| UART_RXD_EDGE_CNT_S | |
| UART_RXD_EDGE_CNT_V | |
| UART_RXD_INV_S | |
| UART_RXD_INV_V | |
| UART_RXD_S | |
| UART_RXD_V | |
| UART_RXFIFO_CNT | |
| UART_RXFIFO_CNT_S | |
| UART_RXFIFO_CNT_V | |
| UART_RXFIFO_FULL_INT_CLR_S | |
| UART_RXFIFO_FULL_INT_CLR_V | |
| UART_RXFIFO_FULL_INT_ENA_S | |
| UART_RXFIFO_FULL_INT_ENA_V | |
| UART_RXFIFO_FULL_INT_RAW_S | |
| UART_RXFIFO_FULL_INT_RAW_V | |
| UART_RXFIFO_FULL_INT_ST_S | |
| UART_RXFIFO_FULL_INT_ST_V | |
| UART_RXFIFO_FULL_THRHD | |
| UART_RXFIFO_FULL_THRHD_S | |
| UART_RXFIFO_FULL_THRHD_V | |
| UART_RXFIFO_OVF_INT_CLR_S | |
| UART_RXFIFO_OVF_INT_CLR_V | |
| UART_RXFIFO_OVF_INT_ENA_S | |
| UART_RXFIFO_OVF_INT_ENA_V | |
| UART_RXFIFO_OVF_INT_RAW_S | |
| UART_RXFIFO_OVF_INT_RAW_V | |
| UART_RXFIFO_OVF_INT_ST_S | |
| UART_RXFIFO_OVF_INT_ST_V | |
| UART_RXFIFO_RD_BYTE | |
| UART_RXFIFO_RD_BYTE_S | |
| UART_RXFIFO_RD_BYTE_V | |
| UART_RXFIFO_RST_S | |
| UART_RXFIFO_RST_V | |
| UART_RXFIFO_TOUT_INT_CLR_S | |
| UART_RXFIFO_TOUT_INT_CLR_V | |
| UART_RXFIFO_TOUT_INT_ENA_S | |
| UART_RXFIFO_TOUT_INT_ENA_V | |
| UART_RXFIFO_TOUT_INT_RAW_S | |
| UART_RXFIFO_TOUT_INT_RAW_V | |
| UART_RXFIFO_TOUT_INT_ST_S | |
| UART_RXFIFO_TOUT_INT_ST_V | |
| UART_RX_FLOW_EN_S | |
| UART_RX_FLOW_EN_V | |
| UART_RX_FLOW_THRHD | |
| UART_RX_FLOW_THRHD_H3 | |
| UART_RX_FLOW_THRHD_H3_V | |
| UART_RX_FLOW_THRHD_H3_S | |
| UART_RX_FLOW_THRHD_S | |
| UART_RX_FLOW_THRHD_V | |
| UART_RX_GAP_TOUT | |
| UART_RX_GAP_TOUT_S | |
| UART_RX_GAP_TOUT_V | |
| UART_RX_IDLE_THRHD | |
| UART_RX_IDLE_THRHD_S | |
| UART_RX_IDLE_THRHD_V | |
| UART_RX_MEM_CNT | |
| UART_RX_MEM_CNT_S | |
| UART_RX_MEM_CNT_V | |
| UART_RX_MEM_FULL_THRHD | |
| UART_RX_MEM_FULL_THRHD_S | |
| UART_RX_MEM_FULL_THRHD_V | |
| UART_RX_SIZE | |
| UART_RX_SIZE_S | |
| UART_RX_SIZE_V | |
| UART_RX_TOUT_EN_S | |
| UART_RX_TOUT_EN_V | |
| UART_RX_TOUT_THRHD | |
| UART_RX_TOUT_THRHD_H3 | |
| UART_RX_TOUT_THRHD_H3_V | |
| UART_RX_TOUT_THRHD_H3_S | |
| UART_RX_TOUT_THRHD_S | |
| UART_RX_TOUT_THRHD_V | |
| UART_SEND_XOFF_S | |
| UART_SEND_XOFF_V | |
| UART_SEND_XON_S | |
| UART_SEND_XON_V | |
| UART_STOP_BIT_NUM | |
| UART_STOP_BIT_NUM_S | |
| UART_STOP_BIT_NUM_V | |
| UART_ST_URX_OUT | |
| UART_ST_URX_OUT_S | |
| UART_ST_URX_OUT_V | |
| UART_ST_UTX_OUT | |
| UART_ST_UTX_OUT_S | |
| UART_ST_UTX_OUT_V | |
| UART_SW_DTR_S | |
| UART_SW_DTR_V | |
| UART_SW_FLOW_CON_EN_S | |
| UART_SW_FLOW_CON_EN_V | |
| UART_SW_RTS_S | |
| UART_SW_RTS_V | |
| UART_SW_XOFF_INT_CLR_S | |
| UART_SW_XOFF_INT_CLR_V | |
| UART_SW_XOFF_INT_ENA_S | |
| UART_SW_XOFF_INT_ENA_V | |
| UART_SW_XOFF_INT_RAW_S | |
| UART_SW_XOFF_INT_RAW_V | |
| UART_SW_XOFF_INT_ST_S | |
| UART_SW_XOFF_INT_ST_V | |
| UART_SW_XON_INT_CLR_S | |
| UART_SW_XON_INT_CLR_V | |
| UART_SW_XON_INT_ENA_S | |
| UART_SW_XON_INT_ENA_V | |
| UART_SW_XON_INT_RAW_S | |
| UART_SW_XON_INT_RAW_V | |
| UART_SW_XON_INT_ST_S | |
| UART_SW_XON_INT_ST_V | |
| UART_TICK_REF_ALWAYS_ON_S | |
| UART_TICK_REF_ALWAYS_ON_V | |
| UART_TXD_BRK_S | |
| UART_TXD_BRK_V | |
| UART_TXD_INV_S | |
| UART_TXD_INV_V | |
| UART_TXD_S | |
| UART_TXD_V | |
| UART_TXFIFO_CNT | |
| UART_TXFIFO_CNT_S | |
| UART_TXFIFO_CNT_V | |
| UART_TXFIFO_EMPTY_INT_CLR_S | |
| UART_TXFIFO_EMPTY_INT_CLR_V | |
| UART_TXFIFO_EMPTY_INT_ENA_S | |
| UART_TXFIFO_EMPTY_INT_ENA_V | |
| UART_TXFIFO_EMPTY_INT_RAW_S | |
| UART_TXFIFO_EMPTY_INT_RAW_V | |
| UART_TXFIFO_EMPTY_INT_ST_S | |
| UART_TXFIFO_EMPTY_INT_ST_V | |
| UART_TXFIFO_EMPTY_THRHD | |
| UART_TXFIFO_EMPTY_THRHD_S | |
| UART_TXFIFO_EMPTY_THRHD_V | |
| UART_TXFIFO_RST_S | |
| UART_TXFIFO_RST_V | |
| UART_TX_BRK_DONE_INT_CLR_S | |
| UART_TX_BRK_DONE_INT_CLR_V | |
| UART_TX_BRK_DONE_INT_ENA_S | |
| UART_TX_BRK_DONE_INT_ENA_V | |
| UART_TX_BRK_DONE_INT_RAW_S | |
| UART_TX_BRK_DONE_INT_RAW_V | |
| UART_TX_BRK_DONE_INT_ST_S | |
| UART_TX_BRK_DONE_INT_ST_V | |
| UART_TX_BRK_IDLE_DONE_INT_CLR_S | |
| UART_TX_BRK_IDLE_DONE_INT_CLR_V | |
| UART_TX_BRK_IDLE_DONE_INT_ENA_S | |
| UART_TX_BRK_IDLE_DONE_INT_ENA_V | |
| UART_TX_BRK_IDLE_DONE_INT_RAW_S | |
| UART_TX_BRK_IDLE_DONE_INT_RAW_V | |
| UART_TX_BRK_IDLE_DONE_INT_ST_S | |
| UART_TX_BRK_IDLE_DONE_INT_ST_V | |
| UART_TX_BRK_NUM | |
| UART_TX_BRK_NUM_S | |
| UART_TX_BRK_NUM_V | |
| UART_TX_DONE_INT_CLR_S | |
| UART_TX_DONE_INT_CLR_V | |
| UART_TX_DONE_INT_ENA_S | |
| UART_TX_DONE_INT_ENA_V | |
| UART_TX_DONE_INT_RAW_S | |
| UART_TX_DONE_INT_RAW_V | |
| UART_TX_DONE_INT_ST_S | |
| UART_TX_DONE_INT_ST_V | |
| UART_TX_FLOW_EN_S | |
| UART_TX_FLOW_EN_V | |
| UART_TX_IDLE_NUM | |
| UART_TX_IDLE_NUM_S | |
| UART_TX_IDLE_NUM_V | |
| UART_TX_MEM_CNT | |
| UART_TX_MEM_CNT_S | |
| UART_TX_MEM_CNT_V | |
| UART_TX_MEM_EMPTY_THRHD | |
| UART_TX_MEM_EMPTY_THRHD_S | |
| UART_TX_MEM_EMPTY_THRHD_V | |
| UART_TX_SIZE | |
| UART_TX_SIZE_S | |
| UART_TX_SIZE_V | |
| UART_XOFF_CHAR | |
| UART_XOFF_CHAR_S | |
| UART_XOFF_CHAR_V | |
| UART_XOFF_THRESHOLD | |
| UART_XOFF_THRESHOLD_H2 | |
| UART_XOFF_THRESHOLD_H2_V | |
| UART_XOFF_THRESHOLD_H2_S | |
| UART_XOFF_THRESHOLD_S | |
| UART_XOFF_THRESHOLD_V | |
| UART_XONOFF_DEL_S | |
| UART_XONOFF_DEL_V | |
| UART_XON_CHAR | |
| UART_XON_CHAR_S | |
| UART_XON_CHAR_V | |
| UART_XON_THRESHOLD | |
| UART_XON_THRESHOLD_H2 | |
| UART_XON_THRESHOLD_H2_V | |
| UART_XON_THRESHOLD_H2_S | |
| UART_XON_THRESHOLD_S | |
| UART_XON_THRESHOLD_V | |
| UNIVERSAL_MAC_ADDR_NUM | |
| VECBASE | |
| VSPICLK_IN_IDX | |
| VSPICLK_OUT_IDX | |
| VSPICS0_IN_IDX | |
| VSPICS0_OUT_IDX | |
| VSPICS1_IN_IDX | |
| VSPICS1_OUT_IDX | |
| VSPICS2_IN_IDX | |
| VSPICS2_OUT_IDX | |
| VSPID4_IN_IDX | |
| VSPID4_OUT_IDX | |
| VSPID5_IN_IDX | |
| VSPID5_OUT_IDX | |
| VSPID6_IN_IDX | |
| VSPID6_OUT_IDX | |
| VSPID7_IN_IDX | |
| VSPID7_OUT_IDX | |
| VSPID_IN_IDX | |
| VSPID_OUT_IDX | |
| VSPIHD_IN_IDX | |
| VSPIHD_OUT_IDX | |
| VSPIQ_IN_IDX | |
| VSPIQ_OUT_IDX | |
| VSPIWP_IN_IDX | |
| VSPIWP_OUT_IDX | |
| VSPI_IOMUX_PIN_NUM_CLK | |
| VSPI_IOMUX_PIN_NUM_CS | |
| VSPI_IOMUX_PIN_NUM_HD | |
| VSPI_IOMUX_PIN_NUM_MISO | |
| VSPI_IOMUX_PIN_NUM_MOSI | |
| VSPI_IOMUX_PIN_NUM_WP | |
| WDT_CLK_FREQ | |
| WINDOWBASE | |
| WINDOWSTART | |
| WINT_MIN | |
| XCHAL_ADDRESS_MISALIGNED | |
| XCHAL_ALIGN_MAX | |
| XCHAL_BUILD_UNIQUE_ID | |
| XCHAL_CACHE_LINESIZE_MAX | |
| XCHAL_CACHE_LINEWIDTH_MAX | |
| XCHAL_CACHE_MEMCTL_DEFAULT | |
| XCHAL_CACHE_PREFCTL_DEFAULT | |
| XCHAL_CACHE_SETSIZE_MAX | |
| XCHAL_CACHE_SETWIDTH_MAX | |
| XCHAL_CA_BITS | |
| XCHAL_CA_BYPASS | |
| XCHAL_CA_BYPASSBUF | |
| XCHAL_CA_BYPASS_RW | |
| XCHAL_CA_ILLEGAL | |
| XCHAL_CA_ISOLATE | |
| XCHAL_CA_R | |
| XCHAL_CA_RW | |
| XCHAL_CA_RWX | |
| XCHAL_CA_RX | |
| XCHAL_CA_WRITEBACK | |
| XCHAL_CA_WRITEBACK_NOALLOC | |
| XCHAL_CA_WRITEBACK_NOALLOC_RW | |
| XCHAL_CA_WRITEBACK_RW | |
| XCHAL_CA_WRITETHRU | |
| XCHAL_CA_WRITETHRU_RW | |
| XCHAL_CLOCK_GATING_FUNCUNIT | |
| XCHAL_CLOCK_GATING_GLOBAL | |
| XCHAL_CORE_ID | |
| XCHAL_CP0_NAME | |
| XCHAL_CP0_SA_NUM | |
| XCHAL_CP0_SA_SIZE | |
| XCHAL_CP0_SA_ALIGN | |
| XCHAL_CP1_SA_SIZE | |
| XCHAL_CP1_SA_ALIGN | |
| XCHAL_CP1_SA_NUM | |
| XCHAL_CP1_NAME | |
| XCHAL_CP1_SA_CONTENTS_LIBDB_NUM | |
| XCHAL_CP2_SA_SIZE | |
| XCHAL_CP2_SA_ALIGN | |
| XCHAL_CP2_SA_NUM | |
| XCHAL_CP2_NAME | |
| XCHAL_CP2_SA_CONTENTS_LIBDB_NUM | |
| XCHAL_CP3_SA_SIZE | |
| XCHAL_CP3_SA_ALIGN | |
| XCHAL_CP3_SA_NUM | |
| XCHAL_CP3_NAME | |
| XCHAL_CP3_SA_CONTENTS_LIBDB_NUM | |
| XCHAL_CP4_SA_SIZE | |
| XCHAL_CP4_SA_ALIGN | |
| XCHAL_CP4_SA_NUM | |
| XCHAL_CP4_NAME | |
| XCHAL_CP4_SA_CONTENTS_LIBDB_NUM | |
| XCHAL_CP5_SA_SIZE | |
| XCHAL_CP5_SA_ALIGN | |
| XCHAL_CP5_SA_NUM | |
| XCHAL_CP5_NAME | |
| XCHAL_CP5_SA_CONTENTS_LIBDB_NUM | |
| XCHAL_CP6_SA_SIZE | |
| XCHAL_CP6_SA_ALIGN | |
| XCHAL_CP6_SA_NUM | |
| XCHAL_CP6_NAME | |
| XCHAL_CP6_SA_CONTENTS_LIBDB_NUM | |
| XCHAL_CP7_SA_SIZE | |
| XCHAL_CP7_SA_ALIGN | |
| XCHAL_CP7_SA_NUM | |
| XCHAL_CP7_NAME | |
| XCHAL_CP7_SA_CONTENTS_LIBDB_NUM | |
| XCHAL_CPEXTRA_SA_ALIGN | |
| XCHAL_CPEXTRA_SA_SIZE | |
| XCHAL_CPEXTRA_SA_SIZE_TOR2 | |
| XCHAL_CP_ID_FPU | |
| XCHAL_CP_MASK | |
| XCHAL_CP_MAX | |
| XCHAL_CP_MAXCFG | |
| XCHAL_CP_NUM | |
| XCHAL_CP_PORT_MASK | |
| XCHAL_DATARAM0_SIZE | |
| XCHAL_DATARAM0_VADDR | |
| XCHAL_DATARAM0_PADDR | |
| XCHAL_DATARAM0_BANKS | |
| XCHAL_DATARAM0_ECC_PARITY | |
| XCHAL_DATARAM1_VADDR | |
| XCHAL_DATARAM1_PADDR | |
| XCHAL_DATARAM1_SIZE | |
| XCHAL_DATARAM1_ECC_PARITY | |
| XCHAL_DATARAM1_BANKS | |
| XCHAL_DATAROM0_SIZE | |
| XCHAL_DATAROM0_VADDR | |
| XCHAL_DATAROM0_PADDR | |
| XCHAL_DATAROM0_BANKS | |
| XCHAL_DATAROM0_ECC_PARITY | |
| XCHAL_DATA_PIPE_DELAY | |
| XCHAL_DATA_WIDTH | |
| XCHAL_DBREAKC_LOADBREAK_BITS | |
| XCHAL_DBREAKC_LOADBREAK_MASK | |
| XCHAL_DBREAKC_LOADBREAK_NUM | |
| XCHAL_DBREAKC_LOADBREAK_SHIFT | |
| XCHAL_DBREAKC_MASK_BITS | |
| XCHAL_DBREAKC_MASK_MASK | |
| XCHAL_DBREAKC_MASK_NUM | |
| XCHAL_DBREAKC_MASK_SHIFT | |
| XCHAL_DBREAKC_STOREBREAK_BITS | |
| XCHAL_DBREAKC_STOREBREAK_MASK | |
| XCHAL_DBREAKC_STOREBREAK_NUM | |
| XCHAL_DBREAKC_STOREBREAK_SHIFT | |
| XCHAL_DBREAKC_VALIDMASK | |
| XCHAL_DCACHE_ACCESS_SIZE | |
| XCHAL_DCACHE_BANKS | |
| XCHAL_DCACHE_ECC_PARITY | |
| XCHAL_DCACHE_IS_COHERENT | |
| XCHAL_DCACHE_IS_WRITEBACK | |
| XCHAL_DCACHE_LINESIZE | |
| XCHAL_DCACHE_LINEWIDTH | |
| XCHAL_DCACHE_LINE_LOCKABLE | |
| XCHAL_DCACHE_SETSIZE | |
| XCHAL_DCACHE_SETWIDTH | |
| XCHAL_DCACHE_SIZE | |
| XCHAL_DCACHE_TAG_D | |
| XCHAL_DCACHE_TAG_D_SHIFT | |
| XCHAL_DCACHE_TAG_F | |
| XCHAL_DCACHE_TAG_F_SHIFT | |
| XCHAL_DCACHE_TAG_L | |
| XCHAL_DCACHE_TAG_L_SHIFT | |
| XCHAL_DCACHE_TAG_V | |
| XCHAL_DCACHE_TAG_V_SHIFT | |
| XCHAL_DCACHE_WAYS | |
| XCHAL_DEBUGCAUSE_BREAKN_BITS | |
| XCHAL_DEBUGCAUSE_BREAKN_MASK | |
| XCHAL_DEBUGCAUSE_BREAKN_NUM | |
| XCHAL_DEBUGCAUSE_BREAKN_SHIFT | |
| XCHAL_DEBUGCAUSE_BREAK_BITS | |
| XCHAL_DEBUGCAUSE_BREAK_MASK | |
| XCHAL_DEBUGCAUSE_BREAK_NUM | |
| XCHAL_DEBUGCAUSE_BREAK_SHIFT | |
| XCHAL_DEBUGCAUSE_DBREAK_BITS | |
| XCHAL_DEBUGCAUSE_DBREAK_MASK | |
| XCHAL_DEBUGCAUSE_DBREAK_NUM | |
| XCHAL_DEBUGCAUSE_DBREAK_SHIFT | |
| XCHAL_DEBUGCAUSE_DEBUGINT_BITS | |
| XCHAL_DEBUGCAUSE_DEBUGINT_MASK | |
| XCHAL_DEBUGCAUSE_DEBUGINT_NUM | |
| XCHAL_DEBUGCAUSE_DEBUGINT_SHIFT | |
| XCHAL_DEBUGCAUSE_IBREAK_BITS | |
| XCHAL_DEBUGCAUSE_IBREAK_MASK | |
| XCHAL_DEBUGCAUSE_IBREAK_NUM | |
| XCHAL_DEBUGCAUSE_IBREAK_SHIFT | |
| XCHAL_DEBUGCAUSE_ICOUNT_BITS | |
| XCHAL_DEBUGCAUSE_ICOUNT_MASK | |
| XCHAL_DEBUGCAUSE_ICOUNT_NUM | |
| XCHAL_DEBUGCAUSE_ICOUNT_SHIFT | |
| XCHAL_DEBUGCAUSE_VALIDMASK | |
| XCHAL_DEBUGLEVEL | |
| XCHAL_DEBUG_VECOFS | |
| XCHAL_DEBUG_VECTOR_PADDR | |
| XCHAL_DEBUG_VECTOR_VADDR | |
| XCHAL_DOUBLEEXC_VECOFS | |
| XCHAL_DOUBLEEXC_VECTOR_PADDR | |
| XCHAL_DOUBLEEXC_VECTOR_VADDR | |
| XCHAL_DRAM0_SIZE | |
| XCHAL_DRAM0_VADDR | |
| XCHAL_DRAM0_PADDR | |
| XCHAL_DRAM1_VADDR | |
| XCHAL_DRAM1_PADDR | |
| XCHAL_DRAM1_SIZE | |
| XCHAL_DROM0_SIZE | |
| XCHAL_DROM0_VADDR | |
| XCHAL_DROM0_PADDR | |
| XCHAL_DTLB_ARF_SETS | |
| XCHAL_DTLB_ARF_WAYS | |
| XCHAL_DTLB_MINWIRED_SETS | |
| XCHAL_DTLB_SET0_WAY | |
| XCHAL_DTLB_SET0_ARF | |
| XCHAL_DTLB_SET0_WAYS | |
| XCHAL_DTLB_SET0_ENTRIES | |
| XCHAL_DTLB_SET0_CA_RESET | |
| XCHAL_DTLB_SET0_PAGESIZES | |
| XCHAL_DTLB_SET0_VPN_RESET | |
| XCHAL_DTLB_SET0_PPN_RESET | |
| XCHAL_DTLB_SET0_ASID_RESET | |
| XCHAL_DTLB_SET0_PAGESZ_BITS | |
| XCHAL_DTLB_SET0_CA_CONSTMASK | |
| XCHAL_DTLB_SET0_VPN_CONSTMASK | |
| XCHAL_DTLB_SET0_PPN_CONSTMASK | |
| XCHAL_DTLB_SET0_ASID_CONSTMASK | |
| XCHAL_DTLB_SET0_E0_CA_RESET | |
| XCHAL_DTLB_SET0_E0_VPN_CONST | |
| XCHAL_DTLB_SET0_E0_PPN_CONST | |
| XCHAL_DTLB_SET0_E1_VPN_CONST | |
| XCHAL_DTLB_SET0_E1_PPN_CONST | |
| XCHAL_DTLB_SET0_E1_CA_RESET | |
| XCHAL_DTLB_SET0_E2_VPN_CONST | |
| XCHAL_DTLB_SET0_E2_PPN_CONST | |
| XCHAL_DTLB_SET0_E2_CA_RESET | |
| XCHAL_DTLB_SET0_E3_VPN_CONST | |
| XCHAL_DTLB_SET0_E3_PPN_CONST | |
| XCHAL_DTLB_SET0_E3_CA_RESET | |
| XCHAL_DTLB_SET0_E4_VPN_CONST | |
| XCHAL_DTLB_SET0_E4_PPN_CONST | |
| XCHAL_DTLB_SET0_E4_CA_RESET | |
| XCHAL_DTLB_SET0_E5_VPN_CONST | |
| XCHAL_DTLB_SET0_E5_PPN_CONST | |
| XCHAL_DTLB_SET0_E5_CA_RESET | |
| XCHAL_DTLB_SET0_E6_VPN_CONST | |
| XCHAL_DTLB_SET0_E6_PPN_CONST | |
| XCHAL_DTLB_SET0_E6_CA_RESET | |
| XCHAL_DTLB_SET0_E7_VPN_CONST | |
| XCHAL_DTLB_SET0_E7_PPN_CONST | |
| XCHAL_DTLB_SET0_E7_CA_RESET | |
| XCHAL_DTLB_SET0_ENTRIES_LOG2 | |
| XCHAL_DTLB_SET0_PAGESZ_LOG2_MIN | |
| XCHAL_DTLB_SET0_PAGESZ_LOG2_MAX | |
| XCHAL_DTLB_SET0_PAGESZ_LOG2_LIST | |
| XCHAL_DTLB_SETS | |
| XCHAL_DTLB_WAY0_SET | |
| XCHAL_DTLB_WAYS | |
| XCHAL_DTLB_WAY_BITS | |
| XCHAL_ERRATUM_453 | |
| XCHAL_ERRATUM_497 | |
| XCHAL_ERRATUM_572 | |
| XCHAL_EXCCAUSE_ALLOCA | |
| XCHAL_EXCCAUSE_BITS | |
| XCHAL_EXCCAUSE_COPROCESSOR0_DISABLED | |
| XCHAL_EXCCAUSE_COPROCESSOR1_DISABLED | |
| XCHAL_EXCCAUSE_COPROCESSOR2_DISABLED | |
| XCHAL_EXCCAUSE_COPROCESSOR3_DISABLED | |
| XCHAL_EXCCAUSE_COPROCESSOR4_DISABLED | |
| XCHAL_EXCCAUSE_COPROCESSOR5_DISABLED | |
| XCHAL_EXCCAUSE_COPROCESSOR6_DISABLED | |
| XCHAL_EXCCAUSE_COPROCESSOR7_DISABLED | |
| XCHAL_EXCCAUSE_DTLB_MISS | |
| XCHAL_EXCCAUSE_DTLB_MULTIHIT | |
| XCHAL_EXCCAUSE_DTLB_PRIVILEGE | |
| XCHAL_EXCCAUSE_DTLB_SIZE_RESTRICTION | |
| XCHAL_EXCCAUSE_FETCH_CACHE_ATTRIBUTE | |
| XCHAL_EXCCAUSE_ILLEGAL_INSTRUCTION | |
| XCHAL_EXCCAUSE_INSTRUCTION_FETCH_ERROR | |
| XCHAL_EXCCAUSE_INTEGER_DIVIDE_BY_ZERO | |
| XCHAL_EXCCAUSE_ITLB_MISS | |
| XCHAL_EXCCAUSE_ITLB_MULTIHIT | |
| XCHAL_EXCCAUSE_ITLB_PRIVILEGE | |
| XCHAL_EXCCAUSE_ITLB_SIZE_RESTRICTION | |
| XCHAL_EXCCAUSE_LEVEL1_INTERRUPT | |
| XCHAL_EXCCAUSE_LOAD_CACHE_ATTRIBUTE | |
| XCHAL_EXCCAUSE_LOAD_STORE_ERROR | |
| XCHAL_EXCCAUSE_MASK | |
| XCHAL_EXCCAUSE_NUM | |
| XCHAL_EXCCAUSE_PRIVILEGED | |
| XCHAL_EXCCAUSE_SHIFT | |
| XCHAL_EXCCAUSE_SPECULATION | |
| XCHAL_EXCCAUSE_STORE_CACHE_ATTRIBUTE | |
| XCHAL_EXCCAUSE_SYSTEM_CALL | |
| XCHAL_EXCCAUSE_UNALIGNED | |
| XCHAL_EXCCAUSE_VALIDMASK | |
| XCHAL_EXCM_LEVEL | |
| XCHAL_EXTINT0_NUM | |
| XCHAL_EXTINT0_MASK | |
| XCHAL_EXTINT1_NUM | |
| XCHAL_EXTINT1_MASK | |
| XCHAL_EXTINT2_NUM | |
| XCHAL_EXTINT2_MASK | |
| XCHAL_EXTINT3_NUM | |
| XCHAL_EXTINT3_MASK | |
| XCHAL_EXTINT4_NUM | |
| XCHAL_EXTINT4_MASK | |
| XCHAL_EXTINT5_NUM | |
| XCHAL_EXTINT5_MASK | |
| XCHAL_EXTINT6_NUM | |
| XCHAL_EXTINT6_MASK | |
| XCHAL_EXTINT7_NUM | |
| XCHAL_EXTINT7_MASK | |
| XCHAL_EXTINT8_NUM | |
| XCHAL_EXTINT8_MASK | |
| XCHAL_EXTINT9_NUM | |
| XCHAL_EXTINT9_MASK | |
| XCHAL_EXTINT10_NUM | |
| XCHAL_EXTINT10_MASK | |
| XCHAL_EXTINT11_NUM | |
| XCHAL_EXTINT11_MASK | |
| XCHAL_EXTINT12_NUM | |
| XCHAL_EXTINT12_MASK | |
| XCHAL_EXTINT13_NUM | |
| XCHAL_EXTINT13_MASK | |
| XCHAL_EXTINT14_NUM | |
| XCHAL_EXTINT14_MASK | |
| XCHAL_EXTINT15_NUM | |
| XCHAL_EXTINT15_MASK | |
| XCHAL_EXTINT16_NUM | |
| XCHAL_EXTINT16_MASK | |
| XCHAL_EXTINT17_NUM | |
| XCHAL_EXTINT17_MASK | |
| XCHAL_EXTINT18_NUM | |
| XCHAL_EXTINT18_MASK | |
| XCHAL_EXTINT19_NUM | |
| XCHAL_EXTINT19_MASK | |
| XCHAL_EXTINT20_NUM | |
| XCHAL_EXTINT20_MASK | |
| XCHAL_EXTINT21_NUM | |
| XCHAL_EXTINT21_MASK | |
| XCHAL_EXTINT22_NUM | |
| XCHAL_EXTINT22_MASK | |
| XCHAL_EXTINT23_NUM | |
| XCHAL_EXTINT23_MASK | |
| XCHAL_EXTINT24_NUM | |
| XCHAL_EXTINT24_MASK | |
| XCHAL_EXTINT25_NUM | |
| XCHAL_EXTINT25_MASK | |
| XCHAL_EXTRA_SA_ALIGN | |
| XCHAL_EXTRA_SA_SIZE | |
| XCHAL_FIRST_HIGHPRI_LEVEL | |
| XCHAL_HAVE_ABS | |
| XCHAL_HAVE_ABSOLUTE_LITERALS | |
| XCHAL_HAVE_ADDX | |
| XCHAL_HAVE_AXI | |
| XCHAL_HAVE_BBE16 | |
| XCHAL_HAVE_BBE16_RSQRT | |
| XCHAL_HAVE_BBE16_VECDIV | |
| XCHAL_HAVE_BBE16_DESPREAD | |
| XCHAL_HAVE_BBENEP | |
| XCHAL_HAVE_BBP16 | |
| XCHAL_HAVE_BE | |
| XCHAL_HAVE_BOOLEANS | |
| XCHAL_HAVE_BOOTLOADER | |
| XCHAL_HAVE_BSP3 | |
| XCHAL_HAVE_BSP3_TRANSPOSE | |
| XCHAL_HAVE_CACHEATTR | |
| XCHAL_HAVE_CACHE_BLOCKOPS | |
| XCHAL_HAVE_CALL4AND12 | |
| XCHAL_HAVE_CA_WRITEBACK_NOALLOC | |
| XCHAL_HAVE_CCOUNT | |
| XCHAL_HAVE_CLAMPS | |
| XCHAL_HAVE_CONNXD2 | |
| XCHAL_HAVE_CONNXD2_DUALLSFLIX | |
| XCHAL_HAVE_CONST16 | |
| XCHAL_HAVE_CP | |
| XCHAL_HAVE_DCACHE_DYN_WAYS | |
| XCHAL_HAVE_DCACHE_TEST | |
| XCHAL_HAVE_DEBUG | |
| XCHAL_HAVE_DEBUG_APB | |
| XCHAL_HAVE_DEBUG_ERI | |
| XCHAL_HAVE_DEBUG_EXTERN_INT | |
| XCHAL_HAVE_DEBUG_JTAG | |
| XCHAL_HAVE_DENSITY | |
| XCHAL_HAVE_DEPBITS | |
| XCHAL_HAVE_DFP | |
| XCHAL_HAVE_DFPU_SINGLE_DOUBLE | |
| XCHAL_HAVE_DFPU_SINGLE_ONLY | |
| XCHAL_HAVE_DFP_ACCEL | |
| XCHAL_HAVE_DFP_DIV | |
| XCHAL_HAVE_DFP_RECIP | |
| XCHAL_HAVE_DFP_RSQRT | |
| XCHAL_HAVE_DFP_SQRT | |
| XCHAL_HAVE_DFP_accel | |
| XCHAL_HAVE_DIV32 | |
| XCHAL_HAVE_EXCEPTIONS | |
| XCHAL_HAVE_EXCM | |
| XCHAL_HAVE_EXTERN_REGS | |
| XCHAL_HAVE_FLIX3 | |
| XCHAL_HAVE_FP | |
| XCHAL_HAVE_FP_DIV | |
| XCHAL_HAVE_FP_RECIP | |
| XCHAL_HAVE_FP_RSQRT | |
| XCHAL_HAVE_FP_SQRT | |
| XCHAL_HAVE_FULL_RESET | |
| XCHAL_HAVE_FUSION | |
| XCHAL_HAVE_FUSION_16BIT_BASEBAND | |
| XCHAL_HAVE_FUSION_AES | |
| XCHAL_HAVE_FUSION_AVS | |
| XCHAL_HAVE_FUSION_BITOPS | |
| XCHAL_HAVE_FUSION_CONVENC | |
| XCHAL_HAVE_FUSION_FP | |
| XCHAL_HAVE_FUSION_LFSR_CRC | |
| XCHAL_HAVE_FUSION_LOW_POWER | |
| XCHAL_HAVE_FUSION_SOFTDEMAP | |
| XCHAL_HAVE_FUSION_VITERBI | |
| XCHAL_HAVE_GRIVPEP | |
| XCHAL_HAVE_GRIVPEP_HISTOGRAM | |
| XCHAL_HAVE_HALT | |
| XCHAL_HAVE_HIFI2 | |
| XCHAL_HAVE_HIFI2EP | |
| XCHAL_HAVE_HIFI3 | |
| XCHAL_HAVE_HIFI3_VFPU | |
| XCHAL_HAVE_HIFI4 | |
| XCHAL_HAVE_HIFI4_VFPU | |
| XCHAL_HAVE_HIFIPRO | |
| XCHAL_HAVE_HIFI_MINI | |
| XCHAL_HAVE_HIGHLEVEL_INTERRUPTS | |
| XCHAL_HAVE_HIGHPRI_INTERRUPTS | |
| XCHAL_HAVE_ICACHE_DYN_WAYS | |
| XCHAL_HAVE_ICACHE_TEST | |
| XCHAL_HAVE_IDENTITY_MAP | |
| XCHAL_HAVE_IMEM_LOADSTORE | |
| XCHAL_HAVE_INTERRUPTS | |
| XCHAL_HAVE_L32R | |
| XCHAL_HAVE_LE | |
| XCHAL_HAVE_LOOPS | |
| XCHAL_HAVE_MAC16 | |
| XCHAL_HAVE_MEM_ECC_PARITY | |
| XCHAL_HAVE_MIMIC_CACHEATTR | |
| XCHAL_HAVE_MINMAX | |
| XCHAL_HAVE_MP_INTERRUPTS | |
| XCHAL_HAVE_MP_RUNSTALL | |
| XCHAL_HAVE_MUL16 | |
| XCHAL_HAVE_MUL32 | |
| XCHAL_HAVE_MUL32_HIGH | |
| XCHAL_HAVE_MX | |
| XCHAL_HAVE_NMI | |
| XCHAL_HAVE_NSA | |
| XCHAL_HAVE_OCD | |
| XCHAL_HAVE_OCD_DIR_ARRAY | |
| XCHAL_HAVE_OCD_LS32DDR | |
| XCHAL_HAVE_OLD_EXC_ARCH | |
| XCHAL_HAVE_PDX4 | |
| XCHAL_HAVE_PIF | |
| XCHAL_HAVE_PIF_REQ_ATTR | |
| XCHAL_HAVE_PIF_WR_RESP | |
| XCHAL_HAVE_PREDICTED_BRANCHES | |
| XCHAL_HAVE_PREFETCH | |
| XCHAL_HAVE_PREFETCH_L1 | |
| XCHAL_HAVE_PRID | |
| XCHAL_HAVE_PSO | |
| XCHAL_HAVE_PSO_CDM | |
| XCHAL_HAVE_PSO_FULL_RETENTION | |
| XCHAL_HAVE_PTP_MMU | |
| XCHAL_HAVE_RELEASE_SYNC | |
| XCHAL_HAVE_S32C1I | |
| XCHAL_HAVE_SEXT | |
| XCHAL_HAVE_SPANNING_WAY | |
| XCHAL_HAVE_SPECULATION | |
| XCHAL_HAVE_SSP16 | |
| XCHAL_HAVE_SSP16_VITERBI | |
| XCHAL_HAVE_TAP_MASTER | |
| XCHAL_HAVE_THREADPTR | |
| XCHAL_HAVE_TLBS | |
| XCHAL_HAVE_TRAX | |
| XCHAL_HAVE_TURBO16 | |
| XCHAL_HAVE_USER_DPFPU | |
| XCHAL_HAVE_USER_SPFPU | |
| XCHAL_HAVE_VECBASE | |
| XCHAL_HAVE_VECTORFPU2005 | |
| XCHAL_HAVE_VECTOR_SELECT | |
| XCHAL_HAVE_VECTRA1 | |
| XCHAL_HAVE_VECTRALX | |
| XCHAL_HAVE_WIDE_BRANCHES | |
| XCHAL_HAVE_WINDOWED | |
| XCHAL_HAVE_XEA1 | |
| XCHAL_HAVE_XEA2 | |
| XCHAL_HAVE_XEAX | |
| XCHAL_HAVE_XLT_CACHEATTR | |
| XCHAL_HW_CONFIGID0 | |
| XCHAL_HW_CONFIGID1 | |
| XCHAL_HW_CONFIGID_RELIABLE | |
| XCHAL_HW_MAX_VERSION | |
| XCHAL_HW_MAX_VERSION_MAJOR | |
| XCHAL_HW_MAX_VERSION_MINOR | |
| XCHAL_HW_MIN_VERSION | |
| XCHAL_HW_MIN_VERSION_MAJOR | |
| XCHAL_HW_MIN_VERSION_MINOR | |
| XCHAL_HW_RELEASE_MAJOR | |
| XCHAL_HW_RELEASE_MINOR | |
| XCHAL_HW_RELEASE_NAME | |
| XCHAL_HW_REL_LX6 | |
| XCHAL_HW_REL_LX6_0 | |
| XCHAL_HW_REL_LX6_0_3 | |
| XCHAL_HW_VERSION | |
| XCHAL_HW_VERSION_MAJOR | |
| XCHAL_HW_VERSION_MINOR | |
| XCHAL_HW_VERSION_NAME | |
| XCHAL_ICACHE_ACCESS_SIZE | |
| XCHAL_ICACHE_ECC_PARITY | |
| XCHAL_ICACHE_LINESIZE | |
| XCHAL_ICACHE_LINEWIDTH | |
| XCHAL_ICACHE_LINE_LOCKABLE | |
| XCHAL_ICACHE_SETSIZE | |
| XCHAL_ICACHE_SETWIDTH | |
| XCHAL_ICACHE_SIZE | |
| XCHAL_ICACHE_TAG_F | |
| XCHAL_ICACHE_TAG_F_SHIFT | |
| XCHAL_ICACHE_TAG_L | |
| XCHAL_ICACHE_TAG_L_SHIFT | |
| XCHAL_ICACHE_TAG_V | |
| XCHAL_ICACHE_TAG_V_SHIFT | |
| XCHAL_ICACHE_WAYS | |
| XCHAL_INEXACT | |
| XCHAL_INSTRAM0_SIZE | |
| XCHAL_INSTRAM0_VADDR | |
| XCHAL_INSTRAM0_PADDR | |
| XCHAL_INSTRAM0_ECC_PARITY | |
| XCHAL_INSTRAM1_VADDR | |
| XCHAL_INSTRAM1_PADDR | |
| XCHAL_INSTRAM1_SIZE | |
| XCHAL_INSTRAM1_ECC_PARITY | |
| XCHAL_INSTROM0_SIZE | |
| XCHAL_INSTROM0_VADDR | |
| XCHAL_INSTROM0_PADDR | |
| XCHAL_INSTROM0_ECC_PARITY | |
| XCHAL_INST_FETCH_WIDTH | |
| XCHAL_INST_ILLN | |
| XCHAL_INST_ILLN_BYTE0 | |
| XCHAL_INST_ILLN_BYTE1 | |
| XCHAL_INT0_LEVEL | |
| XCHAL_INT0_EXTNUM | |
| XCHAL_INT1_LEVEL | |
| XCHAL_INT1_EXTNUM | |
| XCHAL_INT2_LEVEL | |
| XCHAL_INT2_EXTNUM | |
| XCHAL_INT3_LEVEL | |
| XCHAL_INT3_EXTNUM | |
| XCHAL_INT4_LEVEL | |
| XCHAL_INT4_EXTNUM | |
| XCHAL_INT5_LEVEL | |
| XCHAL_INT5_EXTNUM | |
| XCHAL_INT6_LEVEL | |
| XCHAL_INT7_LEVEL | |
| XCHAL_INT8_LEVEL | |
| XCHAL_INT8_EXTNUM | |
| XCHAL_INT9_LEVEL | |
| XCHAL_INT9_EXTNUM | |
| XCHAL_INT10_LEVEL | |
| XCHAL_INT10_EXTNUM | |
| XCHAL_INT11_LEVEL | |
| XCHAL_INT12_LEVEL | |
| XCHAL_INT12_EXTNUM | |
| XCHAL_INT13_LEVEL | |
| XCHAL_INT13_EXTNUM | |
| XCHAL_INT14_LEVEL | |
| XCHAL_INT14_EXTNUM | |
| XCHAL_INT15_LEVEL | |
| XCHAL_INT16_LEVEL | |
| XCHAL_INT17_LEVEL | |
| XCHAL_INT17_EXTNUM | |
| XCHAL_INT18_LEVEL | |
| XCHAL_INT18_EXTNUM | |
| XCHAL_INT19_LEVEL | |
| XCHAL_INT19_EXTNUM | |
| XCHAL_INT20_LEVEL | |
| XCHAL_INT20_EXTNUM | |
| XCHAL_INT21_LEVEL | |
| XCHAL_INT21_EXTNUM | |
| XCHAL_INT22_LEVEL | |
| XCHAL_INT22_EXTNUM | |
| XCHAL_INT23_LEVEL | |
| XCHAL_INT23_EXTNUM | |
| XCHAL_INT24_LEVEL | |
| XCHAL_INT24_EXTNUM | |
| XCHAL_INT25_LEVEL | |
| XCHAL_INT25_EXTNUM | |
| XCHAL_INT26_LEVEL | |
| XCHAL_INT26_EXTNUM | |
| XCHAL_INT27_LEVEL | |
| XCHAL_INT27_EXTNUM | |
| XCHAL_INT28_LEVEL | |
| XCHAL_INT28_EXTNUM | |
| XCHAL_INT29_LEVEL | |
| XCHAL_INT30_LEVEL | |
| XCHAL_INT30_EXTNUM | |
| XCHAL_INT31_LEVEL | |
| XCHAL_INT31_EXTNUM | |
| XCHAL_INTCLEARABLE_MASK | |
| XCHAL_INTLEVEL0_MASK | |
| XCHAL_INTLEVEL0_ANDBELOW_MASK | |
| XCHAL_INTLEVEL1_MASK | |
| XCHAL_INTLEVEL1_ANDBELOW_MASK | |
| XCHAL_INTLEVEL2_MASK | |
| XCHAL_INTLEVEL2_ANDBELOW_MASK | |
| XCHAL_INTLEVEL2_VECOFS | |
| XCHAL_INTLEVEL2_VECTOR_VADDR | |
| XCHAL_INTLEVEL2_VECTOR_PADDR | |
| XCHAL_INTLEVEL3_MASK | |
| XCHAL_INTLEVEL3_ANDBELOW_MASK | |
| XCHAL_INTLEVEL3_VECOFS | |
| XCHAL_INTLEVEL3_VECTOR_VADDR | |
| XCHAL_INTLEVEL3_VECTOR_PADDR | |
| XCHAL_INTLEVEL4_MASK | |
| XCHAL_INTLEVEL4_ANDBELOW_MASK | |
| XCHAL_INTLEVEL4_VECOFS | |
| XCHAL_INTLEVEL4_VECTOR_VADDR | |
| XCHAL_INTLEVEL4_VECTOR_PADDR | |
| XCHAL_INTLEVEL5_MASK | |
| XCHAL_INTLEVEL5_ANDBELOW_MASK | |
| XCHAL_INTLEVEL5_VECOFS | |
| XCHAL_INTLEVEL5_VECTOR_VADDR | |
| XCHAL_INTLEVEL5_VECTOR_PADDR | |
| XCHAL_INTLEVEL6_MASK | |
| XCHAL_INTLEVEL6_ANDBELOW_MASK | |
| XCHAL_INTLEVEL6_VECOFS | |
| XCHAL_INTLEVEL6_VECTOR_VADDR | |
| XCHAL_INTLEVEL6_VECTOR_PADDR | |
| XCHAL_INTLEVEL7_MASK | |
| XCHAL_INTLEVEL7_ANDBELOW_MASK | |
| XCHAL_INTLEVEL7_NUM | |
| XCHAL_INTLEVEL7_VECOFS | |
| XCHAL_INTLEVEL7_VECTOR_VADDR | |
| XCHAL_INTLEVEL7_VECTOR_PADDR | |
| XCHAL_INTLEVEL8_MASK | |
| XCHAL_INTLEVEL8_ANDBELOW_MASK | |
| XCHAL_INTLEVEL9_MASK | |
| XCHAL_INTLEVEL9_ANDBELOW_MASK | |
| XCHAL_INTLEVEL10_MASK | |
| XCHAL_INTLEVEL10_ANDBELOW_MASK | |
| XCHAL_INTLEVEL11_MASK | |
| XCHAL_INTLEVEL11_ANDBELOW_MASK | |
| XCHAL_INTLEVEL12_MASK | |
| XCHAL_INTLEVEL12_ANDBELOW_MASK | |
| XCHAL_INTLEVEL13_MASK | |
| XCHAL_INTLEVEL13_ANDBELOW_MASK | |
| XCHAL_INTLEVEL14_MASK | |
| XCHAL_INTLEVEL14_ANDBELOW_MASK | |
| XCHAL_INTLEVEL15_MASK | |
| XCHAL_INTLEVEL15_ANDBELOW_MASK | |
| XCHAL_INTSETTABLE_MASK | |
| XCHAL_INTTYPE_MASK_EXTERN_EDGE | |
| XCHAL_INTTYPE_MASK_EXTERN_LEVEL | |
| XCHAL_INTTYPE_MASK_NMI | |
| XCHAL_INTTYPE_MASK_PROFILING | |
| XCHAL_INTTYPE_MASK_SOFTWARE | |
| XCHAL_INTTYPE_MASK_TIMER | |
| XCHAL_INTTYPE_MASK_UNCONFIGURED | |
| XCHAL_INTTYPE_MASK_WRITE_ERROR | |
| XCHAL_INVALID_ADDRESS | |
| XCHAL_IRAM0_SIZE | |
| XCHAL_IRAM0_VADDR | |
| XCHAL_IRAM0_PADDR | |
| XCHAL_IRAM1_VADDR | |
| XCHAL_IRAM1_PADDR | |
| XCHAL_IRAM1_SIZE | |
| XCHAL_IROM0_SIZE | |
| XCHAL_IROM0_VADDR | |
| XCHAL_IROM0_PADDR | |
| XCHAL_ITLB_ARF_SETS | |
| XCHAL_ITLB_ARF_WAYS | |
| XCHAL_ITLB_MINWIRED_SETS | |
| XCHAL_ITLB_SET0_WAY | |
| XCHAL_ITLB_SET0_ARF | |
| XCHAL_ITLB_SET0_WAYS | |
| XCHAL_ITLB_SET0_ENTRIES | |
| XCHAL_ITLB_SET0_CA_RESET | |
| XCHAL_ITLB_SET0_PAGESIZES | |
| XCHAL_ITLB_SET0_VPN_RESET | |
| XCHAL_ITLB_SET0_PPN_RESET | |
| XCHAL_ITLB_SET0_ASID_RESET | |
| XCHAL_ITLB_SET0_PAGESZ_BITS | |
| XCHAL_ITLB_SET0_CA_CONSTMASK | |
| XCHAL_ITLB_SET0_VPN_CONSTMASK | |
| XCHAL_ITLB_SET0_PPN_CONSTMASK | |
| XCHAL_ITLB_SET0_ASID_CONSTMASK | |
| XCHAL_ITLB_SET0_E0_CA_RESET | |
| XCHAL_ITLB_SET0_E0_VPN_CONST | |
| XCHAL_ITLB_SET0_E0_PPN_CONST | |
| XCHAL_ITLB_SET0_E1_VPN_CONST | |
| XCHAL_ITLB_SET0_E1_PPN_CONST | |
| XCHAL_ITLB_SET0_E1_CA_RESET | |
| XCHAL_ITLB_SET0_E2_VPN_CONST | |
| XCHAL_ITLB_SET0_E2_PPN_CONST | |
| XCHAL_ITLB_SET0_E2_CA_RESET | |
| XCHAL_ITLB_SET0_E3_VPN_CONST | |
| XCHAL_ITLB_SET0_E3_PPN_CONST | |
| XCHAL_ITLB_SET0_E3_CA_RESET | |
| XCHAL_ITLB_SET0_E4_VPN_CONST | |
| XCHAL_ITLB_SET0_E4_PPN_CONST | |
| XCHAL_ITLB_SET0_E4_CA_RESET | |
| XCHAL_ITLB_SET0_E5_VPN_CONST | |
| XCHAL_ITLB_SET0_E5_PPN_CONST | |
| XCHAL_ITLB_SET0_E5_CA_RESET | |
| XCHAL_ITLB_SET0_E6_VPN_CONST | |
| XCHAL_ITLB_SET0_E6_PPN_CONST | |
| XCHAL_ITLB_SET0_E6_CA_RESET | |
| XCHAL_ITLB_SET0_E7_VPN_CONST | |
| XCHAL_ITLB_SET0_E7_PPN_CONST | |
| XCHAL_ITLB_SET0_E7_CA_RESET | |
| XCHAL_ITLB_SET0_ENTRIES_LOG2 | |
| XCHAL_ITLB_SET0_PAGESZ_LOG2_MIN | |
| XCHAL_ITLB_SET0_PAGESZ_LOG2_MAX | |
| XCHAL_ITLB_SET0_PAGESZ_LOG2_LIST | |
| XCHAL_ITLB_SETS | |
| XCHAL_ITLB_WAY0_SET | |
| XCHAL_ITLB_WAYS | |
| XCHAL_ITLB_WAY_BITS | |
| XCHAL_KERNELEXC_VECTOR_PADDR | |
| XCHAL_KERNELEXC_VECTOR_VADDR | |
| XCHAL_KERNEL_VECOFS | |
| XCHAL_KERNEL_VECTOR_PADDR | |
| XCHAL_KERNEL_VECTOR_VADDR | |
| XCHAL_LOOP_BUFFER_SIZE | |
| XCHAL_LOWPRI_MASK | |
| XCHAL_MAX_INSTRUCTION_SIZE | |
| XCHAL_MEMORY_ORDER | |
| XCHAL_MMU_ASID_BITS | |
| XCHAL_MMU_ASID_INVALID | |
| XCHAL_MMU_ASID_KERNEL | |
| XCHAL_MMU_CA_BITS | |
| XCHAL_MMU_MAX_PTE_PAGE_SIZE | |
| XCHAL_MMU_MIN_PTE_PAGE_SIZE | |
| XCHAL_MMU_RINGS | |
| XCHAL_MMU_RING_BITS | |
| XCHAL_MMU_SR_BITS | |
| XCHAL_NCP_SA_ALIGN | |
| XCHAL_NCP_SA_NUM | |
| XCHAL_NCP_SA_SIZE | |
| XCHAL_NMILEVEL | |
| XCHAL_NMI_INTERRUPT | |
| XCHAL_NMI_VECOFS | |
| XCHAL_NMI_VECTOR_PADDR | |
| XCHAL_NMI_VECTOR_VADDR | |
| XCHAL_NO_PAGES_MAPPED | |
| XCHAL_NUM_AREGS | |
| XCHAL_NUM_AREGS_LOG2 | |
| XCHAL_NUM_CONTEXTS | |
| XCHAL_NUM_DATARAM | |
| XCHAL_NUM_DATAROM | |
| XCHAL_NUM_DBREAK | |
| XCHAL_NUM_DRAM | |
| XCHAL_NUM_DROM | |
| XCHAL_NUM_EXTINTERRUPTS | |
| XCHAL_NUM_IBREAK | |
| XCHAL_NUM_INSTRAM | |
| XCHAL_NUM_INSTROM | |
| XCHAL_NUM_INTERRUPTS | |
| XCHAL_NUM_INTERRUPTS_LOG2 | |
| XCHAL_NUM_INTLEVELS | |
| XCHAL_NUM_IRAM | |
| XCHAL_NUM_IROM | |
| XCHAL_NUM_LOADSTORE_UNITS | |
| XCHAL_NUM_LOWPRI_LEVELS | |
| XCHAL_NUM_MISC_REGS | |
| XCHAL_NUM_PERF_COUNTERS | |
| XCHAL_NUM_TIMERS | |
| XCHAL_NUM_URAM | |
| XCHAL_NUM_WRITEBUFFER_ENTRIES | |
| XCHAL_NUM_XLMI | |
| XCHAL_PREFETCH_BLOCK_ENTRIES | |
| XCHAL_PREFETCH_CASTOUT_LINES | |
| XCHAL_PREFETCH_ENTRIES | |
| XCHAL_PROFILING_INTERRUPT | |
| XCHAL_PROGRAMEXC_VECTOR_PADDR | |
| XCHAL_PROGRAMEXC_VECTOR_VADDR | |
| XCHAL_PS_CALLINC_BITS | |
| XCHAL_PS_CALLINC_MASK | |
| XCHAL_PS_CALLINC_NUM | |
| XCHAL_PS_CALLINC_SHIFT | |
| XCHAL_PS_EXCM_BITS | |
| XCHAL_PS_EXCM_MASK | |
| XCHAL_PS_EXCM_NUM | |
| XCHAL_PS_EXCM_SHIFT | |
| XCHAL_PS_INTLEVEL_BITS | |
| XCHAL_PS_INTLEVEL_MASK | |
| XCHAL_PS_INTLEVEL_NUM | |
| XCHAL_PS_INTLEVEL_SHIFT | |
| XCHAL_PS_OWB_BITS | |
| XCHAL_PS_OWB_MASK | |
| XCHAL_PS_OWB_NUM | |
| XCHAL_PS_OWB_SHIFT | |
| XCHAL_PS_RING_BITS | |
| XCHAL_PS_RING_MASK | |
| XCHAL_PS_RING_NUM | |
| XCHAL_PS_RING_SHIFT | |
| XCHAL_PS_UM_BITS | |
| XCHAL_PS_UM_MASK | |
| XCHAL_PS_UM_NUM | |
| XCHAL_PS_UM_SHIFT | |
| XCHAL_PS_VALIDMASK | |
| XCHAL_PS_WOE_BITS | |
| XCHAL_PS_WOE_MASK | |
| XCHAL_PS_WOE_NUM | |
| XCHAL_PS_WOE_SHIFT | |
| XCHAL_RESET_VECBASE_OVERLAP | |
| XCHAL_RESET_VECTOR0_VADDR | |
| XCHAL_RESET_VECTOR0_PADDR | |
| XCHAL_RESET_VECTOR1_VADDR | |
| XCHAL_RESET_VECTOR1_PADDR | |
| XCHAL_RESET_VECTOR_PADDR | |
| XCHAL_RESET_VECTOR_VADDR | |
| XCHAL_SNOOP_LB_MEMCTL_DEFAULT | |
| XCHAL_SPANNING_WAY | |
| XCHAL_STACKEDEXC_VECTOR_PADDR | |
| XCHAL_STACKEDEXC_VECTOR_VADDR | |
| XCHAL_SUCCESS | |
| XCHAL_SW_VERSION | |
| XCHAL_TIMER0_INTERRUPT | |
| XCHAL_TIMER1_INTERRUPT | |
| XCHAL_TIMER2_INTERRUPT | |
| XCHAL_TOTAL_SA_ALIGN | |
| XCHAL_TOTAL_SA_SIZE | |
| XCHAL_TRAX_ATB_WIDTH | |
| XCHAL_TRAX_MEM_SHAREABLE | |
| XCHAL_TRAX_MEM_SIZE | |
| XCHAL_TRAX_TIME_WIDTH | |
| XCHAL_UNALIGNED_LOAD_EXCEPTION | |
| XCHAL_UNALIGNED_LOAD_HW | |
| XCHAL_UNALIGNED_STORE_EXCEPTION | |
| XCHAL_UNALIGNED_STORE_HW | |
| XCHAL_UNSUPPORTED_ON_THIS_ARCH | |
| XCHAL_USEREXC_VECTOR_PADDR | |
| XCHAL_USEREXC_VECTOR_VADDR | |
| XCHAL_USER_VECOFS | |
| XCHAL_USER_VECTOR_PADDR | |
| XCHAL_USER_VECTOR_VADDR | |
| XCHAL_VECBASE_RESET_PADDR | |
| XCHAL_VECBASE_RESET_VADDR | |
| XCHAL_WINDOW_OF4_VECOFS | |
| XCHAL_WINDOW_OF8_VECOFS | |
| XCHAL_WINDOW_OF12_VECOFS | |
| XCHAL_WINDOW_UF4_VECOFS | |
| XCHAL_WINDOW_UF8_VECOFS | |
| XCHAL_WINDOW_UF12_VECOFS | |
| XCHAL_WINDOW_VECTORS_PADDR | |
| XCHAL_WINDOW_VECTORS_VADDR | |
| XCHAL_XEA_VERSION | |
| XCHAL_XLMI0_SIZE | |
| XCHAL_XLMI0_VADDR | |
| XCHAL_XLMI0_PADDR | |
| XCHAL_XLMI0_ECC_PARITY | |
| XSHAL_ALLVALID_CACHEATTR_BYPASS | |
| XSHAL_ALLVALID_CACHEATTR_DEFAULT | |
| XSHAL_ALLVALID_CACHEATTR_WRITEALLOC | |
| XSHAL_ALLVALID_CACHEATTR_WRITEBACK | |
| XSHAL_ALLVALID_CACHEATTR_WRITETHRU | |
| XSHAL_DEBUG_VECTOR_ISROM | |
| XSHAL_DEBUG_VECTOR_SIZE | |
| XSHAL_DOUBLEEXC_VECTOR_ISROM | |
| XSHAL_DOUBLEEXC_VECTOR_SIZE | |
| XSHAL_FLOATING_POINT_ABI | |
| XSHAL_HAVE_TEXT_SECTION_LITERALS | |
| XSHAL_INTLEVEL2_VECTOR_SIZE | |
| XSHAL_INTLEVEL2_VECTOR_ISROM | |
| XSHAL_INTLEVEL3_VECTOR_SIZE | |
| XSHAL_INTLEVEL3_VECTOR_ISROM | |
| XSHAL_INTLEVEL4_VECTOR_SIZE | |
| XSHAL_INTLEVEL4_VECTOR_ISROM | |
| XSHAL_INTLEVEL5_VECTOR_SIZE | |
| XSHAL_INTLEVEL5_VECTOR_ISROM | |
| XSHAL_INTLEVEL6_VECTOR_SIZE | |
| XSHAL_INTLEVEL6_VECTOR_ISROM | |
| XSHAL_INTLEVEL7_VECTOR_SIZE | |
| XSHAL_IOBLOCK_BYPASS_PADDR | |
| XSHAL_IOBLOCK_BYPASS_SIZE | |
| XSHAL_IOBLOCK_BYPASS_VADDR | |
| XSHAL_IOBLOCK_CACHED_PADDR | |
| XSHAL_IOBLOCK_CACHED_SIZE | |
| XSHAL_IOBLOCK_CACHED_VADDR | |
| XSHAL_ISS_CACHEATTR_BYPASS | |
| XSHAL_ISS_CACHEATTR_DEFAULT | |
| XSHAL_ISS_CACHEATTR_WRITEALLOC | |
| XSHAL_ISS_CACHEATTR_WRITEBACK | |
| XSHAL_ISS_CACHEATTR_WRITETHRU | |
| XSHAL_ISS_PIPE_REGIONS | |
| XSHAL_ISS_SDRAM_REGIONS | |
| XSHAL_KERNELEXC_VECTOR_SIZE | |
| XSHAL_KERNEL_VECTOR_ISROM | |
| XSHAL_KERNEL_VECTOR_SIZE | |
| XSHAL_MAGIC_EXIT | |
| XSHAL_NMI_VECTOR_ISROM | |
| XSHAL_NMI_VECTOR_SIZE | |
| XSHAL_PROGRAMEXC_VECTOR_SIZE | |
| XSHAL_RAM_AVAIL_VADDR | |
| XSHAL_RAM_AVAIL_VSIZE | |
| XSHAL_RAM_BYPASS_PADDR | |
| XSHAL_RAM_BYPASS_PSIZE | |
| XSHAL_RAM_BYPASS_VADDR | |
| XSHAL_RAM_PADDR | |
| XSHAL_RAM_PSIZE | |
| XSHAL_RAM_SIZE | |
| XSHAL_RAM_VADDR | |
| XSHAL_RAM_VSIZE | |
| XSHAL_RESET_VECTOR_ISROM | |
| XSHAL_RESET_VECTOR_PADDR | |
| XSHAL_RESET_VECTOR_SIZE | |
| XSHAL_RESET_VECTOR_VADDR | |
| XSHAL_ROM_AVAIL_VADDR | |
| XSHAL_ROM_AVAIL_VSIZE | |
| XSHAL_ROM_PADDR | |
| XSHAL_ROM_SIZE | |
| XSHAL_ROM_VADDR | |
| XSHAL_SIMIO_BYPASS_VADDR | |
| XSHAL_SIMIO_CACHED_VADDR | |
| XSHAL_SIMIO_PADDR | |
| XSHAL_SIMIO_SIZE | |
| XSHAL_STACKEDEXC_VECTOR_SIZE | |
| XSHAL_STATIC_VECTOR_SELECT | |
| XSHAL_STRICT_CACHEATTR_BYPASS | |
| XSHAL_STRICT_CACHEATTR_DEFAULT | |
| XSHAL_STRICT_CACHEATTR_WRITEALLOC | |
| XSHAL_STRICT_CACHEATTR_WRITEBACK | |
| XSHAL_STRICT_CACHEATTR_WRITETHRU | |
| XSHAL_TRAPNULL_CACHEATTR_BYPASS | |
| XSHAL_TRAPNULL_CACHEATTR_DEFAULT | |
| XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC | |
| XSHAL_TRAPNULL_CACHEATTR_WRITEBACK | |
| XSHAL_TRAPNULL_CACHEATTR_WRITETHRU | |
| XSHAL_USEREXC_VECTOR_SIZE | |
| XSHAL_USER_VECTOR_ISROM | |
| XSHAL_USER_VECTOR_SIZE | |
| XSHAL_USE_ABSOLUTE_LITERALS | |
| XSHAL_USE_FLOATING_POINT | |
| XSHAL_VECTORS_PACKED | |
| XSHAL_WINDOW_VECTORS_ISROM | |
| XSHAL_WINDOW_VECTORS_SIZE | |
| XSHAL_XT2000_CACHEATTR_WRITEBACK | |
| XSHAL_XT2000_CACHEATTR_WRITEALLOC | |
| XSHAL_XT2000_CACHEATTR_WRITETHRU | |
| XSHAL_XT2000_CACHEATTR_BYPASS | |
| XSHAL_XT2000_CACHEATTR_DEFAULT | |
| XSHAL_XT2000_PIPE_REGIONS | |
| XSHAL_XT2000_SDRAM_REGIONS | |
| XTENSA_HWCIDSCHEME_RA_2004_1 | |
| XTENSA_HWCIDSCHEME_RA_2005_1 | |
| XTENSA_HWCIDSCHEME_RA_2005_2 | |
| XTENSA_HWCIDSCHEME_RA_2005_3 | |
| XTENSA_HWCIDSCHEME_RA_2006_4 | |
| XTENSA_HWCIDSCHEME_RA_2006_5 | |
| XTENSA_HWCIDSCHEME_RA_2006_6 | |
| XTENSA_HWCIDSCHEME_RA_2007_7 | |
| XTENSA_HWCIDSCHEME_RA_2008_8 | |
| XTENSA_HWCIDSCHEME_RB_2006_0 | |
| XTENSA_HWCIDSCHEME_RB_2007_1 | |
| XTENSA_HWCIDSCHEME_RB_2007_2 | |
| XTENSA_HWCIDSCHEME_RB_2007_2_MP | |
| XTENSA_HWCIDSCHEME_RB_2008_3 | |
| XTENSA_HWCIDSCHEME_RB_2008_4 | |
| XTENSA_HWCIDSCHEME_RB_2009_5 | |
| XTENSA_HWCIDSCHEME_RC_2009_0 | |
| XTENSA_HWCIDSCHEME_RC_2010_1 | |
| XTENSA_HWCIDSCHEME_RC_2010_2 | |
| XTENSA_HWCIDSCHEME_RC_2011_3 | |
| XTENSA_HWCIDSCHEME_RD_2010_0 | |
| XTENSA_HWCIDSCHEME_RD_2011_1 | |
| XTENSA_HWCIDSCHEME_RD_2011_2 | |
| XTENSA_HWCIDSCHEME_RD_2011_3 | |
| XTENSA_HWCIDSCHEME_RD_2012_4 | |
| XTENSA_HWCIDSCHEME_RD_2012_5 | |
| XTENSA_HWCIDSCHEME_RE_2012_0 | |
| XTENSA_HWCIDSCHEME_RE_2012_1 | |
| XTENSA_HWCIDSCHEME_RE_2013_2 | |
| XTENSA_HWCIDSCHEME_RE_2013_3 | |
| XTENSA_HWCIDSCHEME_RE_2013_4 | |
| XTENSA_HWCIDSCHEME_RE_2014_5 | |
| XTENSA_HWCIDSCHEME_RE_2015_6 | |
| XTENSA_HWCIDSCHEME_RF_2014_0 | |
| XTENSA_HWCIDSCHEME_RF_2014_1 | |
| XTENSA_HWCIDSCHEME_RF_2015_2 | |
| XTENSA_HWCIDSCHEME_RF_2015_3 | |
| XTENSA_HWCIDSCHEME_RG_2015_0 | |
| XTENSA_HWCIDSCHEME_T1020_0 | |
| XTENSA_HWCIDSCHEME_T1020_1 | |
| XTENSA_HWCIDSCHEME_T1020_2B | |
| XTENSA_HWCIDSCHEME_T1020_2 | |
| XTENSA_HWCIDSCHEME_T1020_3 | |
| XTENSA_HWCIDSCHEME_T1020_4 | |
| XTENSA_HWCIDSCHEME_T1030_0 | |
| XTENSA_HWCIDSCHEME_T1030_1 | |
| XTENSA_HWCIDSCHEME_T1030_2 | |
| XTENSA_HWCIDSCHEME_T1030_3 | |
| XTENSA_HWCIDSCHEME_T1040_0 | |
| XTENSA_HWCIDSCHEME_T1040_1 | |
| XTENSA_HWCIDSCHEME_T1040_1P | |
| XTENSA_HWCIDSCHEME_T1040_2 | |
| XTENSA_HWCIDSCHEME_T1040_3 | |
| XTENSA_HWCIDSCHEME_T1050_0 | |
| XTENSA_HWCIDSCHEME_T1050_1 | |
| XTENSA_HWCIDSCHEME_T1050_2 | |
| XTENSA_HWCIDSCHEME_T1050_3 | |
| XTENSA_HWCIDSCHEME_T1050_4 | |
| XTENSA_HWCIDSCHEME_T1050_5 | |
| XTENSA_HWCIDVERS_RA_2004_1 | |
| XTENSA_HWCIDVERS_RA_2005_1 | |
| XTENSA_HWCIDVERS_RA_2005_2 | |
| XTENSA_HWCIDVERS_RA_2005_3 | |
| XTENSA_HWCIDVERS_RA_2006_4 | |
| XTENSA_HWCIDVERS_RA_2006_5 | |
| XTENSA_HWCIDVERS_RA_2006_6 | |
| XTENSA_HWCIDVERS_RA_2007_7 | |
| XTENSA_HWCIDVERS_RA_2008_8 | |
| XTENSA_HWCIDVERS_RB_2006_0 | |
| XTENSA_HWCIDVERS_RB_2007_1 | |
| XTENSA_HWCIDVERS_RB_2007_2 | |
| XTENSA_HWCIDVERS_RB_2007_2_MP | |
| XTENSA_HWCIDVERS_RB_2008_3 | |
| XTENSA_HWCIDVERS_RB_2008_4 | |
| XTENSA_HWCIDVERS_RB_2009_5 | |
| XTENSA_HWCIDVERS_RC_2009_0 | |
| XTENSA_HWCIDVERS_RC_2010_1 | |
| XTENSA_HWCIDVERS_RC_2010_2 | |
| XTENSA_HWCIDVERS_RC_2011_3 | |
| XTENSA_HWCIDVERS_RD_2010_0 | |
| XTENSA_HWCIDVERS_RD_2011_1 | |
| XTENSA_HWCIDVERS_RD_2011_2 | |
| XTENSA_HWCIDVERS_RD_2011_3 | |
| XTENSA_HWCIDVERS_RD_2012_4 | |
| XTENSA_HWCIDVERS_RD_2012_5 | |
| XTENSA_HWCIDVERS_RE_2012_0 | |
| XTENSA_HWCIDVERS_RE_2012_1 | |
| XTENSA_HWCIDVERS_RE_2013_2 | |
| XTENSA_HWCIDVERS_RE_2013_3 | |
| XTENSA_HWCIDVERS_RE_2013_4 | |
| XTENSA_HWCIDVERS_RE_2014_5 | |
| XTENSA_HWCIDVERS_RE_2015_6 | |
| XTENSA_HWCIDVERS_RF_2014_0 | |
| XTENSA_HWCIDVERS_RF_2014_1 | |
| XTENSA_HWCIDVERS_RF_2015_2 | |
| XTENSA_HWCIDVERS_RF_2015_3 | |
| XTENSA_HWCIDVERS_RG_2015_0 | |
| XTENSA_HWCIDVERS_T1020_0 | |
| XTENSA_HWCIDVERS_T1020_1 | |
| XTENSA_HWCIDVERS_T1020_2B | |
| XTENSA_HWCIDVERS_T1020_2 | |
| XTENSA_HWCIDVERS_T1020_3 | |
| XTENSA_HWCIDVERS_T1020_4 | |
| XTENSA_HWCIDVERS_T1030_0 | |
| XTENSA_HWCIDVERS_T1030_1 | |
| XTENSA_HWCIDVERS_T1030_2 | |
| XTENSA_HWCIDVERS_T1030_3 | |
| XTENSA_HWCIDVERS_T1040_0 | |
| XTENSA_HWCIDVERS_T1040_1 | |
| XTENSA_HWCIDVERS_T1040_1P | |
| XTENSA_HWCIDVERS_T1040_2 | |
| XTENSA_HWCIDVERS_T1040_3 | |
| XTENSA_HWCIDVERS_T1050_0 | |
| XTENSA_HWCIDVERS_T1050_1 | |
| XTENSA_HWCIDVERS_T1050_2 | |
| XTENSA_HWCIDVERS_T1050_3 | |
| XTENSA_HWCIDVERS_T1050_4 | |
| XTENSA_HWCIDVERS_T1050_5 | |
| XTENSA_HWVERSION_RA_2004_1 | |
| XTENSA_HWVERSION_RA_2005_1 | |
| XTENSA_HWVERSION_RA_2005_2 | |
| XTENSA_HWVERSION_RA_2005_3 | |
| XTENSA_HWVERSION_RA_2006_4 | |
| XTENSA_HWVERSION_RA_2006_5 | |
| XTENSA_HWVERSION_RA_2006_6 | |
| XTENSA_HWVERSION_RA_2007_7 | |
| XTENSA_HWVERSION_RA_2008_8 | |
| XTENSA_HWVERSION_RB_2006_0 | |
| XTENSA_HWVERSION_RB_2007_1 | |
| XTENSA_HWVERSION_RB_2007_2 | |
| XTENSA_HWVERSION_RB_2007_2_MP | |
| XTENSA_HWVERSION_RB_2008_3 | |
| XTENSA_HWVERSION_RB_2008_4 | |
| XTENSA_HWVERSION_RB_2009_5 | |
| XTENSA_HWVERSION_RC_2009_0 | |
| XTENSA_HWVERSION_RC_2010_1 | |
| XTENSA_HWVERSION_RC_2010_2 | |
| XTENSA_HWVERSION_RC_2011_3 | |
| XTENSA_HWVERSION_RD_2010_0 | |
| XTENSA_HWVERSION_RD_2011_1 | |
| XTENSA_HWVERSION_RD_2011_2 | |
| XTENSA_HWVERSION_RD_2011_3 | |
| XTENSA_HWVERSION_RD_2012_4 | |
| XTENSA_HWVERSION_RD_2012_5 | |
| XTENSA_HWVERSION_RE_2012_0 | |
| XTENSA_HWVERSION_RE_2012_1 | |
| XTENSA_HWVERSION_RE_2013_2 | |
| XTENSA_HWVERSION_RE_2013_3 | |
| XTENSA_HWVERSION_RE_2013_4 | |
| XTENSA_HWVERSION_RE_2014_5 | |
| XTENSA_HWVERSION_RE_2015_6 | |
| XTENSA_HWVERSION_RF_2014_0 | |
| XTENSA_HWVERSION_RF_2014_1 | |
| XTENSA_HWVERSION_RF_2015_2 | |
| XTENSA_HWVERSION_RF_2015_3 | |
| XTENSA_HWVERSION_RG_2015_0 | |
| XTENSA_HWVERSION_T1020_0 | |
| XTENSA_HWVERSION_T1020_1 | |
| XTENSA_HWVERSION_T1020_2B | |
| XTENSA_HWVERSION_T1020_2 | |
| XTENSA_HWVERSION_T1020_3 | |
| XTENSA_HWVERSION_T1020_4 | |
| XTENSA_HWVERSION_T1030_0 | |
| XTENSA_HWVERSION_T1030_1 | |
| XTENSA_HWVERSION_T1030_2 | |
| XTENSA_HWVERSION_T1030_3 | |
| XTENSA_HWVERSION_T1040_0 | |
| XTENSA_HWVERSION_T1040_1 | |
| XTENSA_HWVERSION_T1040_1P | |
| XTENSA_HWVERSION_T1040_2 | |
| XTENSA_HWVERSION_T1040_3 | |
| XTENSA_HWVERSION_T1050_0 | |
| XTENSA_HWVERSION_T1050_1 | |
| XTENSA_HWVERSION_T1050_2 | |
| XTENSA_HWVERSION_T1050_3 | |
| XTENSA_HWVERSION_T1050_4 | |
| XTENSA_HWVERSION_T1050_5 | |
| XTENSA_RELEASE_CANONICAL_NAME | |
| XTENSA_RELEASE_NAME | |
| XTENSA_SWVERSION | |
| XTENSA_SWVERSION_10_0_0 | |
| XTENSA_SWVERSION_10_0_1 | |
| XTENSA_SWVERSION_10_0_2 | |
| XTENSA_SWVERSION_10_0_3 | |
| XTENSA_SWVERSION_10_0_4 | |
| XTENSA_SWVERSION_10_0_5 | |
| XTENSA_SWVERSION_10_0_6 | |
| XTENSA_SWVERSION_11_0_0 | |
| XTENSA_SWVERSION_11_0_1 | |
| XTENSA_SWVERSION_11_0_2 | |
| XTENSA_SWVERSION_11_0_3 | |
| XTENSA_SWVERSION_12_0_0 | |
| XTENSA_SWVERSION_6_0_0 | |
| XTENSA_SWVERSION_6_0_1 | |
| XTENSA_SWVERSION_6_0_2 | |
| XTENSA_SWVERSION_6_0_3 | |
| XTENSA_SWVERSION_6_0_4 | |
| XTENSA_SWVERSION_6_0_5 | |
| XTENSA_SWVERSION_6_0_6 | |
| XTENSA_SWVERSION_6_0_7 | |
| XTENSA_SWVERSION_6_0_8 | |
| XTENSA_SWVERSION_7_0_0 | |
| XTENSA_SWVERSION_7_0_1 | |
| XTENSA_SWVERSION_7_1_0 | |
| XTENSA_SWVERSION_7_1_1 | |
| XTENSA_SWVERSION_7_1_2 | |
| XTENSA_SWVERSION_7_1_3 | |
| XTENSA_SWVERSION_7_1_8_MP | |
| XTENSA_SWVERSION_8_0_0 | |
| XTENSA_SWVERSION_8_0_1 | |
| XTENSA_SWVERSION_8_0_2 | |
| XTENSA_SWVERSION_8_0_3 | |
| XTENSA_SWVERSION_9_0_0 | |
| XTENSA_SWVERSION_9_0_1 | |
| XTENSA_SWVERSION_9_0_2 | |
| XTENSA_SWVERSION_9_0_3 | |
| XTENSA_SWVERSION_9_0_4 | |
| XTENSA_SWVERSION_9_0_5 | |
| XTENSA_SWVERSION_CANONICAL_NAME | |
| XTENSA_SWVERSION_LICENSE_NAME | |
| XTENSA_SWVERSION_MAJORMID_NAME | |
| XTENSA_SWVERSION_MAJOR_NAME | |
| XTENSA_SWVERSION_NAME | |
| XTENSA_SWVERSION_RA_2004_1 | |
| XTENSA_SWVERSION_RA_2005_1 | |
| XTENSA_SWVERSION_RA_2005_2 | |
| XTENSA_SWVERSION_RA_2005_3 | |
| XTENSA_SWVERSION_RA_2006_4 | |
| XTENSA_SWVERSION_RA_2006_5 | |
| XTENSA_SWVERSION_RA_2006_6 | |
| XTENSA_SWVERSION_RA_2007_7 | |
| XTENSA_SWVERSION_RA_2008_8 | |
| XTENSA_SWVERSION_RB_2006_0 | |
| XTENSA_SWVERSION_RB_2007_1 | |
| XTENSA_SWVERSION_RB_2007_2 | |
| XTENSA_SWVERSION_RB_2007_2_MP | |
| XTENSA_SWVERSION_RB_2008_3 | |
| XTENSA_SWVERSION_RB_2008_4 | |
| XTENSA_SWVERSION_RB_2009_5 | |
| XTENSA_SWVERSION_RC_2009_0 | |
| XTENSA_SWVERSION_RC_2010_1 | |
| XTENSA_SWVERSION_RC_2010_2 | |
| XTENSA_SWVERSION_RC_2011_3 | |
| XTENSA_SWVERSION_RD_2010_0 | |
| XTENSA_SWVERSION_RD_2011_1 | |
| XTENSA_SWVERSION_RD_2011_2 | |
| XTENSA_SWVERSION_RD_2011_3 | |
| XTENSA_SWVERSION_RD_2012_4 | |
| XTENSA_SWVERSION_RD_2012_5 | |
| XTENSA_SWVERSION_RE_2012_0 | |
| XTENSA_SWVERSION_RE_2012_1 | |
| XTENSA_SWVERSION_RE_2013_2 | |
| XTENSA_SWVERSION_RE_2013_3 | |
| XTENSA_SWVERSION_RE_2013_4 | |
| XTENSA_SWVERSION_RE_2014_5 | |
| XTENSA_SWVERSION_RE_2015_6 | |
| XTENSA_SWVERSION_RF_2014_0 | |
| XTENSA_SWVERSION_RF_2014_1 | |
| XTENSA_SWVERSION_RF_2015_2 | |
| XTENSA_SWVERSION_RF_2015_3 | |
| XTENSA_SWVERSION_RG_2015_0 | |
| XTENSA_SWVERSION_T1020_0 | |
| XTENSA_SWVERSION_T1020_1 | |
| XTENSA_SWVERSION_T1020_2B | |
| XTENSA_SWVERSION_T1020_2 | |
| XTENSA_SWVERSION_T1020_3 | |
| XTENSA_SWVERSION_T1020_4 | |
| XTENSA_SWVERSION_T1030_0 | |
| XTENSA_SWVERSION_T1030_1 | |
| XTENSA_SWVERSION_T1030_2 | |
| XTENSA_SWVERSION_T1030_3 | |
| XTENSA_SWVERSION_T1040_0 | |
| XTENSA_SWVERSION_T1040_1 | |
| XTENSA_SWVERSION_T1040_1P | |
| XTENSA_SWVERSION_T1040_1_PREHOTFIX | |
| XTENSA_SWVERSION_T1040_2 | |
| XTENSA_SWVERSION_T1040_3 | |
| XTENSA_SWVERSION_T1050_0 | |
| XTENSA_SWVERSION_T1050_1 | |
| XTENSA_SWVERSION_T1050_2 | |
| XTENSA_SWVERSION_T1050_3 | |
| XTENSA_SWVERSION_T1050_4 | |
| XTENSA_SWVERSION_T1050_5 | |
| XTHAL_ABI_CALL0 | |
| XTHAL_ABI_WINDOWED | |
| XTHAL_AMB_ALLOCATE | |
| XTHAL_AMB_COHERENT | |
| XTHAL_AMB_EXCEPTION | |
| XTHAL_AMB_GUARD | |
| XTHAL_AMB_HITCACHE | |
| XTHAL_AMB_ISOLATE | |
| XTHAL_AMB_WRITETHRU | |
| XTHAL_AM_ALLOCATE | |
| XTHAL_AM_COHERENT | |
| XTHAL_AM_EXCEPTION | |
| XTHAL_AM_GUARD | |
| XTHAL_AM_HITCACHE | |
| XTHAL_AM_ISOLATE | |
| XTHAL_AM_WRITETHRU | |
| XTHAL_BIGENDIAN | |
| XTHAL_CAFLAG_EXACT | |
| XTHAL_CAFLAG_EXPAND | |
| XTHAL_CAFLAG_NO_AUTO_INV | |
| XTHAL_CAFLAG_NO_AUTO_WB | |
| XTHAL_CAFLAG_NO_PARTIAL | |
| XTHAL_CLIB_NEWLIB | |
| XTHAL_CLIB_UCLIBC | |
| XTHAL_CLIB_XCLIB | |
| XTHAL_DCACHE_PREFETCH_L1_OFF | |
| XTHAL_DCACHE_PREFETCH_L1 | |
| XTHAL_DISASM_BUFSIZE | |
| XTHAL_DISASM_OPT_ADDR | |
| XTHAL_DISASM_OPT_ALL | |
| XTHAL_DISASM_OPT_OPCODE | |
| XTHAL_DISASM_OPT_OPHEX | |
| XTHAL_DISASM_OPT_PARMS | |
| XTHAL_FAM_BYPASS | |
| XTHAL_FAM_CACHED | |
| XTHAL_FAM_EXCEPTION | |
| XTHAL_ICACHE_PREFETCH_L1_OFF | |
| XTHAL_ICACHE_PREFETCH_L1 | |
| XTHAL_INST_ILL | |
| XTHAL_INTTYPE_EXTERN_EDGE | |
| XTHAL_INTTYPE_EXTERN_LEVEL | |
| XTHAL_INTTYPE_NMI | |
| XTHAL_INTTYPE_PROFILING | |
| XTHAL_INTTYPE_SOFTWARE | |
| XTHAL_INTTYPE_TIMER | |
| XTHAL_INTTYPE_UNCONFIGURED | |
| XTHAL_INTTYPE_WRITE_ERROR | |
| XTHAL_LAM_BYPASS | |
| XTHAL_LAM_BYPASSG | |
| XTHAL_LAM_CACHED | |
| XTHAL_LAM_CACHED_NOALLOC | |
| XTHAL_LAM_COHCACHED | |
| XTHAL_LAM_EXCEPTION | |
| XTHAL_LAM_ISOLATE | |
| XTHAL_LAM_NACACHED | |
| XTHAL_LAM_NACACHEDG | |
| XTHAL_LITTLEENDIAN | |
| XTHAL_MAJOR_REV | |
| XTHAL_MAX_CPS | |
| XTHAL_MAX_INTERRUPTS | |
| XTHAL_MAX_INTLEVELS | |
| XTHAL_MAX_INTTYPES | |
| XTHAL_MAX_TIMERS | |
| XTHAL_MAYBE | |
| XTHAL_MEMEP_ECC | |
| XTHAL_MEMEP_F_CORRECTABLE | |
| XTHAL_MEMEP_F_DCACHE_DATA | |
| XTHAL_MEMEP_F_DCACHE_TAG | |
| XTHAL_MEMEP_F_ICACHE_DATA | |
| XTHAL_MEMEP_F_ICACHE_TAG | |
| XTHAL_MEMEP_F_LOCAL | |
| XTHAL_MEMEP_PARITY | |
| XTHAL_MINOR_REV | |
| XTHAL_NO_MAPPING | |
| XTHAL_PAM_BYPASS | |
| XTHAL_PAM_BYPASS_BUF | |
| XTHAL_PAM_CACHED_NOALLOC | |
| XTHAL_PAM_WRITEBACK | |
| XTHAL_PAM_WRITEBACK_NOALLOC | |
| XTHAL_PAM_WRITETHRU | |
| XTHAL_PREFETCH_DISABLE | |
| XTHAL_PREFETCH_ENABLE | |
| XTHAL_RELEASE_MAJOR | |
| XTHAL_RELEASE_MINOR | |
| XTHAL_RELEASE_NAME | |
| XTHAL_REL_11 | |
| XTHAL_REL_11_0 | |
| XTHAL_REL_11_0_3 | |
| XTHAL_SAM_BYPASS | |
| XTHAL_SAM_COHWRITEBACK | |
| XTHAL_SAM_EXCEPTION | |
| XTHAL_SAM_ISOLATE | |
| XTHAL_SAM_WRITEBACK | |
| XTHAL_SAM_WRITEBACK_NOALLOC | |
| XTHAL_SAM_WRITETHRU | |
| XTHAL_TIMER_UNASSIGNED | |
| XTHAL_TIMER_UNCONFIGURED | |
| XTOS_COREF_PSO | |
| XTOS_COREF_PSO_SHIFT | |
| XTOS_KEEPON_DEBUG | |
| XTOS_KEEPON_DEBUG_SHIFT | |
| XTOS_KEEPON_MEM | |
| XTOS_KEEPON_MEM_SHIFT | |
| XT_CLIB_CONTEXT_AREA_SIZE | |
| XT_CP0_SA | |
| XT_CPENABLE | |
| XT_CPSTORED | |
| XT_CP_ASA | |
| XT_CP_CS_ST | |
| XT_TIMER_INDEX | |
| XT_USER_SIZE | |
| XT_USE_THREAD_SAFE_CLIB | |
| _ATEXIT_DYNAMIC_ALLOC | |
| _ATEXIT_SIZE | |
| _FSEEK_OPTIMIZATION | |
| _FVWRITE_IN_STREAMIO | |
| _HAVE_CC_INHIBIT_LOOP_TO_LIBCALL | |
| _HAVE_LONG_DOUBLE | |
| _IOFBF | |
| _IOLBF | |
| _IONBF | |
| _LDBL_EQ_DBL | |
| _LIBC_LIMITS_H_ | |
| _MB_LEN_MAX | |
| _MEMCTL_L0IBUF_EN | |
| _MEMCTL_SNOOP_EN | |
| _NANO_FORMATTED_IO | |
| _NEWLIB_VERSION | |
| _NULL | |
| _POSIX2_RE_DUP_MAX | |
| _POSIX_THREADS | |
| _RAND48_ADD | |
| _RAND48_MULT_0 | |
| _RAND48_MULT_1 | |
| _RAND48_MULT_2 | |
| _RAND48_SEED_0 | |
| _RAND48_SEED_1 | |
| _RAND48_SEED_2 | |
| _REENT_ASCTIME_SIZE | |
| _REENT_EMERGENCY_SIZE | |
| _REENT_SIGNAL_SIZE | |
| _UNBUF_STREAM_OPT | |
| _UNIX98_THREAD_MUTEX_ATTRIBUTES | |
| _WANT_REENT_SMALL | |
| _WIDE_ORIENT | |
| __BSD_VISIBLE | |
| __BUFSIZ__ | |
| __CC_SUPPORTS_DYNAMIC_ARRAY_INIT | |
| __CC_SUPPORTS_INLINE | |
| __CC_SUPPORTS_VARADIC_XXX | |
| __CC_SUPPORTS_WARNING | |
| __CC_SUPPORTS___FUNC__ | |
| __CC_SUPPORTS___INLINE | |
| __CC_SUPPORTS___INLINE__ | |
| __GNUCLIKE_ASM | |
| __GNUCLIKE_BUILTIN_CONSTANT_P | |
| __GNUCLIKE_BUILTIN_MEMCPY | |
| __GNUCLIKE_BUILTIN_NEXT_ARG | |
| __GNUCLIKE_BUILTIN_STDARG | |
| __GNUCLIKE_BUILTIN_VAALIST | |
| __GNUCLIKE_BUILTIN_VARARGS | |
| __GNUCLIKE_CTOR_SECTION_HANDLING | |
| __GNUCLIKE___OFFSETOF | |
| __GNUCLIKE___SECTION | |
| __GNUCLIKE___TYPEOF | |
| __GNUC_VA_LIST | |
| __GNUC_VA_LIST_COMPATIBILITY | |
| __ISO_C_VISIBLE | |
| __NEWLIB_H__ | |
| __NEWLIB_MINOR__ | |
| __NEWLIB__ | |
| __POSIX_VISIBLE | |
| __RAND_MAX | |
| __SAPP | |
| __SEOF | |
| __SERR | |
| __SL64 | |
| __SLBF | |
| __SMBF | |
| __SNBF | |
| __SNLK | |
| __SNPT | |
| __SOFF | |
| __SOPT | |
| __SORD | |
| __SRD | |
| __SRW | |
| __SSTR | |
| __SWID | |
| __SWR | |
| __XSI_VISIBLE | |
| ___int8_t_defined | |
| ___int16_t_defined | |
| ___int32_t_defined | |
| ___int64_t_defined | |
| __bool_true_false_are_defined | |
| __have_longlong64 | |
| __int8_t_defined | |
| __int16_t_defined | |
| __int32_t_defined | |
| __int64_t_defined | |
| __int_fast8_t_defined | |
| __int_fast16_t_defined | |
| __int_fast32_t_defined | |
| __int_fast64_t_defined | |
| __int_least8_t_defined | |
| __int_least16_t_defined | |
| __int_least32_t_defined | |
| __int_least64_t_defined | |
| adc1_channel_t_ADC1_CHANNEL_MAX | |
| adc1_channel_t_ADC1_CHANNEL_0 | < ADC1 channel 0 is GPIO36
|
| adc1_channel_t_ADC1_CHANNEL_1 | < ADC1 channel 1 is GPIO37
|
| adc1_channel_t_ADC1_CHANNEL_2 | < ADC1 channel 2 is GPIO38
|
| adc1_channel_t_ADC1_CHANNEL_3 | < ADC1 channel 3 is GPIO39
|
| adc1_channel_t_ADC1_CHANNEL_4 | < ADC1 channel 4 is GPIO32
|
| adc1_channel_t_ADC1_CHANNEL_5 | < ADC1 channel 5 is GPIO33
|
| adc1_channel_t_ADC1_CHANNEL_6 | < ADC1 channel 6 is GPIO34
|
| adc1_channel_t_ADC1_CHANNEL_7 | < ADC1 channel 7 is GPIO35
|
| adc2_channel_t_ADC2_CHANNEL_MAX | |
| adc2_channel_t_ADC2_CHANNEL_0 | < ADC2 channel 0 is GPIO4
|
| adc2_channel_t_ADC2_CHANNEL_1 | < ADC2 channel 1 is GPIO0
|
| adc2_channel_t_ADC2_CHANNEL_2 | < ADC2 channel 2 is GPIO2
|
| adc2_channel_t_ADC2_CHANNEL_3 | < ADC2 channel 3 is GPIO15
|
| adc2_channel_t_ADC2_CHANNEL_4 | < ADC2 channel 4 is GPIO13
|
| adc2_channel_t_ADC2_CHANNEL_5 | < ADC2 channel 5 is GPIO12
|
| adc2_channel_t_ADC2_CHANNEL_6 | < ADC2 channel 6 is GPIO14
|
| adc2_channel_t_ADC2_CHANNEL_7 | < ADC2 channel 7 is GPIO27
|
| adc2_channel_t_ADC2_CHANNEL_8 | < ADC2 channel 8 is GPIO25
|
| adc2_channel_t_ADC2_CHANNEL_9 | < ADC2 channel 9 is GPIO26
|
| adc_atten_t_ADC_ATTEN_DB_0 | <The input voltage of ADC will be reduced to about 1/1
|
| adc_atten_t_ADC_ATTEN_DB_6 | <The input voltage of ADC will be reduced to about 1/2
|
| adc_atten_t_ADC_ATTEN_DB_11 | <The input voltage of ADC will be reduced to about 1/3.6
|
| adc_atten_t_ADC_ATTEN_DB_2_5 | <The input voltage of ADC will be reduced to about 1/1.34
|
| adc_atten_t_ADC_ATTEN_MAX | |
| adc_bits_width_t_ADC_WIDTH_BIT_9 | < ADC capture width is 9Bit
|
| adc_bits_width_t_ADC_WIDTH_BIT_10 | < ADC capture width is 10Bit
|
| adc_bits_width_t_ADC_WIDTH_BIT_11 | < ADC capture width is 11Bit
|
| adc_bits_width_t_ADC_WIDTH_BIT_12 | < ADC capture width is 12Bit
|
| adc_bits_width_t_ADC_WIDTH_MAX | |
| adc_channel_t_ADC_CHANNEL_0 | < ADC channel
|
| adc_channel_t_ADC_CHANNEL_1 | < ADC channel
|
| adc_channel_t_ADC_CHANNEL_2 | < ADC channel
|
| adc_channel_t_ADC_CHANNEL_3 | < ADC channel
|
| adc_channel_t_ADC_CHANNEL_4 | < ADC channel
|
| adc_channel_t_ADC_CHANNEL_5 | < ADC channel
|
| adc_channel_t_ADC_CHANNEL_6 | < ADC channel
|
| adc_channel_t_ADC_CHANNEL_7 | < ADC channel
|
| adc_channel_t_ADC_CHANNEL_8 | < ADC channel
|
| adc_channel_t_ADC_CHANNEL_9 | < ADC channel
|
| adc_channel_t_ADC_CHANNEL_MAX | |
| adc_i2s_encode_t_ADC_ENCODE_MAX | |
| adc_i2s_encode_t_ADC_ENCODE_11BIT | < ADC to I2S data format, [15]-1 [14:11]-channel [10:0]-11 bits ADC data
|
| adc_i2s_encode_t_ADC_ENCODE_12BIT | < ADC to I2S data format, [15:12]-channel [11:0]-12 bits ADC data
|
| adc_i2s_source_t_ADC_I2S_DATA_SRC_IO_SIG | < I2S data from GPIO matrix signal
|
| adc_i2s_source_t_ADC_I2S_DATA_SRC_ADC | < I2S data from ADC
|
| adc_i2s_source_t_ADC_I2S_DATA_SRC_MAX | |
| adc_unit_t_ADC_UNIT_1 | < SAR ADC 1
|
| adc_unit_t_ADC_UNIT_2 | < SAR ADC 2, not supported yet
|
| adc_unit_t_ADC_UNIT_ALTER | < SAR ADC 1 and 2 alternative mode, not supported yet
|
| adc_unit_t_ADC_UNIT_BOTH | < SAR ADC 1 and 2, not supported yet
|
| adc_unit_t_ADC_UNIT_MAX | |
| can_mode_t_CAN_MODE_LISTEN_ONLY | < The CAN controller will not influence the bus (No transmissions or acknowledgments) but can receive messages
|
| can_mode_t_CAN_MODE_NORMAL | < Normal operating mode where CAN controller can send/receive/acknowledge messages
|
| can_mode_t_CAN_MODE_NO_ACK | < Transmission does not require acknowledgment. Use this mode for self testing
|
| can_state_t_CAN_STATE_BUS_OFF | < Bus-off state. The CAN controller cannot participate in bus activities until it has recovered
|
| can_state_t_CAN_STATE_RECOVERING | < Recovering state. The CAN controller is undergoing bus recovery
|
| can_state_t_CAN_STATE_RUNNING | < Running state. The CAN controller can transmit and receive messages
|
| can_state_t_CAN_STATE_STOPPED | < Stopped state. The CAN controller will not participate in any CAN bus activities
|
| configAPPLICATION_ALLOCATED_HEAP | |
| configASSERT_2 | |
| configASSERT_DEFINED | |
| configBENCHMARK | |
| configCHECK_FOR_STACK_OVERFLOW | |
| configENABLE_BACKWARD_COMPATIBILITY | |
| configENABLE_TASK_SNAPSHOT | |
| configESP32_PER_TASK_DATA | |
| configEXPECTED_IDLE_TIME_BEFORE_SLEEP | |
| configGENERATE_RUN_TIME_STATS | |
| configIDLE_SHOULD_YIELD | |
| configIDLE_TASK_STACK_SIZE | |
| configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS | |
| configISR_STACK_SIZE | |
| configKERNEL_INTERRUPT_PRIORITY | |
| configMAX_CO_ROUTINE_PRIORITIES | |
| configMAX_PRIORITIES | |
| configMAX_SYSCALL_INTERRUPT_PRIORITY | |
| configMAX_TASK_NAME_LEN | |
| configMINIMAL_STACK_SIZE | |
| configNUM_THREAD_LOCAL_STORAGE_POINTERS | |
| configQUEUE_REGISTRY_SIZE | |
| configSUPPORT_DYNAMIC_ALLOCATION | |
| configTASKLIST_INCLUDE_COREID | |
| configTHREAD_LOCAL_STORAGE_DELETE_CALLBACKS | |
| configTICK_RATE_HZ | |
| configTIMER_QUEUE_LENGTH | |
| configTIMER_TASK_PRIORITY | |
| configTIMER_TASK_STACK_DEPTH | |
| configUSE_16_BIT_TICKS | |
| configUSE_ALTERNATIVE_API | |
| configUSE_APPLICATION_TASK_TAG | |
| configUSE_COUNTING_SEMAPHORES | |
| configUSE_CO_ROUTINES | |
| configUSE_IDLE_HOOK | |
| configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES | |
| configUSE_MALLOC_FAILED_HOOK | |
| configUSE_MUTEX | |
| configUSE_MUTEXES | |
| configUSE_NEWLIB_REENTRANT | |
| configUSE_PORT_OPTIMISED_TASK_SELECTION | |
| configUSE_PREEMPTION | |
| configUSE_QUEUE_SETS | |
| configUSE_RECURSIVE_MUTEXES | |
| configUSE_STATS_FORMATTING_FUNCTIONS | |
| configUSE_TASK_NOTIFICATIONS | |
| configUSE_TICK_HOOK | |
| configUSE_TIMERS | |
| configUSE_TIME_SLICING | |
| configUSE_TRACE_FACILITY | |
| configUSE_TRACE_FACILITY_2 | |
| configXT_BOARD | |
| configXT_SIMULATOR | |
| dac_channel_t_DAC_CHANNEL_1 | < DAC channel 1 is GPIO25
|
| dac_channel_t_DAC_CHANNEL_2 | < DAC channel 2 is GPIO26
|
| dac_channel_t_DAC_CHANNEL_MAX | |
| eNotifyAction_eIncrement | < Increment the task's notification value.
|
| eNotifyAction_eNoAction | < Notify the task without updating its notify value.
|
| eNotifyAction_eSetBits | < Set bits in the task's notification value.
|
| eNotifyAction_eSetValueWithOverwrite | < Set the task's notification value to a specific value even if the previous value has not yet been read by the task.
|
| eNotifyAction_eSetValueWithoutOverwrite | < Set the task's notification value if the previous value has been read by the task.
|
| eSleepModeStatus_eAbortSleep | < A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode.
|
| eSleepModeStatus_eNoTasksWaitingTimeout | < No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt.
|
| eSleepModeStatus_eStandardSleep | < Enter a sleep mode that will not last any longer than the expected idle time.
|
| eTaskState_eBlocked | < The task being queried is in the Blocked state.
|
| eTaskState_eDeleted | < The task being queried has been deleted, but its TCB has not yet been freed.
|
| eTaskState_eReady | < The task being queried is in a read or pending ready list.
|
| eTaskState_eRunning | < A task is querying the state of itself, so must be running.
|
| eTaskState_eSuspended | < The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out.
|
| errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY | |
| errQUEUE_BLOCKED | |
| errQUEUE_YIELD | |
| esp_chip_model_t_CHIP_ESP32 | !< ESP32
|
| esp_mac_type_t_ESP_MAC_BT | |
| esp_mac_type_t_ESP_MAC_ETH | |
| esp_mac_type_t_ESP_MAC_WIFI_SOFTAP | |
| esp_mac_type_t_ESP_MAC_WIFI_STA | |
| esp_reset_reason_t_ESP_RST_BROWNOUT | !< Brownout reset (software or hardware)
|
| esp_reset_reason_t_ESP_RST_DEEPSLEEP | !< Reset after exiting deep sleep mode
|
| esp_reset_reason_t_ESP_RST_EXT | !< Reset by external pin (not applicable for ESP32)
|
| esp_reset_reason_t_ESP_RST_INT_WDT | !< Reset (software or hardware) due to interrupt watchdog
|
| esp_reset_reason_t_ESP_RST_PANIC | !< Software reset due to exception/panic
|
| esp_reset_reason_t_ESP_RST_POWERON | !< Reset due to power-on event
|
| esp_reset_reason_t_ESP_RST_SDIO | !< Reset over SDIO
|
| esp_reset_reason_t_ESP_RST_SW | !< Software reset via esp_restart
|
| esp_reset_reason_t_ESP_RST_TASK_WDT | !< Reset due to task watchdog
|
| esp_reset_reason_t_ESP_RST_UNKNOWN | !< Reset reason can not be determined
|
| esp_reset_reason_t_ESP_RST_WDT | !< Reset due to other watchdogs
|
| esp_sleep_ext1_wakeup_mode_t_ESP_EXT1_WAKEUP_ALL_LOW | !< Wake the chip when all selected GPIOs go low
|
| esp_sleep_ext1_wakeup_mode_t_ESP_EXT1_WAKEUP_ANY_HIGH | !< Wake the chip when any of the selected GPIOs go high
|
| esp_sleep_pd_domain_t_ESP_PD_DOMAIN_MAX | !< Number of domains
|
| esp_sleep_pd_domain_t_ESP_PD_DOMAIN_RTC_FAST_MEM | !< RTC fast memory
|
| esp_sleep_pd_domain_t_ESP_PD_DOMAIN_RTC_PERIPH | !< RTC IO, sensors and ULP co-processor
|
| esp_sleep_pd_domain_t_ESP_PD_DOMAIN_RTC_SLOW_MEM | !< RTC slow memory
|
| esp_sleep_pd_domain_t_ESP_PD_DOMAIN_XTAL | !< XTAL oscillator
|
| esp_sleep_pd_option_t_ESP_PD_OPTION_AUTO | !< Keep power domain enabled in sleep mode, if it is needed by one of the wakeup options. Otherwise power it down.
|
| esp_sleep_pd_option_t_ESP_PD_OPTION_OFF | !< Power down the power domain in sleep mode
|
| esp_sleep_pd_option_t_ESP_PD_OPTION_ON | !< Keep power domain enabled during sleep mode
|
| esp_sleep_source_t_ESP_SLEEP_WAKEUP_ALL | !< Not a wakeup cause, used to disable all wakeup sources with esp_sleep_disable_wakeup_source
|
| esp_sleep_source_t_ESP_SLEEP_WAKEUP_EXT0 | !< Wakeup caused by external signal using RTC_IO
|
| esp_sleep_source_t_ESP_SLEEP_WAKEUP_EXT1 | !< Wakeup caused by external signal using RTC_CNTL
|
| esp_sleep_source_t_ESP_SLEEP_WAKEUP_GPIO | !< Wakeup caused by GPIO (light sleep only)
|
| esp_sleep_source_t_ESP_SLEEP_WAKEUP_TIMER | !< Wakeup caused by timer
|
| esp_sleep_source_t_ESP_SLEEP_WAKEUP_TOUCHPAD | !< Wakeup caused by touchpad
|
| esp_sleep_source_t_ESP_SLEEP_WAKEUP_UART | !< Wakeup caused by UART (light sleep only)
|
| esp_sleep_source_t_ESP_SLEEP_WAKEUP_ULP | !< Wakeup caused by ULP program
|
| esp_sleep_source_t_ESP_SLEEP_WAKEUP_UNDEFINED | !< In case of deep sleep, reset was not caused by exit from deep sleep
|
| esp_timer_dispatch_t_ESP_TIMER_TASK | !< Callback is called from timer task
|
| false_ | |
| gpio_drive_cap_t_GPIO_DRIVE_CAP_0 | < Pad drive capability: weak
|
| gpio_drive_cap_t_GPIO_DRIVE_CAP_1 | < Pad drive capability: stronger
|
| gpio_drive_cap_t_GPIO_DRIVE_CAP_2 | < Pad drive capability: default value
|
| gpio_drive_cap_t_GPIO_DRIVE_CAP_3 | < Pad drive capability: strongest
|
| gpio_drive_cap_t_GPIO_DRIVE_CAP_DEFAULT | < Pad drive capability: default value
|
| gpio_drive_cap_t_GPIO_DRIVE_CAP_MAX | |
| gpio_int_type_t_GPIO_INTR_ANYEDGE | < GPIO interrupt type : both rising and falling edge
|
| gpio_int_type_t_GPIO_INTR_DISABLE | < Disable GPIO interrupt
|
| gpio_int_type_t_GPIO_INTR_HIGH_LEVEL | < GPIO interrupt type : input high level trigger
|
| gpio_int_type_t_GPIO_INTR_LOW_LEVEL | < GPIO interrupt type : input low level trigger
|
| gpio_int_type_t_GPIO_INTR_MAX | |
| gpio_int_type_t_GPIO_INTR_NEGEDGE | < GPIO interrupt type : falling edge
|
| gpio_int_type_t_GPIO_INTR_POSEDGE | < GPIO interrupt type : rising edge
|
| gpio_mode_t_GPIO_MODE_DISABLE | < GPIO mode : disable input and output
|
| gpio_mode_t_GPIO_MODE_INPUT | < GPIO mode : input only
|
| gpio_mode_t_GPIO_MODE_INPUT_OUTPUT | < GPIO mode : output and input mode
|
| gpio_mode_t_GPIO_MODE_INPUT_OUTPUT_OD | < GPIO mode : output and input with open-drain mode
|
| gpio_mode_t_GPIO_MODE_OUTPUT | < GPIO mode : output only mode
|
| gpio_mode_t_GPIO_MODE_OUTPUT_OD | < GPIO mode : output only with open-drain mode
|
| gpio_num_t_GPIO_NUM_0 | < GPIO0, input and output
|
| gpio_num_t_GPIO_NUM_1 | < GPIO1, input and output
|
| gpio_num_t_GPIO_NUM_2 | < GPIO2, input and output
@note There are more enumerations like that
up to GPIO39, excluding GPIO20, GPIO24 and GPIO28..31.
They are not shown here to reduce redundant information.
@note GPIO34..39 are input mode only.
|
| gpio_num_t_GPIO_NUM_3 | < GPIO3, input and output
|
| gpio_num_t_GPIO_NUM_4 | < GPIO4, input and output
|
| gpio_num_t_GPIO_NUM_5 | < GPIO5, input and output
|
| gpio_num_t_GPIO_NUM_6 | < GPIO6, input and output
|
| gpio_num_t_GPIO_NUM_7 | < GPIO7, input and output
|
| gpio_num_t_GPIO_NUM_8 | < GPIO8, input and output
|
| gpio_num_t_GPIO_NUM_9 | < GPIO9, input and output
|
| gpio_num_t_GPIO_NUM_10 | < GPIO10, input and output
|
| gpio_num_t_GPIO_NUM_11 | < GPIO11, input and output
|
| gpio_num_t_GPIO_NUM_12 | < GPIO12, input and output
|
| gpio_num_t_GPIO_NUM_13 | < GPIO13, input and output
|
| gpio_num_t_GPIO_NUM_14 | < GPIO14, input and output
|
| gpio_num_t_GPIO_NUM_15 | < GPIO15, input and output
|
| gpio_num_t_GPIO_NUM_16 | < GPIO16, input and output
|
| gpio_num_t_GPIO_NUM_17 | < GPIO17, input and output
|
| gpio_num_t_GPIO_NUM_18 | < GPIO18, input and output
|
| gpio_num_t_GPIO_NUM_19 | < GPIO19, input and output
|
| gpio_num_t_GPIO_NUM_21 | < GPIO21, input and output
|
| gpio_num_t_GPIO_NUM_22 | < GPIO22, input and output
|
| gpio_num_t_GPIO_NUM_23 | < GPIO23, input and output
|
| gpio_num_t_GPIO_NUM_25 | < GPIO25, input and output
|
| gpio_num_t_GPIO_NUM_26 | < GPIO26, input and output
|
| gpio_num_t_GPIO_NUM_27 | < GPIO27, input and output
|
| gpio_num_t_GPIO_NUM_32 | < GPIO32, input and output
|
| gpio_num_t_GPIO_NUM_33 | < GPIO33, input and output
|
| gpio_num_t_GPIO_NUM_34 | < GPIO34, input mode only
|
| gpio_num_t_GPIO_NUM_35 | < GPIO35, input mode only
|
| gpio_num_t_GPIO_NUM_36 | < GPIO36, input mode only
|
| gpio_num_t_GPIO_NUM_37 | < GPIO37, input mode only
|
| gpio_num_t_GPIO_NUM_38 | < GPIO38, input mode only
|
| gpio_num_t_GPIO_NUM_39 | < GPIO39, input mode only
|
| gpio_num_t_GPIO_NUM_MAX | |
| gpio_pull_mode_t_GPIO_FLOATING | < Pad floating
|
| gpio_pull_mode_t_GPIO_PULLDOWN_ONLY | < Pad pull down
|
| gpio_pull_mode_t_GPIO_PULLUP_ONLY | < Pad pull up
|
| gpio_pull_mode_t_GPIO_PULLUP_PULLDOWN | < Pad pull up + pull down
|
| gpio_pulldown_t_GPIO_PULLDOWN_DISABLE | < Disable GPIO pull-down resistor
|
| gpio_pulldown_t_GPIO_PULLDOWN_ENABLE | < Enable GPIO pull-down resistor
|
| gpio_pullup_t_GPIO_PULLUP_DISABLE | < Disable GPIO pull-up resistor
|
| gpio_pullup_t_GPIO_PULLUP_ENABLE | < Enable GPIO pull-up resistor
|
| i2c_ack_type_t_I2C_MASTER_ACK | < I2C ack for each byte read
|
| i2c_ack_type_t_I2C_MASTER_NACK | < I2C nack for each byte read
|
| i2c_ack_type_t_I2C_MASTER_LAST_NACK | < I2C nack for the last byte
|
| i2c_ack_type_t_I2C_MASTER_ACK_MAX | |
| i2c_addr_mode_t_I2C_ADDR_BIT_MAX | |
| i2c_addr_mode_t_I2C_ADDR_BIT_7 | < I2C 7bit address for slave mode
|
| i2c_addr_mode_t_I2C_ADDR_BIT_10 | < I2C 10bit address for slave mode
|
| i2c_mode_t_I2C_MODE_SLAVE | < I2C slave mode
|
| i2c_mode_t_I2C_MODE_MASTER | < I2C master mode
|
| i2c_mode_t_I2C_MODE_MAX | |
| i2c_opmode_t_I2C_CMD_RESTART | <I2C restart command
|
| i2c_opmode_t_I2C_CMD_WRITE | <I2C write command
|
| i2c_opmode_t_I2C_CMD_READ | <I2C read command
|
| i2c_opmode_t_I2C_CMD_STOP | <I2C stop command
|
| i2c_opmode_t_I2C_CMD_END | <I2C end command
|
| i2c_port_t_I2C_NUM_MAX | |
| i2c_port_t_I2C_NUM_0 | < I2C port 0
|
| i2c_port_t_I2C_NUM_1 | < I2C port 1
|
| i2c_rw_t_I2C_MASTER_WRITE | < I2C write data
|
| i2c_rw_t_I2C_MASTER_READ | < I2C read data
|
| i2c_trans_mode_t_I2C_DATA_MODE_MSB_FIRST | < I2C data msb first
|
| i2c_trans_mode_t_I2C_DATA_MODE_LSB_FIRST | < I2C data lsb first
|
| i2c_trans_mode_t_I2C_DATA_MODE_MAX | |
| i2s_bits_per_sample_t_I2S_BITS_PER_SAMPLE_8BIT | < I2S bits per sample: 8-bits
|
| i2s_bits_per_sample_t_I2S_BITS_PER_SAMPLE_16BIT | < I2S bits per sample: 16-bits
|
| i2s_bits_per_sample_t_I2S_BITS_PER_SAMPLE_24BIT | < I2S bits per sample: 24-bits
|
| i2s_bits_per_sample_t_I2S_BITS_PER_SAMPLE_32BIT | < I2S bits per sample: 32-bits
|
| i2s_channel_fmt_t_I2S_CHANNEL_FMT_RIGHT_LEFT | |
| i2s_channel_fmt_t_I2S_CHANNEL_FMT_ALL_RIGHT | |
| i2s_channel_fmt_t_I2S_CHANNEL_FMT_ALL_LEFT | |
| i2s_channel_fmt_t_I2S_CHANNEL_FMT_ONLY_RIGHT | |
| i2s_channel_fmt_t_I2S_CHANNEL_FMT_ONLY_LEFT | |
| i2s_channel_t_I2S_CHANNEL_MONO | < I2S 1 channel (mono)
|
| i2s_channel_t_I2S_CHANNEL_STEREO | < I2S 2 channel (stereo)
|
| i2s_comm_format_t_I2S_COMM_FORMAT_PCM | < I2S communication format PCM
|
| i2s_comm_format_t_I2S_COMM_FORMAT_PCM_SHORT | < PCM Short
|
| i2s_comm_format_t_I2S_COMM_FORMAT_PCM_LONG | < PCM Long
|
| i2s_comm_format_t_I2S_COMM_FORMAT_I2S | < I2S communication format I2S
|
| i2s_comm_format_t_I2S_COMM_FORMAT_I2S_MSB | < I2S format MSB
|
| i2s_comm_format_t_I2S_COMM_FORMAT_I2S_LSB | < I2S format LSB
|
| i2s_dac_mode_t_I2S_DAC_CHANNEL_DISABLE | < Disable I2S built-in DAC signals
|
| i2s_dac_mode_t_I2S_DAC_CHANNEL_RIGHT_EN | < Enable I2S built-in DAC right channel, maps to DAC channel 1 on GPIO25
|
| i2s_dac_mode_t_I2S_DAC_CHANNEL_LEFT_EN | < Enable I2S built-in DAC left channel, maps to DAC channel 2 on GPIO26
|
| i2s_dac_mode_t_I2S_DAC_CHANNEL_BOTH_EN | < Enable both of the I2S built-in DAC channels.
|
| i2s_dac_mode_t_I2S_DAC_CHANNEL_MAX | < I2S built-in DAC mode max index
|
| i2s_event_type_t_I2S_EVENT_DMA_ERROR | |
| i2s_event_type_t_I2S_EVENT_TX_DONE | < I2S DMA finish sent 1 buffer
|
| i2s_event_type_t_I2S_EVENT_RX_DONE | < I2S DMA finish received 1 buffer
|
| i2s_event_type_t_I2S_EVENT_MAX | < I2S event max index
|
| i2s_mode_t_I2S_MODE_MASTER | |
| i2s_mode_t_I2S_MODE_SLAVE | |
| i2s_mode_t_I2S_MODE_TX | |
| i2s_mode_t_I2S_MODE_RX | |
| i2s_mode_t_I2S_MODE_DAC_BUILT_IN | < Output I2S data to built-in DAC, no matter the data format is 16bit or 32 bit, the DAC module will only take the 8bits from MSB
|
| i2s_mode_t_I2S_MODE_ADC_BUILT_IN | < Input I2S data from built-in ADC, each data can be 12-bit width at most
|
| i2s_mode_t_I2S_MODE_PDM | |
| i2s_port_t_I2S_NUM_MAX | |
| i2s_port_t_I2S_NUM_0 | < I2S 0
|
| i2s_port_t_I2S_NUM_1 | < I2S 1
|
| ledc_channel_t_LEDC_CHANNEL_0 | < LEDC channel 0
|
| ledc_channel_t_LEDC_CHANNEL_1 | < LEDC channel 1
|
| ledc_channel_t_LEDC_CHANNEL_2 | < LEDC channel 2
|
| ledc_channel_t_LEDC_CHANNEL_3 | < LEDC channel 3
|
| ledc_channel_t_LEDC_CHANNEL_4 | < LEDC channel 4
|
| ledc_channel_t_LEDC_CHANNEL_5 | < LEDC channel 5
|
| ledc_channel_t_LEDC_CHANNEL_6 | < LEDC channel 6
|
| ledc_channel_t_LEDC_CHANNEL_7 | < LEDC channel 7
|
| ledc_channel_t_LEDC_CHANNEL_MAX | |
| ledc_clk_src_t_LEDC_APB_CLK | < LEDC timer clock divided from APB clock (80Mhz)
|
| ledc_clk_src_t_LEDC_REF_TICK | < LEDC timer clock divided from reference tick (1Mhz)
|
| ledc_duty_direction_t_LEDC_DUTY_DIR_DECREASE | < LEDC duty decrease direction
|
| ledc_duty_direction_t_LEDC_DUTY_DIR_INCREASE | < LEDC duty increase direction
|
| ledc_duty_direction_t_LEDC_DUTY_DIR_MAX | |
| ledc_fade_mode_t_LEDC_FADE_MAX | |
| ledc_fade_mode_t_LEDC_FADE_NO_WAIT | < LEDC fade function will return immediately
|
| ledc_fade_mode_t_LEDC_FADE_WAIT_DONE | < LEDC fade function will block until fading to the target duty
|
| ledc_intr_type_t_LEDC_INTR_DISABLE | < Disable LEDC interrupt
|
| ledc_intr_type_t_LEDC_INTR_FADE_END | < Enable LEDC interrupt
|
| ledc_mode_t_LEDC_HIGH_SPEED_MODE | < LEDC high speed speed_mode
|
| ledc_mode_t_LEDC_LOW_SPEED_MODE | < LEDC low speed speed_mode
|
| ledc_mode_t_LEDC_SPEED_MODE_MAX | < LEDC speed limit
|
| ledc_timer_bit_t_LEDC_TIMER_1_BIT | < LEDC PWM duty resolution of 1 bits
|
| ledc_timer_bit_t_LEDC_TIMER_2_BIT | < LEDC PWM duty resolution of 2 bits
|
| ledc_timer_bit_t_LEDC_TIMER_3_BIT | < LEDC PWM duty resolution of 3 bits
|
| ledc_timer_bit_t_LEDC_TIMER_4_BIT | < LEDC PWM duty resolution of 4 bits
|
| ledc_timer_bit_t_LEDC_TIMER_5_BIT | < LEDC PWM duty resolution of 5 bits
|
| ledc_timer_bit_t_LEDC_TIMER_6_BIT | < LEDC PWM duty resolution of 6 bits
|
| ledc_timer_bit_t_LEDC_TIMER_7_BIT | < LEDC PWM duty resolution of 7 bits
|
| ledc_timer_bit_t_LEDC_TIMER_8_BIT | < LEDC PWM duty resolution of 8 bits
|
| ledc_timer_bit_t_LEDC_TIMER_9_BIT | < LEDC PWM duty resolution of 9 bits
|
| ledc_timer_bit_t_LEDC_TIMER_10_BIT | < LEDC PWM duty resolution of 10 bits
|
| ledc_timer_bit_t_LEDC_TIMER_11_BIT | < LEDC PWM duty resolution of 11 bits
|
| ledc_timer_bit_t_LEDC_TIMER_12_BIT | < LEDC PWM duty resolution of 12 bits
|
| ledc_timer_bit_t_LEDC_TIMER_13_BIT | < LEDC PWM duty resolution of 13 bits
|
| ledc_timer_bit_t_LEDC_TIMER_14_BIT | < LEDC PWM duty resolution of 14 bits
|
| ledc_timer_bit_t_LEDC_TIMER_15_BIT | < LEDC PWM duty resolution of 15 bits
|
| ledc_timer_bit_t_LEDC_TIMER_16_BIT | < LEDC PWM duty resolution of 16 bits
|
| ledc_timer_bit_t_LEDC_TIMER_17_BIT | < LEDC PWM duty resolution of 17 bits
|
| ledc_timer_bit_t_LEDC_TIMER_18_BIT | < LEDC PWM duty resolution of 18 bits
|
| ledc_timer_bit_t_LEDC_TIMER_19_BIT | < LEDC PWM duty resolution of 19 bits
|
| ledc_timer_bit_t_LEDC_TIMER_20_BIT | < LEDC PWM duty resolution of 20 bits
|
| ledc_timer_bit_t_LEDC_TIMER_BIT_MAX | |
| ledc_timer_t_LEDC_TIMER_0 | < LEDC timer 0
|
| ledc_timer_t_LEDC_TIMER_1 | < LEDC timer 1
|
| ledc_timer_t_LEDC_TIMER_2 | < LEDC timer 2
|
| ledc_timer_t_LEDC_TIMER_3 | < LEDC timer 3
|
| ledc_timer_t_LEDC_TIMER_MAX | |
| mcpwm_action_on_pwmxa_t_MCPWM_FORCE_MCPWMXA_HIGH | <Make MCPWMXA output high
|
| mcpwm_action_on_pwmxa_t_MCPWM_FORCE_MCPWMXA_LOW | <Make MCPWMXA output low
|
| mcpwm_action_on_pwmxa_t_MCPWM_NO_CHANGE_IN_MCPWMXA | <No change in MCPWMXA output
|
| mcpwm_action_on_pwmxa_t_MCPWM_TOG_MCPWMXA | <Make MCPWMXA output toggle
|
| mcpwm_action_on_pwmxb_t_MCPWM_FORCE_MCPWMXB_HIGH | <Make MCPWMXB output high
|
| mcpwm_action_on_pwmxb_t_MCPWM_FORCE_MCPWMXB_LOW | <Make MCPWMXB output low
|
| mcpwm_action_on_pwmxb_t_MCPWM_NO_CHANGE_IN_MCPWMXB | <No change in MCPWMXB output
|
| mcpwm_action_on_pwmxb_t_MCPWM_TOG_MCPWMXB | <Make MCPWMXB output toggle
|
| mcpwm_capture_on_edge_t_MCPWM_NEG_EDGE | <Capture starts from negative edge
|
| mcpwm_capture_on_edge_t_MCPWM_POS_EDGE | <Capture starts from positive edge
|
| mcpwm_capture_signal_t_MCPWM_SELECT_CAP0 | <Select CAP0 as input
|
| mcpwm_capture_signal_t_MCPWM_SELECT_CAP1 | <Select CAP1 as input
|
| mcpwm_capture_signal_t_MCPWM_SELECT_CAP2 | <Select CAP2 as input
|
| mcpwm_carrier_os_t_MCPWM_ONESHOT_MODE_DIS | <Enable oneshot mode
|
| mcpwm_carrier_os_t_MCPWM_ONESHOT_MODE_EN | <Disable oneshot mode
|
| mcpwm_carrier_out_ivt_t_MCPWM_CARRIER_OUT_IVT_DIS | <Enable carrier output inversion
|
| mcpwm_carrier_out_ivt_t_MCPWM_CARRIER_OUT_IVT_EN | <Disable carrier output inversion
|
| mcpwm_counter_type_t_MCPWM_COUNTER_MAX | <Maximum counter mode
|
| mcpwm_counter_type_t_MCPWM_DOWN_COUNTER | <For asymmetric MCPWM
|
| mcpwm_counter_type_t_MCPWM_UP_COUNTER | <For asymmetric MCPWM
|
| mcpwm_counter_type_t_MCPWM_UP_DOWN_COUNTER | <For symmetric MCPWM, frequency is half of MCPWM frequency set
|
| mcpwm_deadtime_type_t_MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE | <MCPWMXA = rising edge delay, MCPWMXB = compliment of falling edge delay
|
| mcpwm_deadtime_type_t_MCPWM_ACTIVE_HIGH_MODE | <MCPWMXA = rising edge delay, MCPWMXB = falling edge delay
|
| mcpwm_deadtime_type_t_MCPWM_ACTIVE_LOW_COMPLIMENT_MODE | <MCPWMXA = compliment of rising edge delay, MCPWMXB = falling edge delay
|
| mcpwm_deadtime_type_t_MCPWM_ACTIVE_LOW_MODE | <MCPWMXA = compliment of rising edge delay, MCPWMXB = compliment of falling edge delay
|
| mcpwm_deadtime_type_t_MCPWM_ACTIVE_RED_FED_FROM_PWMXA | <MCPWMXA = MCPWMXB = rising edge delay as well as falling edge delay, generated from MCPWMXA
|
| mcpwm_deadtime_type_t_MCPWM_ACTIVE_RED_FED_FROM_PWMXB | <MCPWMXA = MCPWMXB = rising edge delay as well as falling edge delay, generated from MCPWMXB
|
| mcpwm_deadtime_type_t_MCPWM_BYPASS_FED | <MCPWMXA = rising edge delay, MCPWMXB = no change
|
| mcpwm_deadtime_type_t_MCPWM_BYPASS_RED | <MCPWMXA = no change, MCPWMXB = falling edge delay
|
| mcpwm_deadtime_type_t_MCPWM_DEADTIME_TYPE_MAX | |
| mcpwm_duty_type_t_MCPWM_DUTY_MODE_0 | <Active high duty, i.e. duty cycle proportional to high time for asymmetric MCPWM
|
| mcpwm_duty_type_t_MCPWM_DUTY_MODE_1 | <Active low duty, i.e. duty cycle proportional to low time for asymmetric MCPWM, out of phase(inverted) MCPWM
|
| mcpwm_duty_type_t_MCPWM_DUTY_MODE_MAX | <Num of duty cycle modes
|
| mcpwm_fault_input_level_t_MCPWM_HIGH_LEVEL_TGR | <Fault condition occurs when fault input signal goes low to high
|
| mcpwm_fault_input_level_t_MCPWM_LOW_LEVEL_TGR | <Fault condition occurs when fault input signal goes from high to low, currently not supported
|
| mcpwm_fault_signal_t_MCPWM_SELECT_F0 | <Select F0 as input
|
| mcpwm_fault_signal_t_MCPWM_SELECT_F1 | <Select F1 as input
|
| mcpwm_fault_signal_t_MCPWM_SELECT_F2 | <Select F2 as input
|
| mcpwm_io_signals_t_MCPWM0A | <PWM0A output pin
|
| mcpwm_io_signals_t_MCPWM0B | <PWM0B output pin
|
| mcpwm_io_signals_t_MCPWM1A | <PWM1A output pin
|
| mcpwm_io_signals_t_MCPWM1B | <PWM1B output pin
|
| mcpwm_io_signals_t_MCPWM2A | <PWM2A output pin
|
| mcpwm_io_signals_t_MCPWM2B | <PWM2B output pin
|
| mcpwm_io_signals_t_MCPWM_CAP_0 | <CAP0 input pin
|
| mcpwm_io_signals_t_MCPWM_CAP_1 | <CAP1 input pin
|
| mcpwm_io_signals_t_MCPWM_CAP_2 | <CAP2 input pin
|
| mcpwm_io_signals_t_MCPWM_FAULT_0 | <FAULT0 input pin
|
| mcpwm_io_signals_t_MCPWM_FAULT_1 | <FAULT1 input pin
|
| mcpwm_io_signals_t_MCPWM_FAULT_2 | <FAULT2 input pin
|
| mcpwm_io_signals_t_MCPWM_SYNC_0 | <SYNC0 input pin
|
| mcpwm_io_signals_t_MCPWM_SYNC_1 | <SYNC1 input pin
|
| mcpwm_io_signals_t_MCPWM_SYNC_2 | <SYNC2 input pin
|
| mcpwm_operator_t_MCPWM_OPR_A | <Select MCPWMXA, where 'X' is timer number
|
| mcpwm_operator_t_MCPWM_OPR_B | <Select MCPWMXB, where 'X' is timer number
|
| mcpwm_operator_t_MCPWM_OPR_MAX | <Num of operators to each timer of MCPWM
|
| mcpwm_sync_signal_t_MCPWM_SELECT_SYNC0 | <Select SYNC0 as input
|
| mcpwm_sync_signal_t_MCPWM_SELECT_SYNC1 | <Select SYNC1 as input
|
| mcpwm_sync_signal_t_MCPWM_SELECT_SYNC2 | <Select SYNC2 as input
|
| mcpwm_timer_t_MCPWM_TIMER_0 | <Select MCPWM timer0
|
| mcpwm_timer_t_MCPWM_TIMER_1 | <Select MCPWM timer1
|
| mcpwm_timer_t_MCPWM_TIMER_2 | <Select MCPWM timer2
|
| mcpwm_timer_t_MCPWM_TIMER_MAX | <Num of MCPWM timers on ESP32
|
| mcpwm_unit_t_MCPWM_UNIT_0 | <MCPWM unit0 selected
|
| mcpwm_unit_t_MCPWM_UNIT_1 | <MCPWM unit1 selected
|
| mcpwm_unit_t_MCPWM_UNIT_MAX | <Num of MCPWM units on ESP32
|
| pdINTEGRITY_CHECK_VALUE | |
| pdm_pcm_conv_t_PDM_PCM_CONV_DISABLE | |
| pdm_pcm_conv_t_PDM_PCM_CONV_ENABLE | |
| pdm_sample_rate_ratio_t_PDM_SAMPLE_RATE_RATIO_64 | |
| pdm_sample_rate_ratio_t_PDM_SAMPLE_RATE_RATIO_128 | |
| periph_module_t_PERIPH_AES_MODULE | |
| periph_module_t_PERIPH_BT_BASEBAND_MODULE | |
| periph_module_t_PERIPH_BT_LC_MODULE | |
| periph_module_t_PERIPH_BT_MODULE | |
| periph_module_t_PERIPH_CAN_MODULE | |
| periph_module_t_PERIPH_EMAC_MODULE | |
| periph_module_t_PERIPH_HSPI_MODULE | |
| periph_module_t_PERIPH_I2C0_MODULE | |
| periph_module_t_PERIPH_I2C1_MODULE | |
| periph_module_t_PERIPH_I2S0_MODULE | |
| periph_module_t_PERIPH_I2S1_MODULE | |
| periph_module_t_PERIPH_LEDC_MODULE | |
| periph_module_t_PERIPH_PCNT_MODULE | |
| periph_module_t_PERIPH_PWM0_MODULE | |
| periph_module_t_PERIPH_PWM1_MODULE | |
| periph_module_t_PERIPH_PWM2_MODULE | |
| periph_module_t_PERIPH_PWM3_MODULE | |
| periph_module_t_PERIPH_RMT_MODULE | |
| periph_module_t_PERIPH_RNG_MODULE | |
| periph_module_t_PERIPH_RSA_MODULE | |
| periph_module_t_PERIPH_SDIO_SLAVE_MODULE | |
| periph_module_t_PERIPH_SDMMC_MODULE | |
| periph_module_t_PERIPH_SHA_MODULE | |
| periph_module_t_PERIPH_SPI_DMA_MODULE | |
| periph_module_t_PERIPH_SPI_MODULE | |
| periph_module_t_PERIPH_TIMG0_MODULE | |
| periph_module_t_PERIPH_TIMG1_MODULE | |
| periph_module_t_PERIPH_UART0_MODULE | |
| periph_module_t_PERIPH_UART1_MODULE | |
| periph_module_t_PERIPH_UART2_MODULE | |
| periph_module_t_PERIPH_UHCI0_MODULE | |
| periph_module_t_PERIPH_UHCI1_MODULE | |
| periph_module_t_PERIPH_VSPI_MODULE | |
| periph_module_t_PERIPH_WIFI_BT_COMMON_MODULE | |
| periph_module_t_PERIPH_WIFI_MODULE | |
| portBYTE_ALIGNMENT | |
| portBYTE_ALIGNMENT_MASK | |
| portCRITICAL_NESTING_IN_TCB | |
| portMUX_FREE_VAL | |
| portMUX_NO_TIMEOUT | |
| portMUX_TRY_LOCK | |
| portNUM_CONFIGURABLE_REGIONS | |
| portNUM_PROCESSORS | |
| portSTACK_GROWTH | |
| portStackMemoryCaps | |
| portTICK_TYPE_IS_ATOMIC | |
| portTcbMemoryCaps | |
| portUSING_MPU_WRAPPERS | |
| ringbuf_type_t_RINGBUF_TYPE_ALLOWSPLIT | Allow-split buffers will split an item into two parts if necessary in
order to store it. Each item requires an 8 byte overhead for a header,
splitting incurs an extra header. Each item will always internally occupy
a 32-bit aligned size of space.
|
| ringbuf_type_t_RINGBUF_TYPE_BYTEBUF | Byte buffers store data as a sequence of bytes and do not maintain separate
items, therefore byte buffers have no overhead. All data is stored as a
sequence of byte and any number of bytes can be sent or retrieved each
time.
|
| ringbuf_type_t_RINGBUF_TYPE_NOSPLIT | No-split buffers will only store an item in contiguous memory and will
never split an item. Each item requires an 8 byte overhead for a header
and will always internally occupy a 32-bit aligned size of space.
|
| rmt_carrier_level_t_RMT_CARRIER_LEVEL_HIGH | < RMT carrier wave is modulated for high Level output
|
| rmt_carrier_level_t_RMT_CARRIER_LEVEL_LOW | < RMT carrier wave is modulated for low Level output
|
| rmt_carrier_level_t_RMT_CARRIER_LEVEL_MAX | |
| rmt_channel_t_RMT_CHANNEL_0 | < RMT Channel 0
|
| rmt_channel_t_RMT_CHANNEL_1 | < RMT Channel 1
|
| rmt_channel_t_RMT_CHANNEL_2 | < RMT Channel 2
|
| rmt_channel_t_RMT_CHANNEL_3 | < RMT Channel 3
|
| rmt_channel_t_RMT_CHANNEL_4 | < RMT Channel 4
|
| rmt_channel_t_RMT_CHANNEL_5 | < RMT Channel 5
|
| rmt_channel_t_RMT_CHANNEL_6 | < RMT Channel 6
|
| rmt_channel_t_RMT_CHANNEL_7 | < RMT Channel 7
|
| rmt_channel_t_RMT_CHANNEL_MAX | |
| rmt_data_mode_t_RMT_DATA_MODE_FIFO | |
| rmt_data_mode_t_RMT_DATA_MODE_MAX | |
| rmt_data_mode_t_RMT_DATA_MODE_MEM | |
| rmt_idle_level_t_RMT_IDLE_LEVEL_HIGH | < RMT TX idle level: high Level
|
| rmt_idle_level_t_RMT_IDLE_LEVEL_LOW | < RMT TX idle level: low Level
|
| rmt_idle_level_t_RMT_IDLE_LEVEL_MAX | |
| rmt_mem_owner_t_RMT_MEM_OWNER_MAX | |
| rmt_mem_owner_t_RMT_MEM_OWNER_RX | < RMT RX mode, RMT receiver owns the memory block
|
| rmt_mem_owner_t_RMT_MEM_OWNER_TX | < RMT RX mode, RMT transmitter owns the memory block
|
| rmt_mode_t_RMT_MODE_MAX | |
| rmt_mode_t_RMT_MODE_RX | < RMT RX mode
|
| rmt_mode_t_RMT_MODE_TX | < RMT TX mode
|
| rmt_source_clk_t_RMT_BASECLK_APB | < RMT source clock is APB CLK, 80Mhz by default
|
| rmt_source_clk_t_RMT_BASECLK_MAX | |
| rmt_source_clk_t_RMT_BASECLK_REF | < RMT source clock system reference tick, 1MHz by default (not supported in this version)
|
| spi_host_device_t_HSPI_HOST | < SPI2, HSPI
|
| spi_host_device_t_SPI_HOST | < SPI1, SPI
|
| spi_host_device_t_VSPI_HOST | < SPI3, VSPI
|
| timer_alarm_t_TIMER_ALARM_DIS | < Disable timer alarm
|
| timer_alarm_t_TIMER_ALARM_EN | < Enable timer alarm
|
| timer_alarm_t_TIMER_ALARM_MAX | |
| timer_autoreload_t_TIMER_AUTORELOAD_DIS | < Disable auto-reload: hardware will not load counter value after an alarm event
|
| timer_autoreload_t_TIMER_AUTORELOAD_EN | < Enable auto-reload: hardware will load counter value after an alarm event
|
| timer_autoreload_t_TIMER_AUTORELOAD_MAX | |
| timer_count_dir_t_TIMER_COUNT_DOWN | < Descending Count from cnt.high|cnt.low
|
| timer_count_dir_t_TIMER_COUNT_MAX | |
| timer_count_dir_t_TIMER_COUNT_UP | < Ascending Count from Zero
|
| timer_group_t_TIMER_GROUP_0 | <Hw timer group 0
|
| timer_group_t_TIMER_GROUP_1 | <Hw timer group 1
|
| timer_group_t_TIMER_GROUP_MAX | |
| timer_idx_t_TIMER_0 | <Select timer0 of GROUPx
|
| timer_idx_t_TIMER_1 | <Select timer1 of GROUPx
|
| timer_idx_t_TIMER_MAX | |
| timer_intr_mode_t_TIMER_INTR_LEVEL | < Interrupt mode: level mode
|
| timer_intr_mode_t_TIMER_INTR_MAX | |
| timer_start_t_TIMER_PAUSE | <Pause timer counter
|
| timer_start_t_TIMER_START | <Start timer counter
|
| touch_cnt_slope_t_TOUCH_PAD_SLOPE_0 | <Touch sensor charge / discharge speed, always zero
|
| touch_cnt_slope_t_TOUCH_PAD_SLOPE_1 | <Touch sensor charge / discharge speed, slowest
|
| touch_cnt_slope_t_TOUCH_PAD_SLOPE_2 | <Touch sensor charge / discharge speed
|
| touch_cnt_slope_t_TOUCH_PAD_SLOPE_3 | <Touch sensor charge / discharge speed
|
| touch_cnt_slope_t_TOUCH_PAD_SLOPE_4 | <Touch sensor charge / discharge speed
|
| touch_cnt_slope_t_TOUCH_PAD_SLOPE_5 | <Touch sensor charge / discharge speed
|
| touch_cnt_slope_t_TOUCH_PAD_SLOPE_6 | <Touch sensor charge / discharge speed
|
| touch_cnt_slope_t_TOUCH_PAD_SLOPE_7 | <Touch sensor charge / discharge speed, fast
|
| touch_cnt_slope_t_TOUCH_PAD_SLOPE_MAX | |
| touch_fsm_mode_t_TOUCH_FSM_MODE_MAX | |
| touch_fsm_mode_t_TOUCH_FSM_MODE_SW | <To start touch FSM by software trigger
|
| touch_fsm_mode_t_TOUCH_FSM_MODE_TIMER | <To start touch FSM by timer
|
| touch_high_volt_t_TOUCH_HVOLT_2V4 | <Touch sensor high reference voltage, 2.4V
|
| touch_high_volt_t_TOUCH_HVOLT_2V5 | <Touch sensor high reference voltage, 2.5V
|
| touch_high_volt_t_TOUCH_HVOLT_2V6 | <Touch sensor high reference voltage, 2.6V
|
| touch_high_volt_t_TOUCH_HVOLT_2V7 | <Touch sensor high reference voltage, 2.7V
|
| touch_high_volt_t_TOUCH_HVOLT_KEEP | <Touch sensor high reference voltage, no change
|
| touch_high_volt_t_TOUCH_HVOLT_MAX | |
| touch_low_volt_t_TOUCH_LVOLT_0V5 | <Touch sensor low reference voltage, 0.5V
|
| touch_low_volt_t_TOUCH_LVOLT_0V6 | <Touch sensor low reference voltage, 0.6V
|
| touch_low_volt_t_TOUCH_LVOLT_0V7 | <Touch sensor low reference voltage, 0.7V
|
| touch_low_volt_t_TOUCH_LVOLT_0V8 | <Touch sensor low reference voltage, 0.8V
|
| touch_low_volt_t_TOUCH_LVOLT_KEEP | <Touch sensor low reference voltage, no change
|
| touch_low_volt_t_TOUCH_LVOLT_MAX | |
| touch_pad_t_TOUCH_PAD_MAX | |
| touch_pad_t_TOUCH_PAD_NUM0 | < Touch pad channel 0 is GPIO4
|
| touch_pad_t_TOUCH_PAD_NUM1 | < Touch pad channel 1 is GPIO0
|
| touch_pad_t_TOUCH_PAD_NUM2 | < Touch pad channel 2 is GPIO2
|
| touch_pad_t_TOUCH_PAD_NUM3 | < Touch pad channel 3 is GPIO15
|
| touch_pad_t_TOUCH_PAD_NUM4 | < Touch pad channel 4 is GPIO13
|
| touch_pad_t_TOUCH_PAD_NUM5 | < Touch pad channel 5 is GPIO12
|
| touch_pad_t_TOUCH_PAD_NUM6 | < Touch pad channel 6 is GPIO14
|
| touch_pad_t_TOUCH_PAD_NUM7 | < Touch pad channel 7 is GPIO27
|
| touch_pad_t_TOUCH_PAD_NUM8 | < Touch pad channel 8 is GPIO33
|
| touch_pad_t_TOUCH_PAD_NUM9 | < Touch pad channel 9 is GPIO32
|
| touch_tie_opt_t_TOUCH_PAD_TIE_OPT_HIGH | <Initial level of charging voltage, high level
|
| touch_tie_opt_t_TOUCH_PAD_TIE_OPT_LOW | <Initial level of charging voltage, low level
|
| touch_tie_opt_t_TOUCH_PAD_TIE_OPT_MAX | |
| touch_trigger_mode_t_TOUCH_TRIGGER_ABOVE | <Touch interrupt will happen if counter value is larger than threshold.
|
| touch_trigger_mode_t_TOUCH_TRIGGER_BELOW | <Touch interrupt will happen if counter value is less than threshold.
|
| touch_trigger_mode_t_TOUCH_TRIGGER_MAX | |
| touch_trigger_src_t_TOUCH_TRIGGER_SOURCE_BOTH | < wakeup interrupt is generated if both SET1 and SET2 are "touched"
|
| touch_trigger_src_t_TOUCH_TRIGGER_SOURCE_MAX | |
| touch_trigger_src_t_TOUCH_TRIGGER_SOURCE_SET1 | < wakeup interrupt is generated if SET1 is "touched"
|
| touch_volt_atten_t_TOUCH_HVOLT_ATTEN_0V | <Touch sensor high reference voltage attenuation, 0V attenuation
|
| touch_volt_atten_t_TOUCH_HVOLT_ATTEN_1V | <Touch sensor high reference voltage attenuation, 1.0V attenuation
|
| touch_volt_atten_t_TOUCH_HVOLT_ATTEN_0V5 | <Touch sensor high reference voltage attenuation, 0.5V attenuation
|
| touch_volt_atten_t_TOUCH_HVOLT_ATTEN_1V5 | <Touch sensor high reference voltage attenuation, 1.5V attenuation
|
| touch_volt_atten_t_TOUCH_HVOLT_ATTEN_KEEP | <Touch sensor high reference voltage attenuation, no change
|
| touch_volt_atten_t_TOUCH_HVOLT_ATTEN_MAX | |
| true_ | |
| tskKERNEL_VERSION_BUILD | |
| tskKERNEL_VERSION_MAJOR | |
| tskKERNEL_VERSION_MINOR | |
| tskKERNEL_VERSION_NUMBER | |
| uart_event_type_t_UART_BREAK | < UART break event
|
| uart_event_type_t_UART_BUFFER_FULL | < UART RX buffer full event
|
| uart_event_type_t_UART_DATA | < UART data event
|
| uart_event_type_t_UART_DATA_BREAK | < UART TX data and break event
|
| uart_event_type_t_UART_EVENT_MAX | < UART event max index
|
| uart_event_type_t_UART_FIFO_OVF | < UART FIFO overflow event
|
| uart_event_type_t_UART_FRAME_ERR | < UART RX frame error event
|
| uart_event_type_t_UART_PARITY_ERR | < UART RX parity event
|
| uart_event_type_t_UART_PATTERN_DET | < UART pattern detected
|
| uart_hw_flowcontrol_t_UART_HW_FLOWCTRL_CTS | < enable TX hardware flow control (cts)
|
| uart_hw_flowcontrol_t_UART_HW_FLOWCTRL_CTS_RTS | < enable hardware flow control
|
| uart_hw_flowcontrol_t_UART_HW_FLOWCTRL_DISABLE | < disable hardware flow control
|
| uart_hw_flowcontrol_t_UART_HW_FLOWCTRL_MAX | |
| uart_hw_flowcontrol_t_UART_HW_FLOWCTRL_RTS | < enable RX hardware flow control (rts)
|
| uart_mode_t_UART_MODE_IRDA | < mode: IRDA UART mode
|
| uart_mode_t_UART_MODE_RS485_HALF_DUPLEX | < mode: half duplex RS485 UART mode control by RTS pin
|
| uart_mode_t_UART_MODE_RS485_COLLISION_DETECT | < mode: RS485 collision detection UART mode (used for test purposes)
|
| uart_mode_t_UART_MODE_RS485_APP_CTRL | < mode: application control RS485 UART mode (used for test purposes)
|
| uart_mode_t_UART_MODE_UART | < mode: regular UART mode
|
| uart_parity_t_UART_PARITY_DISABLE | < Disable UART parity
|
| uart_parity_t_UART_PARITY_EVEN | < Enable UART even parity
|
| uart_parity_t_UART_PARITY_ODD | < Enable UART odd parity
|
| uart_port_t_UART_NUM_0 | < UART base address 0x3ff40000
|
| uart_port_t_UART_NUM_1 | < UART base address 0x3ff50000
|
| uart_port_t_UART_NUM_2 | < UART base address 0x3ff6e000
|
| uart_port_t_UART_NUM_MAX | |
| uart_stop_bits_t_UART_STOP_BITS_1 | < stop bit: 1bit
|
| uart_stop_bits_t_UART_STOP_BITS_2 | < stop bit: 2bits
|
| uart_stop_bits_t_UART_STOP_BITS_1_5 | < stop bit: 1.5bits
|
| uart_stop_bits_t_UART_STOP_BITS_MAX | |
| uart_word_length_t_UART_DATA_5_BITS | < word length: 5bits
|
| uart_word_length_t_UART_DATA_6_BITS | < word length: 6bits
|
| uart_word_length_t_UART_DATA_7_BITS | < word length: 7bits
|
| uart_word_length_t_UART_DATA_8_BITS | < word length: 8bits
|
| uart_word_length_t_UART_DATA_BITS_MAX | |
| _Exit⚠ | |
| __assert⚠ | |
| __assert_func⚠ | |
| __eprintf⚠ | |
| __getdelim⚠ | |
| __getline⚠ | |
| __getreent⚠ | |
| __itoa⚠ | |
| __locale_mb_cur_max⚠ | |
| __sinit⚠ | |
| __srget_r⚠ | |
| __swbuf_r⚠ | |
| __utoa⚠ | |
| _asiprintf_r⚠ | |
| _asniprintf_r⚠ | |
| _asnprintf_r⚠ | |
| _asprintf_r⚠ | |
| _atoi_r⚠ | |
| _atol_r⚠ | |
| _atoll_r⚠ | |
| _calloc_r⚠ | |
| _diprintf_r⚠ | |
| _dprintf_r⚠ | |
| _drand48_r⚠ | |
| _dtoa_r⚠ | |
| _erand48_r⚠ | |
| _esp_error_check_failed⚠ | @cond
|
| _esp_error_check_failed_without_abort⚠ | @cond
|
| _fclose_r⚠ | |
| _fcloseall_r⚠ | |
| _fdopen_r⚠ | |
| _fflush_r⚠ | |
| _fgetc_r⚠ | |
| _fgetc_unlocked_r⚠ | |
| _fgetpos_r⚠ | |
| _fgets_r⚠ | |
| _fgets_unlocked_r⚠ | |
| _findenv⚠ | |
| _findenv_r⚠ | |
| _fiprintf_r⚠ | |
| _fiscanf_r⚠ | |
| _fmemopen_r⚠ | |
| _fopen_r⚠ | |
| _fopencookie_r⚠ | |
| _fprintf_r⚠ | |
| _fpurge_r⚠ | |
| _fputc_r⚠ | |
| _fputc_unlocked_r⚠ | |
| _fputs_r⚠ | |
| _fputs_unlocked_r⚠ | |
| _fread_r⚠ | |
| _fread_unlocked_r⚠ | |
| _free_r⚠ | |
| _freopen_r⚠ | |
| _frxt_setup_switch⚠ | |
| _fscanf_r⚠ | |
| _fseek_r⚠ | |
| _fseeko_r⚠ | |
| _fsetpos_r⚠ | |
| _ftell_r⚠ | |
| _ftello_r⚠ | |
| _funopen_r⚠ | |
| _fwrite_r⚠ | |
| _fwrite_unlocked_r⚠ | |
| _getc_r⚠ | |
| _getc_unlocked_r⚠ | |
| _getchar_r⚠ | |
| _getchar_unlocked_r⚠ | |
| _getenv_r⚠ | |
| _gets_r⚠ | |
| _iprintf_r⚠ | |
| _iscanf_r⚠ | |
| _jrand48_r⚠ | |
| _l64a_r⚠ | |
| _lcong48_r⚠ | |
| _lock_acquire⚠ | |
| _lock_acquire_recursive⚠ | |
| _lock_close⚠ | |
| _lock_close_recursive⚠ | |
| _lock_init⚠ | |
| _lock_init_recursive⚠ | |
| _lock_release⚠ | |
| _lock_release_recursive⚠ | |
| _lock_try_acquire⚠ | |
| _lock_try_acquire_recursive⚠ | |
| _lrand48_r⚠ | |
| _malloc_r⚠ | |
| _mblen_r⚠ | |
| _mbstowcs_r⚠ | |
| _mbtowc_r⚠ | |
| _mkdtemp_r⚠ | |
| _mkostemp_r⚠ | |
| _mkostemps_r⚠ | |
| _mkstemp_r⚠ | |
| _mkstemps_r⚠ | |
| _mktemp_r⚠ | |
| _mrand48_r⚠ | |
| _mstats_r⚠ | |
| _nrand48_r⚠ | |
| _open_memstream_r⚠ | |
| _perror_r⚠ | |
| _printf_r⚠ | |
| _putc_r⚠ | |
| _putc_unlocked_r⚠ | |
| _putchar_r⚠ | |
| _putchar_unlocked_r⚠ | |
| _putenv_r⚠ | |
| _puts_r⚠ | |
| _realloc_r⚠ | |
| _reallocf_r⚠ | |
| _reclaim_reent⚠ | |
| _remove_r⚠ | |
| _rename_r⚠ | |
| _rewind_r⚠ | |
| _scanf_r⚠ | |
| _seed48_r⚠ | |
| _setenv_r⚠ | |
| _siprintf_r⚠ | |
| _siscanf_r⚠ | |
| _sniprintf_r⚠ | |
| _snprintf_r⚠ | |
| _sprintf_r⚠ | |
| _srand48_r⚠ | |
| _sscanf_r⚠ | |
| _strtod_r⚠ | |
| _strtol_r⚠ | |
| _strtoll_r⚠ | |
| _strtoul_r⚠ | |
| _strtoull_r⚠ | |
| _system_r⚠ | |
| _tempnam_r⚠ | |
| _tmpfile_r⚠ | |
| _tmpnam_r⚠ | |
| _ungetc_r⚠ | |
| _unsetenv_r⚠ | |
| _vasiprintf_r⚠ | |
| _vasniprintf_r⚠ | |
| _vasnprintf_r⚠ | |
| _vasprintf_r⚠ | |
| _vdiprintf_r⚠ | |
| _vdprintf_r⚠ | |
| _vfiprintf_r⚠ | |
| _vfiscanf_r⚠ | |
| _vfprintf_r⚠ | |
| _vfscanf_r⚠ | |
| _viprintf_r⚠ | |
| _viscanf_r⚠ | |
| _vprintf_r⚠ | |
| _vscanf_r⚠ | |
| _vsiprintf_r⚠ | |
| _vsiscanf_r⚠ | |
| _vsniprintf_r⚠ | |
| _vsnprintf_r⚠ | |
| _vsprintf_r⚠ | |
| _vsscanf_r⚠ | |
| _wcstombs_r⚠ | |
| _wctomb_r⚠ | |
| _xt_coproc_release⚠ | |
| _xtos_clear_ints⚠ | |
| _xtos_core_restore⚠ | |
| _xtos_core_save⚠ | |
| _xtos_core_shutoff⚠ | |
| _xtos_dispatch_level1_interrupts⚠ | |
| _xtos_dispatch_level2_interrupts⚠ | |
| _xtos_dispatch_level3_interrupts⚠ | |
| _xtos_dispatch_level4_interrupts⚠ | |
| _xtos_dispatch_level5_interrupts⚠ | |
| _xtos_dispatch_level6_interrupts⚠ | |
| _xtos_ints_off⚠ | |
| _xtos_ints_on⚠ | |
| _xtos_memep_enable⚠ | |
| _xtos_memep_initrams⚠ | |
| _xtos_read_ints⚠ | |
| _xtos_restore_intlevel⚠ | |
| _xtos_restore_just_intlevel⚠ | |
| _xtos_set_exception_handler⚠ | |
| _xtos_set_interrupt_handler⚠ | |
| _xtos_set_interrupt_handler_arg⚠ | |
| _xtos_set_intlevel⚠ | |
| _xtos_set_min_intlevel⚠ | |
| _xtos_timer_0_delta⚠ | |
| _xtos_timer_1_delta⚠ | |
| _xtos_timer_2_delta⚠ | |
| a64l⚠ | |
| abort⚠ | |
| abs⚠ | |
| adc1_pad_get_io_num⚠ | @brief Get the gpio number of a specific ADC1 channel.
|
| adc1_config_width⚠ | @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1.
The configuration is for all channels of ADC1
@param width_bit Bit capture width for ADC1
|
| adc1_config_channel_atten⚠ | @brief Set the attenuation of a particular channel on ADC1, and configure its
associated GPIO pin mux.
|
| adc1_get_raw⚠ | @brief Take an ADC1 reading from a single channel.
@note When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,
the input of GPIO36 and GPIO39 will be pulled down for about 80ns.
When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39.
Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
|
| adc1_get_voltage⚠ | |
| adc1_ulp_enable⚠ | @brief Configure ADC1 to be usable by the ULP
|
| adc2_pad_get_io_num⚠ | @brief Get the gpio number of a specific ADC2 channel.
|
| adc2_config_channel_atten⚠ | @brief Configure the ADC2 channel, including setting attenuation.
|
| adc2_get_raw⚠ | @brief Take an ADC2 reading on a single channel
|
| adc2_vref_to_gpio⚠ | @brief Output ADC2 reference voltage to gpio 25 or 26 or 27
|
| adc_gpio_init⚠ | @brief Initialize ADC pad
@param adc_unit ADC unit index
@param channel ADC channel index
@return
- ESP_OK success
- ESP_ERR_INVALID_ARG Parameter error
|
| adc_i2s_mode_init⚠ | @brief Initialize I2S ADC mode
@param adc_unit ADC unit index
@param channel ADC channel index
@return
- ESP_OK success
- ESP_ERR_INVALID_ARG Parameter error
|
| adc_power_off⚠ | @brief Power off SAR ADC
This function will force power down for ADC
|
| adc_power_on⚠ | @brief Enable ADC power
|
| adc_set_clk_div⚠ | @brief Set ADC source clock
@param clk_div ADC clock divider, ADC clock is divided from APB clock
@return
- ESP_OK success
|
| adc_set_data_inv⚠ | @brief Set ADC data invert
@param adc_unit ADC unit index
@param inv_en whether enable data invert
@return
- ESP_OK success
- ESP_ERR_INVALID_ARG Parameter error
|
| adc_set_data_width⚠ | @brief Configure ADC capture width.
@param adc_unit ADC unit index
@param width_bit Bit capture width for ADC unit.
@return
- ESP_OK success
- ESP_ERR_INVALID_ARG Parameter error
|
| adc_set_i2s_data_source⚠ | @brief Set I2S data source
@param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC.
@return
- ESP_OK success
|
| asiprintf⚠ | |
| asniprintf⚠ | |
| asnprintf⚠ | |
| asprintf⚠ | |
| atexit⚠ | |
| atof⚠ | |
| atoff⚠ | |
| atoi⚠ | |
| atol⚠ | |
| atoll⚠ | |
| bsearch⚠ | |
| calloc⚠ | |
| can_driver_install⚠ | @brief Install CAN driver
|
| can_driver_uninstall⚠ | @brief Uninstall the CAN driver
|
| can_get_status_info⚠ | @brief Get current status information of the CAN driver
|
| can_initiate_recovery⚠ | @brief Start the bus recovery process
|
| can_read_alerts⚠ | @brief Read CAN driver alerts
|
| can_receive⚠ | @brief Receive a CAN message
|
| can_reconfigure_alerts⚠ | @brief Reconfigure which alerts are enabled
|
| can_start⚠ | @brief Start the CAN driver
|
| can_stop⚠ | @brief Stop the CAN driver
|
| can_transmit⚠ | @brief Transmit a CAN message
|
| cfree⚠ | |
| clearerr⚠ | |
| clearerr_unlocked⚠ | |
| dac_i2s_enable⚠ | @brief Enable DAC output data from I2S
|
| dac_i2s_disable⚠ | @brief Disable DAC output data from I2S
|
| dac_out_voltage⚠ | @cond */
@brief Set DAC output voltage.
|
| dac_output_disable⚠ | @brief DAC pad output disable
|
| dac_output_enable⚠ | @brief DAC pad output enable
|
| dac_output_voltage⚠ | @brief Set DAC output voltage.
|
| dac_pad_get_io_num⚠ | @brief Get the gpio number of a specific DAC channel.
|
| diprintf⚠ | |
| div⚠ | |
| dprintf⚠ | |
| drand48⚠ | |
| dtoa⚠ | |
| eTaskConfirmSleepModeStatus⚠ | |
| eTaskGetState⚠ | Obtain the state of any task.
|
| ecvt⚠ | |
| ecvtbuf⚠ | |
| ecvtf⚠ | |
| erand48⚠ | |
| esp_base_mac_addr_get⚠ | @brief Return base MAC address which is set using esp_base_mac_addr_set.
|
| esp_base_mac_addr_set⚠ | @brief Set base MAC address with the MAC address which is stored in BLK3 of EFUSE or
external storage e.g. flash and EEPROM.
|
| esp_chip_info⚠ | @brief Fill an esp_chip_info_t structure with information about the chip
@param[out] out_info structure to be filled
|
| esp_crosscore_int_init⚠ | Initialize the crosscore interrupt system for this CPU.
This needs to be called once on every CPU that is used
by FreeRTOS.
|
| esp_crosscore_int_send_freq_switch⚠ | Send an interrupt to a CPU indicating it should update its
CCOMPARE1 value due to a frequency switch.
|
| esp_crosscore_int_send_yield⚠ | Send an interrupt to a CPU indicating it should yield its
currently running task in favour of a higher-priority task
that presumably just woke up.
|
| esp_deep_sleep⚠ | @brief Enter deep-sleep mode
|
| esp_deep_sleep_disable_rom_logging⚠ | @brief Disable logging from the ROM code after deep sleep.
|
| esp_deep_sleep_start⚠ | @brief Enter deep sleep with the configured wakeup options
|
| esp_default_wake_deep_sleep⚠ | @brief The default esp-idf-provided esp_wake_deep_sleep() stub.
|
| esp_derive_local_mac⚠ | @brief Derive local MAC address from universal MAC address.
|
| esp_dport_access_int_abort⚠ | |
| esp_dport_access_int_init⚠ | |
| esp_dport_access_int_pause⚠ | |
| esp_dport_access_int_resume⚠ | |
| esp_dport_access_read_buffer⚠ | |
| esp_dport_access_reg_read⚠ | |
| esp_dport_access_sequence_reg_read⚠ | |
| esp_dport_access_stall_other_cpu_end⚠ | |
| esp_dport_access_stall_other_cpu_start⚠ | |
| esp_efuse_mac_get_custom⚠ | @brief Return base MAC address which was previously written to BLK3 of EFUSE.
|
| esp_efuse_mac_get_default⚠ | @brief Return base MAC address which is factory-programmed by Espressif in BLK0 of EFUSE.
|
| esp_efuse_read_mac⚠ | @cond */
@brief Read hardware MAC address from efuse.
|
| esp_err_to_name⚠ | @brief Returns string for esp_err_t error codes
|
| esp_err_to_name_r⚠ | @brief Returns string for esp_err_t and system error codes
|
| esp_fill_random⚠ | @brief Fill a buffer with random bytes from hardware RNG
|
| esp_get_deep_sleep_wake_stub⚠ | @brief Get current wake from deep sleep stub
@return Return current wake from deep sleep stub, or NULL if
no stub is installed.
|
| esp_get_free_heap_size⚠ | @brief Get the size of available heap.
|
| esp_get_idf_version⚠ | Get IDF version
|
| esp_get_minimum_free_heap_size⚠ | @brief Get the minimum heap that has ever been available
|
| esp_intr_alloc⚠ | @brief Allocate an interrupt with the given parameters.
|
| esp_intr_alloc_intrstatus⚠ | @brief Allocate an interrupt with the given parameters.
|
| esp_intr_disable⚠ | @brief Disable the interrupt associated with the handle
|
| esp_intr_enable⚠ | @brief Enable the interrupt associated with the handle
|
| esp_intr_free⚠ | @brief Disable and free an interrupt.
|
| esp_intr_get_cpu⚠ | @brief Get CPU number an interrupt is tied to
|
| esp_intr_get_intno⚠ | @brief Get the allocated interrupt for a certain handle
|
| esp_intr_mark_shared⚠ | @brief Mark an interrupt as a shared interrupt
|
| esp_intr_noniram_disable⚠ | @brief Disable interrupts that aren't specifically marked as running from IRAM
|
| esp_intr_noniram_enable⚠ | @brief Re-enable interrupts disabled by esp_intr_noniram_disable
|
| esp_intr_reserve⚠ | @brief Reserve an interrupt to be used outside of this framework
|
| esp_intr_set_in_iram⚠ | @brief Set the "in IRAM" status of the handler.
|
| esp_light_sleep_start⚠ | @brief Enter light sleep with the configured wakeup options
|
| esp_random⚠ | @brief Get one random 32-bit word from hardware RNG
|
| esp_read_mac⚠ | @brief Read base MAC address and set MAC address of the interface.
|
| esp_register_shutdown_handler⚠ | @brief Register shutdown handler
|
| esp_reset_reason⚠ | @brief Get reason of last reset
@return See description of esp_reset_reason_t for explanation of each value.
|
| esp_restart⚠ | @brief Restart PRO and APP CPUs.
|
| esp_set_deep_sleep_wake_stub⚠ | @brief Install a new stub at runtime to run on wake from deep sleep
|
| esp_sleep_disable_wakeup_source⚠ | @brief Disable wakeup source
|
| esp_sleep_enable_ext0_wakeup⚠ | @brief Enable wakeup using a pin
|
| esp_sleep_enable_ext1_wakeup⚠ | @brief Enable wakeup using multiple pins
|
| esp_sleep_enable_gpio_wakeup⚠ | @brief Enable wakeup from light sleep using GPIOs
|
| esp_sleep_enable_timer_wakeup⚠ | @brief Enable wakeup by timer
@param time_in_us time before wakeup, in microseconds
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if value is out of range (TBD)
|
| esp_sleep_enable_touchpad_wakeup⚠ | @brief Enable wakeup by touch sensor
|
| esp_sleep_enable_uart_wakeup⚠ | @brief Enable wakeup from light sleep using UART
|
| esp_sleep_enable_ulp_wakeup⚠ | @brief Enable wakeup by ULP coprocessor
@note In revisions 0 and 1 of the ESP32, ULP wakeup source
can not be used when RTC_PERIPH power domain is forced
to be powered on (ESP_PD_OPTION_ON) or when ext0 wakeup
source is used.
@return
- ESP_OK on success
- ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXTERNAL_CRYSTAL_ADDITIONAL_CURRENT) is enabled.
- ESP_ERR_INVALID_STATE if ULP co-processor is not enabled or if wakeup triggers conflict
|
| esp_sleep_get_ext1_wakeup_status⚠ | @brief Get the bit mask of GPIOs which caused wakeup (ext1)
|
| esp_sleep_get_touchpad_wakeup_status⚠ | @brief Get the touch pad which caused wakeup
|
| esp_sleep_get_wakeup_cause⚠ | @brief Get the wakeup source which caused wakeup from sleep
|
| esp_sleep_pd_config⚠ | @brief Set power down mode for an RTC power domain in sleep mode
|
| esp_timer_create⚠ | @brief Create an esp_timer instance
|
| esp_timer_deinit⚠ | @brief De-initialize esp_timer library
|
| esp_timer_delete⚠ | @brief Delete an esp_timer instance
|
| esp_timer_dump⚠ | @brief Dump the list of timers to a stream
|
| esp_timer_get_next_alarm⚠ | @brief Get the timestamp when the next timeout is expected to occur
@return Timestamp of the nearest timer event, in microseconds.
The timebase is the same as for the values returned by esp_timer_get_time.
|
| esp_timer_get_time⚠ | @brief Get time in microseconds since boot
@return number of microseconds since esp_timer_init was called (this normally
happens early during application startup).
|
| esp_timer_init⚠ | @brief Initialize esp_timer library
|
| esp_timer_start_once⚠ | @brief Start one-shot timer
|
| esp_timer_start_periodic⚠ | @brief Start a periodic timer
|
| esp_timer_stop⚠ | @brief Stop the timer
|
| esp_vApplicationIdleHook⚠ | |
| esp_vApplicationTickHook⚠ | |
| esp_wake_deep_sleep⚠ | @brief Default stub to run on wake from deep sleep.
|
| ets_delay_us⚠ | @brief CPU do while loop for some time.
In FreeRTOS task, please call FreeRTOS apis.
|
| ets_get_cpu_frequency⚠ | @brief Get the real CPU ticks per us to the ets.
This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
|
| ets_get_detected_xtal_freq⚠ | @brief Get xtal_freq value, If value not stored in RTC_STORE5, than store.
|
| ets_get_xtal_scale⚠ | @brief Get xtal_freq/analog_8M*256 value calibrated in rtc module.
|
| ets_install_putc1⚠ | @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
|
| ets_install_putc2⚠ | @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
To install putc2, which is defaulted installed as NULL.
|
| ets_install_uart_printf⚠ | @brief Install putc1 as ets_write_char_uart.
In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
|
| ets_intr_lock⚠ | @brief Lock the interrupt to level 2.
This function direct set the CPU registers.
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_intr_unlock⚠ | @brief Unlock the interrupt to level 0.
This function direct set the CPU registers.
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_isr_attach⚠ | @brief Attach a interrupt handler to a CPU interrupt number.
This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_isr_mask⚠ | @brief Mask the interrupts which show in mask bits.
This function equals to _xtos_ints_off(mask).
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_isr_unmask⚠ | @brief Unmask the interrupts which show in mask bits.
This function equals to _xtos_ints_on(mask).
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_post⚠ | @brief Post an event to an Task.
|
| ets_printf⚠ | @brief Printf the strings to uart or other devices, similar with printf, simple than printf.
Can not print float point data format, or longlong data format.
So we maybe only use this in ROM.
|
| ets_run⚠ | @brief Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
|
| ets_set_appcpu_boot_addr⚠ | @brief Set App cpu Entry code, code can be called in PRO CPU.
When APP booting is completed, APP CPU will call the Entry code if not NULL.
|
| ets_set_idle_cb⚠ | @brief Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
|
| ets_set_startup_callback⚠ | @brief Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
|
| ets_set_user_start⚠ | @brief Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
|
| ets_task⚠ | @brief Init a task with processer, priority, queue to receive Event, queue length.
|
| ets_timer_arm⚠ | @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_timer_arm_us⚠ | @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_timer_deinit⚠ | @brief In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_timer_disarm⚠ | @brief Disarm an ets timer.
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_timer_done⚠ | @brief Unset timer callback and argument to NULL.
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_timer_init⚠ | @brief Init ets timer, this timer range is 640 us to 429496 ms
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_timer_setfn⚠ | @brief Set timer callback and argument.
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_unpack_flash_code⚠ | @brief unpack the image in flash to iram and dram, using cache, maybe decrypting.
|
| ets_unpack_flash_code_legacy⚠ | @brief unpack the image in flash to iram and dram, no using cache.
|
| ets_update_cpu_frequency⚠ | @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
Call this function when CPU frequency is changed.
|
| ets_update_cpu_frequency_rom⚠ | @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
|
| ets_waiti0⚠ | @brief Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
This function direct set the CPU registers.
In FreeRTOS, please call FreeRTOS apis, never call this api.
|
| ets_write_char_uart⚠ | @brief Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
Can not print float point data format, or longlong data format
|
| exit⚠ | |
| fclose⚠ | |
| fcvt⚠ | |
| fcvtbuf⚠ | |
| fcvtf⚠ | |
| fdopen⚠ | |
| feof⚠ | |
| feof_unlocked⚠ | |
| ferror⚠ | |
| ferror_unlocked⚠ | |
| fflush⚠ | |
| fflush_unlocked⚠ | |
| fgetc⚠ | |
| fgetc_unlocked⚠ | |
| fgetpos⚠ | |
| fgets⚠ | |
| fileno⚠ | |
| fileno_unlocked⚠ | |
| fiprintf⚠ | |
| fiscanf⚠ | |
| flockfile⚠ | |
| fmemopen⚠ | |
| fopen⚠ | |
| fopencookie⚠ | |
| fprintf⚠ | |
| fpurge⚠ | |
| fputc⚠ | |
| fputc_unlocked⚠ | |
| fputs⚠ | |
| fread⚠ | |
| fread_unlocked⚠ | |
| free⚠ | |
| freopen⚠ | |
| fscanf⚠ | |
| fseek⚠ | |
| fseeko⚠ | |
| fsetpos⚠ | |
| ftell⚠ | |
| ftello⚠ | |
| ftrylockfile⚠ | |
| funlockfile⚠ | |
| funopen⚠ | |
| fwrite⚠ | |
| fwrite_unlocked⚠ | |
| gcvt⚠ | |
| gcvtf⚠ | |
| getc⚠ | |
| getc_unlocked⚠ | |
| getchar⚠ | |
| getchar_unlocked⚠ | |
| getenv⚠ | |
| gets⚠ | |
| getsubopt⚠ | |
| getw⚠ | |
| gpio_config⚠ | @brief GPIO common configuration
|
| gpio_deep_sleep_hold_dis⚠ | @brief Disable all digital gpio pad hold function during Deep-sleep.
|
| gpio_deep_sleep_hold_en⚠ | @brief Enable all digital gpio pad hold function during Deep-sleep.
|
| gpio_get_drive_capability⚠ | @brief Get GPIO pad drive capability
|
| gpio_get_level⚠ | @brief GPIO get input level
|
| gpio_hold_dis⚠ | @brief Disable gpio pad hold function.
|
| gpio_hold_en⚠ | @brief Enable gpio pad hold function.
|
| gpio_init⚠ | @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
to initialize "output enables" and pin configurations for each gpio pin.
Please do not call this function in SDK.
|
| gpio_input_get⚠ | @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
|
| gpio_input_get_high⚠ | @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
|
| gpio_install_isr_service⚠ | @brief Install the driver's GPIO ISR handler service, which allows per-pin GPIO interrupt handlers.
|
| gpio_intr_ack⚠ | @brief Ack gpio interrupts to process pending interrupts.
Please do not call this function in SDK.
|
| gpio_intr_ack_high⚠ | @brief Ack gpio interrupts to process pending interrupts.
Please do not call this function in SDK.
|
| gpio_intr_disable⚠ | @brief Disable GPIO module interrupt signal
|
| gpio_intr_enable⚠ | @brief Enable GPIO module interrupt signal
|
| gpio_intr_handler_register⚠ | @brief Register an application-specific interrupt handler for GPIO pin interrupts.
Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
Please do not call this function in SDK.
|
| gpio_intr_pending⚠ | @brief Get gpio interrupts which happens but not processed.
Please do not call this function in SDK.
|
| gpio_intr_pending_high⚠ | @brief Get gpio interrupts which happens but not processed.
Please do not call this function in SDK.
|
| gpio_iomux_in⚠ | @brief Set pad input to a peripheral signal through the IOMUX.
@param gpio_num GPIO number of the pad.
@param signal_idx Peripheral signal id to input. One of the *_IN_IDX signals in soc/gpio_sig_map.h.
|
| gpio_iomux_out⚠ | @brief Set peripheral output to an GPIO pad through the IOMUX.
@param gpio_num gpio_num GPIO number of the pad.
@param func The function number of the peripheral pin to output pin.
One of the FUNC_X_* of specified pin (X) in soc/io_mux_reg.h.
@param oen_inv True if the output enable needs to be inversed, otherwise False.
|
| gpio_isr_handler_add⚠ | @brief Add ISR handler for the corresponding GPIO pin.
|
| gpio_isr_handler_remove⚠ | @brief Remove ISR handler for the corresponding GPIO pin.
|
| gpio_isr_register⚠ | @brief Register GPIO interrupt handler, the handler is an ISR.
The handler will be attached to the same CPU core that this function is running on.
|
| gpio_matrix_in⚠ | @brief set gpio input to a signal, one gpio can input to several signals.
|
| gpio_matrix_out⚠ | @brief set signal output to gpio, one signal can output to several gpios.
|
| gpio_output_set⚠ | @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
There is no particular ordering guaranteed; so if the order of writes is significant,
calling code should divide a single call into multiple calls.
|
| gpio_output_set_high⚠ | @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
There is no particular ordering guaranteed; so if the order of writes is significant,
calling code should divide a single call into multiple calls.
|
| gpio_pad_hold⚠ | @brief Hold the pad from gpio number.
|
| gpio_pad_pulldown⚠ | @brief Pull down the pad from gpio number.
|
| gpio_pad_pullup⚠ | @brief Pull up the pad from gpio number.
|
| gpio_pad_select_gpio⚠ | @brief Select pad as a gpio function from IOMUX.
|
| gpio_pad_set_drv⚠ | @brief Set pad driver capability.
|
| gpio_pad_unhold⚠ | @brief Unhold the pad from gpio number.
|
| gpio_pin_wakeup_disable⚠ | @brief disable GPIOs to wakeup the ESP32.
Please do not call this function in SDK.
|
| gpio_pin_wakeup_enable⚠ | @brief Set GPIO to wakeup the ESP32.
Please do not call this function in SDK.
|
| gpio_pulldown_dis⚠ | @brief Disable pull-down on GPIO.
|
| gpio_pulldown_en⚠ | @brief Enable pull-down on GPIO.
|
| gpio_pullup_dis⚠ | @brief Disable pull-up on GPIO.
|
| gpio_pullup_en⚠ | @brief Enable pull-up on GPIO.
|
| gpio_reset_pin⚠ | @brief Reset an gpio to default state (select gpio function, enable pullup and disable input and output).
|
| gpio_set_direction⚠ | @brief GPIO set direction
|
| gpio_set_drive_capability⚠ | @brief Set GPIO pad drive capability
|
| gpio_set_intr_type⚠ | @brief GPIO set interrupt trigger type
|
| gpio_set_level⚠ | @brief GPIO set output level
|
| gpio_set_pull_mode⚠ | @brief Configure GPIO pull-up/pull-down resistors
|
| gpio_uninstall_isr_service⚠ | @brief Uninstall the driver's GPIO ISR service, freeing related resources.
|
| gpio_wakeup_disable⚠ | @brief Disable GPIO wake-up function.
|
| gpio_wakeup_enable⚠ | @brief Enable GPIO wake-up function.
|
| hall_sensor_read⚠ | @brief Read Hall Sensor
|
| heap_caps_calloc⚠ | @brief Allocate a chunk of memory which has the given capabilities. The initialized value in the memory is set to zero.
|
| heap_caps_calloc_prefer⚠ | @brief Allocate a chunk of memory as preference in decreasing order.
|
| heap_caps_check_integrity⚠ | @brief Check integrity of all heaps with the given capabilities.
|
| heap_caps_check_integrity_addr⚠ | @brief Check integrity of heap memory around a given address.
|
| heap_caps_check_integrity_all⚠ | @brief Check integrity of all heap memory in the system.
|
| heap_caps_dump⚠ | @brief Dump the full structure of all heaps with matching capabilities.
|
| heap_caps_dump_all⚠ | @brief Dump the full structure of all heaps.
|
| heap_caps_free⚠ | @brief Free memory previously allocated via heap_caps_malloc() or heap_caps_realloc().
|
| heap_caps_get_free_size⚠ | @brief Get the total free size of all the regions that have the given capabilities
|
| heap_caps_get_info⚠ | @brief Get heap info for all regions with the given capabilities.
|
| heap_caps_get_largest_free_block⚠ | @brief Get the largest free block of memory able to be allocated with the given capabilities.
|
| heap_caps_get_minimum_free_size⚠ | @brief Get the total minimum free memory of all regions with the given capabilities
|
| heap_caps_malloc⚠ | @brief Allocate a chunk of memory which has the given capabilities
|
| heap_caps_malloc_extmem_enable⚠ | @brief Enable malloc() in external memory and set limit below which
malloc() attempts are placed in internal memory.
|
| heap_caps_malloc_prefer⚠ | @brief Allocate a chunk of memory as preference in decreasing order.
|
| heap_caps_print_heap_info⚠ | @brief Print a summary of all memory with the given capabilities.
|
| heap_caps_realloc⚠ | @brief Reallocate memory previously allocated via heap_caps_malloc() or heap_caps_realloc().
|
| heap_caps_realloc_prefer⚠ | @brief Allocate a chunk of memory as preference in decreasing order.
|
| i2c_driver_install⚠ | @brief I2C driver install
|
| i2c_driver_delete⚠ | @brief I2C driver delete
|
| i2c_param_config⚠ | @brief I2C parameter initialization
|
| i2c_reset_tx_fifo⚠ | @brief reset I2C tx hardware fifo
|
| i2c_reset_rx_fifo⚠ | @brief reset I2C rx fifo
|
| i2c_isr_register⚠ | @brief I2C isr handler register
|
| i2c_isr_free⚠ | @brief to delete and free I2C isr.
|
| i2c_set_pin⚠ | @brief Configure GPIO signal for I2C sck and sda
|
| i2c_cmd_link_create⚠ | @brief Create and init I2C command link
@note
Before we build I2C command link, we need to call i2c_cmd_link_create() to create
a command link.
After we finish sending the commands, we need to call i2c_cmd_link_delete() to
release and return the resources.
|
| i2c_cmd_link_delete⚠ | @brief Free I2C command link
@note
Before we build I2C command link, we need to call i2c_cmd_link_create() to create
a command link.
After we finish sending the commands, we need to call i2c_cmd_link_delete() to
release and return the resources.
|
| i2c_master_start⚠ | @brief Queue command for I2C master to generate a start signal
@note
Only call this function in I2C master mode
Call i2c_master_cmd_begin() to send all queued commands
|
| i2c_master_write_byte⚠ | @brief Queue command for I2C master to write one byte to I2C bus
@note
Only call this function in I2C master mode
Call i2c_master_cmd_begin() to send all queued commands
|
| i2c_master_write⚠ | @brief Queue command for I2C master to write buffer to I2C bus
@note
Only call this function in I2C master mode
Call i2c_master_cmd_begin() to send all queued commands
|
| i2c_master_read_byte⚠ | @brief Queue command for I2C master to read one byte from I2C bus
@note
Only call this function in I2C master mode
Call i2c_master_cmd_begin() to send all queued commands
|
| i2c_master_read⚠ | @brief Queue command for I2C master to read data from I2C bus
@note
Only call this function in I2C master mode
Call i2c_master_cmd_begin() to send all queued commands
|
| i2c_master_stop⚠ | @brief Queue command for I2C master to generate a stop signal
@note
Only call this function in I2C master mode
Call i2c_master_cmd_begin() to send all queued commands
|
| i2c_master_cmd_begin⚠ | @brief I2C master send queued commands.
This function will trigger sending all queued commands.
The task will be blocked until all the commands have been sent out.
The I2C APIs are not thread-safe, if you want to use one I2C port in different tasks,
you need to take care of the multi-thread issue.
@note
Only call this function in I2C master mode
|
| i2c_slave_write_buffer⚠ | @brief I2C slave write data to internal ringbuffer, when tx fifo empty, isr will fill the hardware
fifo from the internal ringbuffer
@note
Only call this function in I2C slave mode
|
| i2c_slave_read_buffer⚠ | @brief I2C slave read data from internal buffer. When I2C slave receive data, isr will copy received data
from hardware rx fifo to internal ringbuffer. Then users can read from internal ringbuffer.
@note
Only call this function in I2C slave mode
|
| i2c_set_period⚠ | @brief set I2C master clock period
|
| i2c_get_period⚠ | @brief get I2C master clock period
|
| i2c_filter_enable⚠ | @brief enable hardware filter on I2C bus
Sometimes the I2C bus is disturbed by high frequency noise(about 20ns), or the rising edge of
the SCL clock is very slow, these may cause the master state machine broken. enable hardware
filter can filter out high frequency interference and make the master more stable.
@note
Enable filter will slow the SCL clock.
|
| i2c_filter_disable⚠ | @brief disable filter on I2C bus
|
| i2c_set_start_timing⚠ | @brief set I2C master start signal timing
|
| i2c_get_start_timing⚠ | @brief get I2C master start signal timing
|
| i2c_set_stop_timing⚠ | @brief set I2C master stop signal timing
|
| i2c_get_stop_timing⚠ | @brief get I2C master stop signal timing
|
| i2c_set_data_timing⚠ | @brief set I2C data signal timing
|
| i2c_get_data_timing⚠ | @brief get I2C data signal timing
|
| i2c_set_timeout⚠ | @brief set I2C timeout value
@param i2c_num I2C port number
@param timeout timeout value for I2C bus (unit: APB 80Mhz clock cycle)
@return
- ESP_OK Success
- ESP_ERR_INVALID_ARG Parameter error
|
| i2c_get_timeout⚠ | @brief get I2C timeout value
@param i2c_num I2C port number
@param timeout pointer to get timeout value
@return
- ESP_OK Success
- ESP_ERR_INVALID_ARG Parameter error
|
| i2c_set_data_mode⚠ | @brief set I2C data transfer mode
|
| i2c_get_data_mode⚠ | @brief get I2C data transfer mode
|
| i2s_set_pin⚠ | @brief Set I2S pin number
|
| i2s_set_dac_mode⚠ | @brief Set I2S dac mode, I2S built-in DAC is disabled by default
|
| i2s_driver_install⚠ | @brief Install and start I2S driver.
|
| i2s_driver_uninstall⚠ | @brief Uninstall I2S driver.
|
| i2s_write_bytes⚠ | @brief Write data to I2S DMA transmit buffer.
|
| i2s_write⚠ | @brief Write data to I2S DMA transmit buffer.
|
| i2s_write_expand⚠ | @brief Write data to I2S DMA transmit buffer while expanding the number of bits per sample. For example, expanding 16-bit PCM to 32-bit PCM.
|
| i2s_read_bytes⚠ | @brief Read data from I2S DMA receive buffer
|
| i2s_read⚠ | @brief Read data from I2S DMA receive buffer
|
| i2s_push_sample⚠ | @brief Write a single sample to the I2S DMA TX buffer.
|
| i2s_pop_sample⚠ | @brief Read a single sample from the I2S DMA RX buffer.
|
| i2s_set_sample_rates⚠ | @brief Set sample rate used for I2S RX and TX.
|
| i2s_stop⚠ | @brief Stop I2S driver
|
| i2s_start⚠ | @brief Start I2S driver
|
| i2s_zero_dma_buffer⚠ | @brief Zero the contents of the TX DMA buffer.
|
| i2s_set_clk⚠ | @brief Set clock & bit width used for I2S RX and TX.
|
| i2s_set_adc_mode⚠ | @brief Set built-in ADC mode for I2S DMA, this function will initialize ADC pad,
and set ADC parameters.
@param adc_unit SAR ADC unit index
@param adc_channel ADC channel index
@return
- ESP_OK Success
- ESP_ERR_INVALID_ARG Parameter error
|
| i2s_adc_enable⚠ | @brief Start to use I2S built-in ADC mode
@note This function would acquire the lock of ADC to prevent the data getting corrupted
during the I2S peripheral is being used to do fully continuous ADC sampling.
|
| i2s_adc_disable⚠ | @brief Stop to use I2S built-in ADC mode
@param i2s_num i2s port index
@note This function would release the lock of ADC so that other tasks can use ADC.
@return
- ESP_OK Success
- ESP_ERR_INVALID_ARG Parameter error
- ESP_ERR_INVALID_STATE Driver state error
|
| intr_matrix_set⚠ | @brief Attach an CPU interrupt to a hardware source.
We have 4 steps to use an interrupt:
1.Attach hardware interrupt source to CPU. intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
2.Set interrupt handler. xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
3.Enable interrupt for CPU. xt_ints_on(1 << ETS_WMAC_INUM);
4.Enable interrupt in the module.
|
| iprintf⚠ | |
| iscanf⚠ | |
| itoa⚠ | |
| jrand48⚠ | |
| l64a⚠ | |
| labs⚠ | |
| lcong48⚠ | |
| ldiv⚠ | |
| ledc_bind_channel_timer⚠ | @brief Bind LEDC channel with the selected timer
|
| ledc_channel_config⚠ | @brief LEDC channel configuration
Configure LEDC channel with the given channel/output gpio_num/interrupt/source timer/frequency(Hz)/LEDC duty resolution
|
| ledc_fade_func_install⚠ | @brief Install LEDC fade function. This function will occupy interrupt of LEDC module.
@param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
|
| ledc_fade_func_uninstall⚠ | @brief Uninstall LEDC fade function.
|
| ledc_fade_start⚠ | @brief Start LEDC fading.
@note Call ledc_fade_func_install() once before calling this function.
Call this API right after ledc_set_fade_with_time or ledc_set_fade_with_step before to start fading.
@note If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
Other duty operations will have to wait until the fade operation has finished.
@param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
@param channel LEDC channel number
@param fade_mode Whether to block until fading done.
|
| ledc_get_duty⚠ | @brief LEDC get duty
|
| ledc_get_freq⚠ | @brief LEDC get channel frequency (Hz)
|
| ledc_get_hpoint⚠ | @brief LEDC get hpoint value, the counter value when the output is set high level.
|
| ledc_isr_register⚠ | @brief Register LEDC interrupt handler, the handler is an ISR.
The handler will be attached to the same CPU core that this function is running on.
|
| ledc_set_duty⚠ | @brief LEDC set duty
This function do not change the hpoint value of this channel. if needed, please call ledc_set_duty_with_hpoint.
only after calling ledc_update_duty will the duty update.
@note ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
control one LEDC channel in different tasks at the same time.
A thread-safe version of API is ledc_set_duty_and_update.
@note If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
Other duty operations will have to wait until the fade operation has finished.
@param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
@param channel LEDC channel (0-7), select from ledc_channel_t
@param duty Set the LEDC duty, the range of duty setting is [0, (2**duty_resolution)]
|
| ledc_set_duty_and_update⚠ | @brief A thread-safe API to set duty for LEDC channel and return when duty updated.
@note If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
Other duty operations will have to wait until the fade operation has finished.
|
| ledc_set_duty_with_hpoint⚠ | @brief LEDC set duty and hpoint value
Only after calling ledc_update_duty will the duty update.
@note ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
control one LEDC channel in different tasks at the same time.
A thread-safe version of API is ledc_set_duty_and_update
@note If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
Other duty operations will have to wait until the fade operation has finished.
@param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
@param channel LEDC channel (0-7), select from ledc_channel_t
@param duty Set the LEDC duty, the range of duty setting is [0, (2**duty_resolution)]
@param hpoint Set the LEDC hpoint value(max: 0xfffff)
|
| ledc_set_fade⚠ | @brief LEDC set gradient
Set LEDC gradient, After the function calls the ledc_update_duty function, the function can take effect.
@note If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
Other duty operations will have to wait until the fade operation has finished.
@param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode
@param channel LEDC channel (0-7), select from ledc_channel_t
@param duty Set the start of the gradient duty, the range of duty setting is [0, (2**duty_resolution)]
@param fade_direction Set the direction of the gradient
@param step_num Set the number of the gradient
@param duty_cyle_num Set how many LEDC tick each time the gradient lasts
@param duty_scale Set gradient change amplitude
|
| ledc_set_fade_step_and_start⚠ | @brief A thread-safe API to set and start LEDC fade function.
@note Call ledc_fade_func_install() once before calling this function.
@note If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
Other duty operations will have to wait until the fade operation has finished.
@param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode,
@param channel LEDC channel index (0-7), select from ledc_channel_t
@param target_duty Target duty of fading [0, (2**duty_resolution) - 1]
@param scale Controls the increase or decrease step scale.
@param cycle_num increase or decrease the duty every cycle_num cycles
@param fade_mode choose blocking or non-blocking mode
@return
- ESP_ERR_INVALID_ARG Parameter error
- ESP_OK Success
- ESP_ERR_INVALID_STATE Fade function not installed.
- ESP_FAIL Fade function init error
|
| ledc_set_fade_time_and_start⚠ | @brief A thread-safe API to set and start LEDC fade function, with a limited time.
@note Call ledc_fade_func_install() once, before calling this function.
@note If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
Other duty operations will have to wait until the fade operation has finished.
@param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode,
@param channel LEDC channel index (0-7), select from ledc_channel_t
@param target_duty Target duty of fading.( 0 - (2 ** duty_resolution - 1)))
@param max_fade_time_ms The maximum time of the fading ( ms ).
@param fade_mode choose blocking or non-blocking mode
@return
- ESP_ERR_INVALID_ARG Parameter error
- ESP_OK Success
- ESP_ERR_INVALID_STATE Fade function not installed.
- ESP_FAIL Fade function init error
|
| ledc_set_fade_with_step⚠ | @brief Set LEDC fade function.
@note Call ledc_fade_func_install() once before calling this function.
Call ledc_fade_start() after this to start fading.
@note ledc_set_fade_with_step, ledc_set_fade_with_time and ledc_fade_start are not thread-safe, do not call these functions to
control one LEDC channel in different tasks at the same time.
A thread-safe version of API is ledc_set_fade_step_and_start
@note If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
Other duty operations will have to wait until the fade operation has finished.
@param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode,
@param channel LEDC channel index (0-7), select from ledc_channel_t
@param target_duty Target duty of fading [0, (2**duty_resolution) - 1]
@param scale Controls the increase or decrease step scale.
@param cycle_num increase or decrease the duty every cycle_num cycles
|
| ledc_set_fade_with_time⚠ | @brief Set LEDC fade function, with a limited time.
@note Call ledc_fade_func_install() once before calling this function.
Call ledc_fade_start() after this to start fading.
@note ledc_set_fade_with_step, ledc_set_fade_with_time and ledc_fade_start are not thread-safe, do not call these functions to
control one LEDC channel in different tasks at the same time.
A thread-safe version of API is ledc_set_fade_step_and_start
@note If a fade operation is running in progress on that channel, the driver would not allow it to be stopped.
Other duty operations will have to wait until the fade operation has finished.
@param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode,
@param channel LEDC channel index (0-7), select from ledc_channel_t
@param target_duty Target duty of fading.( 0 - (2 ** duty_resolution - 1)))
@param max_fade_time_ms The maximum time of the fading ( ms ).
|
| ledc_set_freq⚠ | @brief LEDC set channel frequency (Hz)
|
| ledc_stop⚠ | @brief LEDC stop.
Disable LEDC output, and set idle level
|
| ledc_timer_config⚠ | @brief LEDC timer configuration
Configure LEDC timer with the given source timer/frequency(Hz)/duty_resolution
|
| ledc_timer_pause⚠ | @brief Pause LEDC timer counter
|
| ledc_timer_resume⚠ | @brief Resume LEDC timer
|
| ledc_timer_rst⚠ | @brief Reset LEDC timer
|
| ledc_timer_set⚠ | @brief Configure LEDC settings
|
| ledc_update_duty⚠ | @brief LEDC update channel parameters
@note Call this function to activate the LEDC updated parameters.
After ledc_set_duty, we need to call this function to update the settings.
@note ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
control one LEDC channel in different tasks at the same time.
A thread-safe version of API is ledc_set_duty_and_update
@param speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mode,
@param channel LEDC channel (0-7), select from ledc_channel_t
|
| llabs⚠ | |
| lldesc_build_chain⚠ | |
| lldesc_num2link⚠ | |
| lldesc_set_owner⚠ | |
| lldiv⚠ | |
| lrand48⚠ | |
| malloc⚠ | |
| mblen⚠ | |
| mbstowcs⚠ | |
| mbtowc⚠ | |
| mcpwm_capture_disable⚠ | @brief Disable capture signal
|
| mcpwm_capture_enable⚠ | @brief Initialize capture submodule
|
| mcpwm_capture_signal_get_edge⚠ | @brief Get edge of capture signal
|
| mcpwm_capture_signal_get_value⚠ | @brief Get capture value
|
| mcpwm_carrier_disable⚠ | @brief Disable MCPWM carrier submodule, for respective timer
|
| mcpwm_carrier_enable⚠ | @brief Enable MCPWM carrier submodule, for respective timer
|
| mcpwm_carrier_init⚠ | @brief Initialize carrier configuration
|
| mcpwm_carrier_oneshot_mode_disable⚠ | @brief Disable oneshot mode, width of first pulse = carrier period
|
| mcpwm_carrier_oneshot_mode_enable⚠ | @brief Enable and set width of first pulse in carrier oneshot mode
|
| mcpwm_carrier_output_invert⚠ | @brief Enable or disable carrier output inversion
|
| mcpwm_carrier_set_duty_cycle⚠ | @brief Set duty_cycle of carrier
|
| mcpwm_carrier_set_period⚠ | @brief Set period of carrier
|
| mcpwm_deadtime_disable⚠ | @brief Disable deadtime on MCPWM timer
|
| mcpwm_deadtime_enable⚠ | @brief Enable and initialize deadtime for each MCPWM timer
|
| mcpwm_fault_deinit⚠ | @brief Disable fault signal
|
| mcpwm_fault_init⚠ | @brief Initialize fault submodule, currently low level triggering is not supported
|
| mcpwm_fault_set_cyc_mode⚠ | @brief Set cycle-by-cycle mode on fault detection, once fault occur in cyc mode MCPWM signal resumes as soon as fault signal becomes inactive
@note
currently low level triggering is not supported
|
| mcpwm_fault_set_oneshot_mode⚠ | @brief Set oneshot mode on fault detection, once fault occur in oneshot mode reset is required to resume MCPWM signals
@note
currently low level triggering is not supported
|
| mcpwm_get_duty⚠ | @brief Get duty cycle of each operator
|
| mcpwm_get_frequency⚠ | @brief Get frequency of timer
|
| mcpwm_gpio_init⚠ | @brief This function initializes each gpio signal for MCPWM
@note
This function initializes one gpio at a time.
|
| mcpwm_init⚠ | @brief Initialize MCPWM parameters
|
| mcpwm_isr_register⚠ | @brief Register MCPWM interrupt handler, the handler is an ISR.
the handler will be attached to the same CPU core that this function is running on.
|
| mcpwm_set_duty⚠ | @brief Set duty cycle of each operator(MCPWMXA/MCPWMXB)
|
| mcpwm_set_duty_in_us⚠ | @brief Set duty cycle of each operator(MCPWMXA/MCPWMXB) in us
|
| mcpwm_set_duty_type⚠ | @brief Set duty either active high or active low(out of phase/inverted)
@note
Call this function every time after mcpwm_set_signal_high or mcpwm_set_signal_low to resume with previously set duty cycle
|
| mcpwm_set_frequency⚠ | @brief Set frequency(in Hz) of MCPWM timer
|
| mcpwm_set_pin⚠ | @brief Initialize MCPWM gpio structure
@note
This function can be used to initialize more then one gpio at a time.
|
| mcpwm_set_signal_high⚠ | @brief Use this function to set MCPWM signal high
|
| mcpwm_set_signal_low⚠ | @brief Use this function to set MCPWM signal low
|
| mcpwm_start⚠ | @brief Start MCPWM signal on timer 'x'
|
| mcpwm_stop⚠ | @brief Start MCPWM signal on timer 'x'
|
| mcpwm_sync_disable⚠ | @brief Disable sync submodule on given timer
|
| mcpwm_sync_enable⚠ | @brief Initialize sync submodule
|
| mkdtemp⚠ | |
| mkostemp⚠ | |
| mkostemps⚠ | |
| mkstemp⚠ | |
| mkstemps⚠ | |
| mktemp⚠ | |
| mrand48⚠ | |
| multi_heap_check⚠ | @brief Check heap integrity
|
| multi_heap_dump⚠ | @brief Dump heap information to stdout
|
| multi_heap_free⚠ | @brief free() a buffer in a given heap.
|
| multi_heap_free_size⚠ | @brief Return free heap size
|
| multi_heap_get_allocated_size⚠ | @brief Return the size that a particular pointer was allocated with.
|
| multi_heap_get_info⚠ | @brief Return metadata about a given heap
|
| multi_heap_malloc⚠ | @brief malloc() a buffer in a given heap
|
| multi_heap_minimum_free_size⚠ | @brief Return the lifetime minimum free heap size
|
| multi_heap_realloc⚠ | @brief realloc() a buffer in a given heap.
|
| multi_heap_register⚠ | @brief Register a new heap for use
|
| multi_heap_set_lock⚠ | @brief Associate a private lock pointer with a heap
|
| nrand48⚠ | |
| on_exit⚠ | |
| open_memstream⚠ | |
| pcTaskGetTaskName⚠ | Get task name
|
| pclose⚠ | |
| periph_module_disable⚠ | @brief disable peripheral module
|
| periph_module_enable⚠ | @brief enable peripheral module
|
| periph_module_reset⚠ | @brief reset peripheral module
|
| perror⚠ | |
| popen⚠ | |
| printf⚠ | |
| putc⚠ | |
| putc_unlocked⚠ | |
| putchar⚠ | |
| putchar_unlocked⚠ | |
| putenv⚠ | |
| puts⚠ | |
| putw⚠ | |
| pvTaskGetThreadLocalStoragePointer⚠ | Get local storage pointer specific to the given task.
|
| pvTaskIncrementMutexHeldCount⚠ | |
| pxPortInitialiseStack⚠ | |
| pxTaskGetStackStart⚠ | Returns the start of the stack associated with xTask.
|
| qsort⚠ | |
| rand⚠ | |
| rand_r⚠ | |
| realloc⚠ | |
| reallocf⚠ | |
| realpath⚠ | |
| remove⚠ | |
| rename⚠ | |
| renameat⚠ | |
| rewind⚠ | |
| rmt_clr_intr_enable_mask⚠ | @brief Clear mask value to RMT interrupt enable register.
|
| rmt_config⚠ | @brief Configure RMT parameters
|
| rmt_driver_install⚠ | @brief Initialize RMT driver
|
| rmt_driver_uninstall⚠ | @brief Uninstall RMT driver.
|
| rmt_fill_tx_items⚠ | @brief Fill memory data of channel with given RMT items.
|
| rmt_get_clk_div⚠ | @brief Get RMT clock divider, channel clock is divided from source clock.
|
| rmt_get_idle_level⚠ | @brief Get RMT idle output level for transmitter
|
| rmt_get_mem_block_num⚠ | @brief Get RMT memory block number
|
| rmt_get_mem_pd⚠ | @brief Get RMT memory low power mode.
|
| rmt_get_memory_owner⚠ | @brief Get RMT memory owner.
|
| rmt_get_ringbuf_handle⚠ | @brief Get ringbuffer from RMT.
|
| rmt_get_rx_idle_thresh⚠ | @brief Get RMT idle threshold value.
|
| rmt_get_source_clk⚠ | @brief Get RMT source clock
|
| rmt_get_status⚠ | @brief Get RMT status
|
| rmt_get_tx_loop_mode⚠ | @brief Get RMT tx loop mode.
|
| rmt_isr_deregister⚠ | @brief Deregister previously registered RMT interrupt handler
|
| rmt_isr_register⚠ | @brief Register RMT interrupt handler, the handler is an ISR.
|
| rmt_memory_rw_rst⚠ | @brief Reset RMT TX/RX memory index.
|
| rmt_register_tx_end_callback⚠ | @brief Registers a callback that will be called when transmission ends.
|
| rmt_rx_start⚠ | @brief Set RMT start receiving data.
|
| rmt_rx_stop⚠ | @brief Set RMT stop receiving data.
|
| rmt_set_clk_div⚠ | @brief Set RMT clock divider, channel clock is divided from source clock.
|
| rmt_set_err_intr_en⚠ | @brief Set RMT RX error interrupt enable
|
| rmt_set_idle_level⚠ | @brief Set RMT idle output level for transmitter
|
| rmt_set_intr_enable_mask⚠ | @brief Set mask value to RMT interrupt enable register.
|
| rmt_set_mem_block_num⚠ | @brief Set RMT memory block number for RMT channel
|
| rmt_set_mem_pd⚠ | @brief Set RMT memory in low power mode.
|
| rmt_set_memory_owner⚠ | @brief Set RMT memory owner.
|
| rmt_set_pin⚠ | @brief Set RMT pin
|
| rmt_set_rx_filter⚠ | @brief Set RMT RX filter.
|
| rmt_set_rx_idle_thresh⚠ | @brief Set RMT RX idle threshold value
|
| rmt_set_rx_intr_en⚠ | @brief Set RMT RX interrupt enable
|
| rmt_set_source_clk⚠ | @brief Set RMT source clock
|
| rmt_set_tx_carrier⚠ | @brief Configure RMT carrier for TX signal.
|
| rmt_set_tx_intr_en⚠ | @brief Set RMT TX interrupt enable
|
| rmt_set_tx_loop_mode⚠ | @brief Set RMT tx loop mode.
|
| rmt_set_tx_thr_intr_en⚠ | @brief Set RMT TX threshold event interrupt enable
|
| rmt_translator_init⚠ | @brief Init rmt translator and register user callback.
The callback will convert the raw data that needs to be sent to rmt format.
If a channel is initialized more than once, tha user callback will be replaced by the later.
|
| rmt_tx_start⚠ | @brief Set RMT start sending data from memory.
|
| rmt_tx_stop⚠ | @brief Set RMT stop sending.
|
| rmt_wait_tx_done⚠ | @brief Wait RMT TX finished.
|
| rmt_write_items⚠ | @brief RMT send waveform from rmt_item array.
|
| rmt_write_sample⚠ | @brief Translate uint8_t type of data into rmt format and send it out.
Requires rmt_translator_init to init the translator first.
|
| scanf⚠ | |
| sched_yield⚠ | |
| seed48⚠ | |
| setbuf⚠ | |
| setbuffer⚠ | |
| setenv⚠ | |
| setlinebuf⚠ | |
| setvbuf⚠ | |
| siprintf⚠ | |
| siscanf⚠ | |
| sniprintf⚠ | |
| snprintf⚠ | |
| soc_get_available_memory_region_max_count⚠ | |
| soc_get_available_memory_regions⚠ | |
| spi_bus_add_device⚠ | @brief Allocate a device on a SPI bus
|
| spi_bus_free⚠ | @brief Free a SPI bus
|
| spi_bus_initialize⚠ | @brief Initialize a SPI bus
|
| spi_bus_remove_device⚠ | @brief Remove a device from the SPI bus
|
| spi_cal_clock⚠ | @brief Calculate the working frequency that is most close to desired frequency, and also the register value.
|
| spi_device_acquire_bus⚠ | @brief Occupy the SPI bus for a device to do continuous transactions.
|
| spi_device_get_trans_result⚠ | @brief Get the result of a SPI transaction queued earlier by spi_device_queue_trans.
|
| spi_device_polling_end⚠ | @brief Poll until the polling transaction ends.
|
| spi_device_polling_start⚠ | @brief Immediately start a polling transaction.
|
| spi_device_polling_transmit⚠ | @brief Send a polling transaction, wait for it to complete, and return the result
|
| spi_device_queue_trans⚠ | @brief Queue a SPI transaction for interrupt transaction execution. Get the result by spi_device_get_trans_result.
|
| spi_device_release_bus⚠ | @brief Release the SPI bus occupied by the device. All other devices can start sending transactions.
|
| spi_device_transmit⚠ | @brief Send a SPI transaction, wait for it to complete, and return the result
|
| spi_get_freq_limit⚠ | @brief Get the frequency limit of current configurations.
SPI master working at this limit is OK, while above the limit, full duplex mode and DMA will not work,
and dummy bits will be aplied in the half duplex mode.
|
| spi_get_timing⚠ | @brief Calculate the timing settings of specified frequency and settings.
|
| spi_slave_free⚠ | @brief Free a SPI bus claimed as a SPI slave interface
|
| spi_slave_get_trans_result⚠ | @brief Get the result of a SPI transaction queued earlier
|
| spi_slave_initialize⚠ | @brief Initialize a SPI bus as a slave interface
|
| spi_slave_queue_trans⚠ | @brief Queue a SPI transaction for execution
|
| spi_slave_transmit⚠ | @brief Do a SPI transaction
|
| spicommon_bus_free_io⚠ | @brief Free the IO used by a SPI peripheral
@deprecated Use spicommon_bus_free_io_cfg instead.
|
| spicommon_bus_free_io_cfg⚠ | @brief Free the IO used by a SPI peripheral
|
| spicommon_bus_initialize_io⚠ | @brief Connect a SPI peripheral to GPIO pins
|
| spicommon_cs_free⚠ | @brief Free a chip select line
@deprecated Use spicommon_cs_io, which inputs the gpio num rather than the cs id instead.
|
| spicommon_cs_free_io⚠ | @brief Free a chip select line
|
| spicommon_cs_initialize⚠ | @brief Initialize a Chip Select pin for a specific SPI peripheral
|
| spicommon_dma_chan_claim⚠ | @brief Try to claim a SPI DMA channel
|
| spicommon_dma_chan_free⚠ | @brief Return the SPI DMA channel so other driver can claim it, or just to power down DMA.
|
| spicommon_dmaworkaround_idle⚠ | @brief Mark a DMA channel as idle.
|
| spicommon_dmaworkaround_req_reset⚠ | @brief Request a reset for a certain DMA channel
|
| spicommon_dmaworkaround_reset_in_progress⚠ | @brief Check if a DMA reset is requested but has not completed yet
|
| spicommon_dmaworkaround_transfer_active⚠ | @brief Mark a DMA channel as active.
|
| spicommon_hw_for_host⚠ | @brief Get the position of the hardware registers for a specific SPI host
|
| spicommon_irqsource_for_host⚠ | @brief Get the IRQ source for a specific SPI host
|
| spicommon_periph_claim⚠ | @brief Try to claim a SPI peripheral
|
| spicommon_periph_free⚠ | @brief Return the SPI peripheral so another driver can claim it.
|
| spicommon_setup_dma_desc_links⚠ | @brief Setup a DMA link chain
|
| sprintf⚠ | |
| srand⚠ | |
| srand48⚠ | |
| sscanf⚠ | |
| strtod⚠ | |
| strtof⚠ | |
| strtol⚠ | |
| strtold⚠ | |
| strtoll⚠ | |
| strtoul⚠ | |
| strtoull⚠ | |
| system⚠ | |
| system_deep_sleep⚠ | @brief Enter deep-sleep mode
|
| system_efuse_read_mac⚠ | @brief Read hardware MAC address.
|
| system_get_free_heap_size⚠ | @cond */
@brief Get the size of available heap.
|
| system_get_sdk_version⚠ | @cond */
Get SDK version
|
| system_get_time⚠ | @cond */
@brief Get system time, unit: microsecond.
|
| system_init⚠ | @cond */
@attention Applications don't need to call this function anymore. It does nothing and will
be removed in future version.
|
| system_restart⚠ | @cond */
@brief Restart system.
|
| system_restore⚠ | @brief Reset to default settings.
|
| tempnam⚠ | |
| timer_disable_intr⚠ | @brief Disable timer interrupt
|
| timer_enable_intr⚠ | @brief Enable timer interrupt
|
| timer_get_alarm_value⚠ | @brief Get timer alarm value.
|
| timer_get_config⚠ | @brief Get timer configure value.
|
| timer_get_counter_time_sec⚠ | @brief Read the counter value of hardware timer, in unit of a given scale.
|
| timer_get_counter_value⚠ | @brief Read the counter value of hardware timer.
|
| timer_group_intr_disable⚠ | @brief Disable timer group interrupt, by disable mask
|
| timer_group_intr_enable⚠ | @brief Enable timer group interrupt, by enable mask
|
| timer_init⚠ | @brief Initializes and configure the timer.
|
| timer_isr_register⚠ | @brief Register Timer interrupt handler, the handler is an ISR.
The handler will be attached to the same CPU core that this function is running on.
|
| timer_pause⚠ | @brief Pause the counter of hardware timer.
|
| timer_set_alarm⚠ | @brief Enable or disable generation of timer alarm events.
|
| timer_set_alarm_value⚠ | @brief Set timer alarm value.
|
| timer_set_auto_reload⚠ | @brief Enable or disable counter reload function when alarm event occurs.
|
| timer_set_counter_mode⚠ | @brief Set counting mode for hardware timer.
|
| timer_set_counter_value⚠ | @brief Set counter value to hardware timer.
|
| timer_set_divider⚠ | @brief Set hardware timer source clock divider. Timer groups clock are divider from APB clock.
|
| timer_start⚠ | @brief Start the counter of hardware timer.
|
| tmpfile⚠ | |
| tmpnam⚠ | |
| touch_pad_clear_group_mask⚠ | @brief Clear touch sensor group mask.
Touch pad module has two sets of signals, Interrupt is triggered only if
at least one of touch pad in this group is "touched".
This function will clear the register bits according to the given bitmask.
@param set1_mask bitmask touch sensor signal group1, it's a 10-bit value
@param set2_mask bitmask touch sensor signal group2, it's a 10-bit value
@param en_mask bitmask of touch sensor work enable, it's a 10-bit value
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_clear_status⚠ | @brief To clear the touch status register, usually use this function in touch ISR to clear status.
@return
- ESP_OK on success
|
| touch_pad_config⚠ | @brief Configure touch pad interrupt threshold.
|
| touch_pad_deinit⚠ | @brief Un-install touch pad driver.
@note After this function is called, other touch functions are prohibited from being called.
@return
- ESP_OK Success
- ESP_FAIL Touch pad driver not initialized
|
| touch_pad_filter_delete⚠ | @brief delete touch pad filter driver and release the memory
Need to call touch_pad_filter_start before all touch filter APIs
@return
- ESP_OK Success
- ESP_ERR_INVALID_STATE driver state error
|
| touch_pad_filter_start⚠ | @brief start touch pad filter function
This API will start a filter to process the noise in order to prevent false triggering
when detecting slight change of capacitance.
Need to call touch_pad_filter_start before all touch filter APIs
|
| touch_pad_filter_stop⚠ | @brief stop touch pad filter function
Need to call touch_pad_filter_start before all touch filter APIs
@return
- ESP_OK Success
- ESP_ERR_INVALID_STATE driver state error
|
| touch_pad_get_cnt_mode⚠ | @brief Get touch sensor charge/discharge speed for each pad
@param touch_num touch pad index
@param slope pointer to accept touch pad charge/discharge slope
@param opt pointer to accept the initial voltage
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_get_filter_period⚠ | @brief get touch pad filter calibration period, in ms
Need to call touch_pad_filter_start before all touch filter APIs
@param p_period_ms pointer to accept period
@return
- ESP_OK Success
- ESP_ERR_INVALID_STATE driver state error
- ESP_ERR_INVALID_ARG parameter error
|
| touch_pad_get_fsm_mode⚠ | @brief Get touch sensor FSM mode
@param mode pointer to accept FSM mode
@return
- ESP_OK on success
|
| touch_pad_get_group_mask⚠ | @brief Get touch sensor group mask.
@param set1_mask pointer to accept bitmask of touch sensor signal group1, it's a 10-bit value
@param set2_mask pointer to accept bitmask of touch sensor signal group2, it's a 10-bit value
@param en_mask pointer to accept bitmask of touch sensor work enable, it's a 10-bit value
@return
- ESP_OK on success
|
| touch_pad_get_meas_time⚠ | @brief Get touch sensor measurement and sleep time
@param sleep_cycle Pointer to accept sleep cycle number
@param meas_cycle Pointer to accept measurement cycle count.
@return
- ESP_OK on success
|
| touch_pad_get_status⚠ | @brief Get the touch sensor status, usually used in ISR to decide which pads are 'touched'.
@return
- touch status
|
| touch_pad_get_thresh⚠ | @brief Get touch sensor interrupt threshold
@param touch_num touch pad index
@param threshold pointer to accept threshold
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_get_trigger_mode⚠ | @brief Get touch sensor interrupt trigger mode
@param mode pointer to accept touch sensor interrupt trigger mode
@return
- ESP_OK on success
|
| touch_pad_get_trigger_source⚠ | @brief Get touch sensor interrupt trigger source
@param src pointer to accept touch sensor interrupt trigger source
@return
- ESP_OK on success
|
| touch_pad_get_voltage⚠ | @brief Get touch sensor reference voltage,
@param refh pointer to accept DREFH value
@param refl pointer to accept DREFL value
@param atten pointer to accept the attenuation on DREFH
@return
- ESP_OK on success
|
| touch_pad_get_wakeup_status⚠ | @brief Get the touch pad which caused wakeup from sleep
@param pad_num pointer to touch pad which caused wakeup
@return
- ESP_OK Success
- ESP_FAIL get status err
|
| touch_pad_init⚠ | @brief Initialize touch module.
@note The default FSM mode is 'TOUCH_FSM_MODE_SW'. If you want to use interrupt trigger mode,
then set it using function 'touch_pad_set_fsm_mode' to 'TOUCH_FSM_MODE_TIMER' after calling 'touch_pad_init'.
@return
- ESP_OK Success
- ESP_FAIL Touch pad init error
|
| touch_pad_intr_disable⚠ | @brief To disable touch pad interrupt
@return
- ESP_OK on success
|
| touch_pad_intr_enable⚠ | @brief To enable touch pad interrupt
@return
- ESP_OK on success
|
| touch_pad_io_init⚠ | @brief Initialize touch pad GPIO
@param touch_num touch pad index
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_isr_deregister⚠ | @brief Deregister the handler previously registered using touch_pad_isr_handler_register
@param fn handler function to call (as passed to touch_pad_isr_handler_register)
@param arg argument of the handler (as passed to touch_pad_isr_handler_register)
@return
- ESP_OK on success
- ESP_ERR_INVALID_STATE if a handler matching both fn and
arg isn't registered
|
| touch_pad_isr_handler_register⚠ | @brief Register touch-pad ISR,
@note Deprecated function, users should replace this with touch_pad_isr_register,
because RTC modules share a same interrupt index.
@param fn Pointer to ISR handler
@param arg Parameter for ISR
@param unused Reserved, not used
@param handle_unused Reserved, not used
@return
- ESP_OK Success ;
- ESP_ERR_INVALID_ARG GPIO error
- ESP_ERR_NO_MEM No memory
|
| touch_pad_isr_register⚠ | @brief Register touch-pad ISR.
The handler will be attached to the same CPU core that this function is running on.
@param fn Pointer to ISR handler
@param arg Parameter for ISR
@return
- ESP_OK Success ;
- ESP_ERR_INVALID_ARG GPIO error
- ESP_ERR_NO_MEM No memory
|
| touch_pad_read⚠ | @brief get touch sensor counter value.
Each touch sensor has a counter to count the number of charge/discharge cycles.
When the pad is not 'touched', we can get a number of the counter.
When the pad is 'touched', the value in counter will get smaller because of the larger equivalent capacitance.
|
| touch_pad_read_filtered⚠ | @brief get filtered touch sensor counter value by IIR filter.
|
| touch_pad_read_raw_data⚠ | @brief get raw data (touch sensor counter value) from IIR filter process.
Need not request hardware measurements.
|
| touch_pad_set_cnt_mode⚠ | @brief Set touch sensor charge/discharge speed for each pad.
If the slope is 0, the counter would always be zero.
If the slope is 1, the charging and discharging would be slow, accordingly, the counter value would be small.
If the slope is set 7, which is the maximum value, the charging and discharging would be fast, accordingly, the
counter value would be larger.
@param touch_num touch pad index
@param slope touch pad charge/discharge speed
@param opt the initial voltage
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_set_filter_period⚠ | @brief set touch pad filter calibration period, in ms.
Need to call touch_pad_filter_start before all touch filter APIs
@param new_period_ms filter period, in ms
@return
- ESP_OK Success
- ESP_ERR_INVALID_STATE driver state error
- ESP_ERR_INVALID_ARG parameter error
|
| touch_pad_set_filter_read_cb⚠ | @brief Register the callback function that is called after each IIR filter calculation.
@note The 'read_cb' callback is called in timer task in each filtering cycle.
@param read_cb Pointer to filtered callback function.
If the argument passed in is NULL, the callback will stop.
@return
- ESP_OK Success
- ESP_ERR_INVALID_ARG set error
|
| touch_pad_set_fsm_mode⚠ | @brief Set touch sensor FSM mode, the test action can be triggered by the timer,
as well as by the software.
@param mode FSM mode
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_set_group_mask⚠ | @brief Set touch sensor group mask.
Touch pad module has two sets of signals, 'Touched' signal is triggered only if
at least one of touch pad in this group is "touched".
This function will set the register bits according to the given bitmask.
@param set1_mask bitmask of touch sensor signal group1, it's a 10-bit value
@param set2_mask bitmask of touch sensor signal group2, it's a 10-bit value
@param en_mask bitmask of touch sensor work enable, it's a 10-bit value
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_set_meas_time⚠ | @brief Set touch sensor measurement and sleep time
@param sleep_cycle The touch sensor will sleep after each measurement.
sleep_cycle decide the interval between each measurement.
t_sleep = sleep_cycle / (RTC_SLOW_CLK frequency).
The approximate frequency value of RTC_SLOW_CLK can be obtained using rtc_clk_slow_freq_get_hz function.
@param meas_cycle The duration of the touch sensor measurement.
t_meas = meas_cycle / 8M, the maximum measure time is 0xffff / 8M = 8.19 ms
@return
- ESP_OK on success
|
| touch_pad_set_thresh⚠ | @brief Set touch sensor interrupt threshold
@param touch_num touch pad index
@param threshold threshold of touchpad count, refer to touch_pad_set_trigger_mode to see how to set trigger mode.
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_set_trigger_mode⚠ | @brief Set touch sensor interrupt trigger mode.
Interrupt can be triggered either when counter result is less than
threshold or when counter result is more than threshold.
@param mode touch sensor interrupt trigger mode
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_set_trigger_source⚠ | @brief Set touch sensor interrupt trigger source. There are two sets of touch signals.
Set1 and set2 can be mapped to several touch signals. Either set will be triggered
if at least one of its touch signal is 'touched'. The interrupt can be configured to be generated
if set1 is triggered, or only if both sets are triggered.
@param src touch sensor interrupt trigger source
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_set_voltage⚠ | @brief Set touch sensor reference voltage, if the voltage gap between high and low reference voltage get less,
the charging and discharging time would be faster, accordingly, the counter value would be larger.
In the case of detecting very slight change of capacitance, we can narrow down the gap so as to increase
the sensitivity. On the other hand, narrow voltage gap would also introduce more noise, but we can use a
software filter to pre-process the counter value.
@param refh the value of DREFH
@param refl the value of DREFL
@param atten the attenuation on DREFH
@return
- ESP_OK on success
- ESP_ERR_INVALID_ARG if argument is wrong
|
| touch_pad_sw_start⚠ | @brief Trigger a touch sensor measurement, only support in SW mode of FSM
@return
- ESP_OK on success
|
| uart_clear_intr_status⚠ | @brief Clear UART interrupt status
|
| uart_disable_intr_mask⚠ | @brief Clear UART interrupt enable bits
|
| uart_disable_pattern_det_intr⚠ | @brief UART disable pattern detect function.
Designed for applications like 'AT commands'.
When the hardware detects a series of one same character, the interrupt will be triggered.
|
| uart_disable_rx_intr⚠ | @brief Disable UART RX interrupt (RX_FULL & RX_TIMEOUT INTERRUPT)
|
| uart_disable_tx_intr⚠ | @brief Disable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)
|
| uart_driver_delete⚠ | @brief Uninstall UART driver.
|
| uart_driver_install⚠ | @brief Install UART driver.
|
| uart_enable_intr_mask⚠ | @brief Set UART interrupt enable
|
| uart_enable_pattern_det_intr⚠ | @brief UART enable pattern detect function.
Designed for applications like 'AT commands'.
When the hardware detect a series of one same character, the interrupt will be triggered.
|
| uart_enable_rx_intr⚠ | @brief Enable UART RX interrupt (RX_FULL & RX_TIMEOUT INTERRUPT)
|
| uart_enable_tx_intr⚠ | @brief Enable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)
|
| uart_flush⚠ | @brief Alias of uart_flush_input.
UART ring buffer flush. This will discard all data in the UART RX buffer.
@note Instead of waiting the data sent out, this function will clear UART rx buffer.
In order to send all the data in tx FIFO, we can use uart_wait_tx_done function.
@param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
| uart_flush_input⚠ | @brief Clear input buffer, discard all the data is in the ring-buffer.
@note In order to send all the data in tx FIFO, we can use uart_wait_tx_done function.
@param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
|
| uart_get_baudrate⚠ | @brief Get UART baud rate.
|
| uart_get_buffered_data_len⚠ | @brief UART get RX ring buffer cached data length
|
| uart_get_collision_flag⚠ | @brief Returns collision detection flag for RS485 mode
Function returns the collision detection flag into variable pointed by collision_flag.
*collision_flag = true, if collision detected else it is equal to false.
This function should be executed when actual transmission is completed (after uart_write_bytes()).
|
| uart_get_hw_flow_ctrl⚠ | @brief Get hardware flow control mode
|
| uart_get_parity⚠ | @brief Get UART parity mode.
|
| uart_get_stop_bits⚠ | @brief Get UART stop bits.
|
| uart_get_wakeup_threshold⚠ | @brief Get the number of RX pin signal edges for light sleep wakeup.
|
| uart_get_word_length⚠ | @brief Get UART data bits.
|
| uart_intr_config⚠ | @brief Configure UART interrupts.
|
| uart_isr_free⚠ | @brief Free UART interrupt handler registered by uart_isr_register. Must be called on the same core as
uart_isr_register was called.
|
| uart_isr_register⚠ | @brief Register UART interrupt handler (ISR).
|
| uart_param_config⚠ | @brief Set UART configuration parameters.
|
| uart_pattern_get_pos⚠ | @brief Return the nearest detected pattern position in buffer.
The positions of the detected pattern are saved in a queue,
This function do nothing to the queue.
@note If the RX buffer is full and flow control is not enabled,
the detected pattern may not be found in the rx buffer due to overflow.
|
| uart_pattern_pop_pos⚠ | @brief Return the nearest detected pattern position in buffer.
The positions of the detected pattern are saved in a queue,
this function will dequeue the first pattern position and move the pointer to next pattern position.
@note If the RX buffer is full and flow control is not enabled,
the detected pattern may not be found in the rx buffer due to overflow.
|
| uart_pattern_queue_reset⚠ | @brief Allocate a new memory with the given length to save record the detected pattern position in rx buffer.
@param uart_num UART port number
@param queue_length Max queue length for the detected pattern.
If the queue length is not large enough, some pattern positions might be lost.
Set this value to the maximum number of patterns that could be saved in data buffer at the same time.
@return
- ESP_ERR_NO_MEM No enough memory
- ESP_ERR_INVALID_STATE Driver not installed
- ESP_FAIL Parameter error
- ESP_OK Success
|
| uart_read_bytes⚠ | @brief UART read bytes from UART buffer
|
| uart_set_baudrate⚠ | @brief Set UART baud rate.
|
| uart_set_dtr⚠ | @brief Manually set the UART DTR pin level.
|
| uart_set_hw_flow_ctrl⚠ | @brief Set hardware flow control.
|
| uart_set_line_inverse⚠ | @brief Set UART line inverse mode
|
| uart_set_mode⚠ | @brief UART set communication mode
@note This function must be executed after uart_driver_install(), when the driver object is initialized.
@param uart_num Uart number to configure
@param mode UART UART mode to set
|
| uart_set_parity⚠ | @brief Set UART parity mode.
|
| uart_set_pin⚠ | @brief Set UART pin number
|
| uart_set_rts⚠ | @brief Manually set the UART RTS pin level.
@note UART must be configured with hardware flow control disabled.
|
| uart_set_rx_timeout⚠ | @brief UART set threshold timeout for TOUT feature
|
| uart_set_stop_bits⚠ | @brief Set UART stop bits.
|
| uart_set_sw_flow_ctrl⚠ | @brief Set software flow control.
|
| uart_set_tx_idle_num⚠ | @brief Set UART idle interval after tx FIFO is empty
|
| uart_set_wakeup_threshold⚠ | @brief Set the number of RX pin signal edges for light sleep wakeup
|
| uart_set_word_length⚠ | @brief Set UART data bits.
|
| uart_tx_chars⚠ | @brief Send data to the UART port from a given buffer and length.
|
| uart_wait_tx_done⚠ | @brief Wait until UART TX FIFO is empty.
|
| uart_write_bytes⚠ | @brief Send data to the UART port from a given buffer and length,
|
| uart_write_bytes_with_break⚠ | @brief Send data to the UART port from a given buffer and length,
|
| ucQueueGetQueueType⚠ | |
| ulTaskNotifyTake⚠ | Simplified macro for receiving task notification.
|
| ungetc⚠ | |
| unsetenv⚠ | |
| utoa⚠ | |
| uxListRemove⚠ | |
| uxPortCompareSetExtram⚠ | |
| uxQueueGetQueueNumber⚠ | |
| uxQueueMessagesWaiting⚠ | Return the number of messages stored in a queue.
|
| uxQueueMessagesWaitingFromISR⚠ | |
| uxQueueSpacesAvailable⚠ | Return the number of free spaces available in a queue. This is equal to the
number of items that can be sent to the queue before the queue becomes full
if no items are removed.
|
| uxTaskGetNumberOfTasks⚠ | Get current number of tasks
|
| uxTaskGetSnapshotAll⚠ | |
| uxTaskGetStackHighWaterMark⚠ | Returns the high water mark of the stack associated with xTask.
|
| uxTaskGetSystemState⚠ | Get the state of tasks in the system.
|
| uxTaskGetTaskNumber⚠ | |
| uxTaskPriorityGet⚠ | Obtain the priority of any task.
|
| uxTaskPriorityGetFromISR⚠ | A version of uxTaskPriorityGet() that can be used from an ISR.
|
| uxTaskResetEventItemValue⚠ | |
| vApplicationSleep⚠ | |
| vListInitialise⚠ | |
| vListInitialiseItem⚠ | |
| vListInsert⚠ | |
| vListInsertEnd⚠ | |
| vPortAssertIfInISR⚠ | |
| vPortCPUAcquireMutex⚠ | |
| vPortCPUAcquireMutexTimeout⚠ | @brief Acquire a portmux spinlock with a timeout
|
| vPortCPUInitializeMutex⚠ | |
| vPortCPUReleaseMutex⚠ | |
| vPortEndScheduler⚠ | |
| vPortReleaseTaskMPUSettings⚠ | |
| vPortSetStackWatchpoint⚠ | |
| vPortStoreTaskMPUSettings⚠ | |
| vPortYield⚠ | |
| vPortYieldOtherCore⚠ | |
| vQueueDelete⚠ | Delete a queue - freeing all the memory allocated for storing of items
placed on the queue.
|
| vQueueSetQueueNumber⚠ | |
| vQueueWaitForMessageRestricted⚠ | @cond
|
| vRingbufferDelete⚠ | @brief Delete a ring buffer
|
| vRingbufferGetInfo⚠ | @brief Get information about ring buffer status
|
| vRingbufferReturnItem⚠ | @brief Return a previously-retrieved item to the ring buffer
|
| vRingbufferReturnItemFromISR⚠ | @brief Return a previously-retrieved item to the ring buffer from an ISR
|
| vTaskAllocateMPURegions⚠ | Memory regions are assigned to a restricted task when the task is created by
a call to xTaskCreateRestricted(). These regions can be redefined using
vTaskAllocateMPURegions().
|
| vTaskDelay⚠ | Delay a task for a given number of ticks.
|
| vTaskDelayUntil⚠ | Delay a task until a specified time.
|
| vTaskDelete⚠ | Remove a task from the RTOS real time kernel's management.
|
| vTaskEndScheduler⚠ | Stops the real time kernel tick.
|
| vTaskEnterCritical⚠ | |
| vTaskExitCritical⚠ | |
| vTaskGetRunTimeStats⚠ | Get the state of running tasks as a string
|
| vTaskList⚠ | List all the current tasks.
|
| vTaskMissedYield⚠ | |
| vTaskNotifyGiveFromISR⚠ | Simplified macro for sending task notification from ISR.
|
| vTaskPlaceOnEventList⚠ | |
| vTaskPlaceOnEventListRestricted⚠ | |
| vTaskPlaceOnUnorderedEventList⚠ | |
| vTaskPriorityInherit⚠ | |
| vTaskPrioritySet⚠ | Set the priority of any task.
|
| vTaskResume⚠ | Resumes a suspended task.
|
| vTaskSetTaskNumber⚠ | |
| vTaskSetThreadLocalStoragePointer⚠ | Set local storage pointer specific to the given task.
|
| vTaskSetThreadLocalStoragePointerAndDelCallback⚠ | Set local storage pointer and deletion callback.
|
| vTaskSetTimeOutState⚠ | |
| vTaskStartScheduler⚠ | @cond */
Starts the real time kernel tick processing.
|
| vTaskStepTick⚠ | |
| vTaskSuspend⚠ | Suspend a task.
|
| vTaskSuspendAll⚠ | Suspends the scheduler without disabling interrupts.
|
| vTaskSwitchContext⚠ | |
| vasiprintf⚠ | |
| vasniprintf⚠ | |
| vasnprintf⚠ | |
| vasprintf⚠ | |
| vdiprintf⚠ | |
| vdprintf⚠ | |
| vfiprintf⚠ | |
| vfiscanf⚠ | |
| vfprintf⚠ | |
| vfscanf⚠ | |
| viprintf⚠ | |
| viscanf⚠ | |
| vprintf⚠ | |
| vscanf⚠ | |
| vsiprintf⚠ | |
| vsiscanf⚠ | |
| vsniprintf⚠ | |
| vsnprintf⚠ | |
| vsprintf⚠ | |
| vsscanf⚠ | |
| wcstombs⚠ | |
| wctomb⚠ | |
| xPortGetTickRateHz⚠ | |
| xPortInIsrContext⚠ | |
| xPortInterruptedFromISRContext⚠ | |
| xPortStartScheduler⚠ | |
| xQueueAddToSet⚠ | Adds a queue or semaphore to a queue set that was previously created by a
call to xQueueCreateSet().
|
| xQueueAltGenericReceive⚠ | |
| xQueueAltGenericSend⚠ | @cond */
xQueueAltGenericSend() is an alternative version of xQueueGenericSend().
Likewise xQueueAltGenericReceive() is an alternative version of
xQueueGenericReceive().
|
| xQueueCRReceive⚠ | |
| xQueueCRReceiveFromISR⚠ | |
| xQueueCRSend⚠ | |
| xQueueCRSendFromISR⚠ | |
| xQueueCreateCountingSemaphore⚠ | |
| xQueueCreateCountingSemaphoreStatic⚠ | |
| xQueueCreateMutex⚠ | |
| xQueueCreateMutexStatic⚠ | |
| xQueueCreateSet⚠ | Queue sets provide a mechanism to allow a task to block (pend) on a read
operation from multiple queues or semaphores simultaneously.
|
| xQueueGenericCreate⚠ | |
| xQueueGenericReceive⚠ | It is preferred that the macro xQueueReceive() be used rather than calling
this function directly.
|
| xQueueGenericReset⚠ | |
| xQueueGenericSend⚠ | It is preferred that the macros xQueueSend(), xQueueSendToFront() and
xQueueSendToBack() are used in place of calling this function directly.
|
| xQueueGenericSendFromISR⚠ | @{*/
It is preferred that the macros xQueueSendFromISR(),
xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place
of calling this function directly. xQueueGiveFromISR() is an
equivalent for use by semaphores that don't actually copy any data.
|
| xQueueGetMutexHolder⚠ | |
| xQueueGiveFromISR⚠ | |
| xQueueGiveMutexRecursive⚠ | |
| xQueueIsQueueEmptyFromISR⚠ | @{*/
Utilities to query queues that are safe to use from an ISR. These utilities
should be used only from witin an ISR, or within a critical section.
|
| xQueueIsQueueFullFromISR⚠ | |
| xQueuePeekFromISR⚠ | A version of xQueuePeek() that can be called from an interrupt service
routine (ISR).
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| xQueueReceiveFromISR⚠ | Receive an item from a queue. It is safe to use this function from within an
interrupt service routine.
|
| xQueueRemoveFromSet⚠ | Removes a queue or semaphore from a queue set. A queue or semaphore can only
be removed from a set if the queue or semaphore is empty.
|
| xQueueSelectFromSet⚠ | xQueueSelectFromSet() selects from the members of a queue set a queue or
semaphore that either contains data (in the case of a queue) or is available
to take (in the case of a semaphore). xQueueSelectFromSet() effectively
allows a task to block (pend) on a read operation on all the queues and
semaphores in a queue set simultaneously.
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| xQueueSelectFromSetFromISR⚠ | A version of xQueueSelectFromSet() that can be used from an ISR.
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| xQueueTakeMutexRecursive⚠ | |
| xRingbufferAddToQueueSetRead⚠ | @brief Add the ring buffer's read semaphore to a queue set.
|
| xRingbufferAddToQueueSetWrite⚠ | |
| xRingbufferCanRead⚠ | @brief Check if the selected queue set member is the ring buffer's read semaphore
|
| xRingbufferCreate⚠ | @brief Create a ring buffer
|
| xRingbufferCreateNoSplit⚠ | @brief Create a ring buffer of type RINGBUF_TYPE_NOSPLIT for a fixed item_size
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| xRingbufferGetCurFreeSize⚠ | @brief Get current free size available for an item/data in the buffer
|
| xRingbufferGetMaxItemSize⚠ | @brief Get maximum size of an item that can be placed in the ring buffer
|
| xRingbufferIsNextItemWrapped⚠ | @cond
|
| xRingbufferPrintInfo⚠ | @brief Debugging function to print the internal pointers in the ring buffer
|
| xRingbufferReceive⚠ | @brief Retrieve an item from the ring buffer
|
| xRingbufferReceiveFromISR⚠ | @brief Retrieve an item from the ring buffer in an ISR
|
| xRingbufferReceiveSplit⚠ | @brief Retrieve a split item from an allow-split ring buffer
|
| xRingbufferReceiveSplitFromISR⚠ | @brief Retrieve a split item from an allow-split ring buffer in an ISR
|
| xRingbufferReceiveUpTo⚠ | @brief Retrieve bytes from a byte buffer, specifying the maximum amount of bytes to retrieve
|
| xRingbufferReceiveUpToFromISR⚠ | @brief Retrieve bytes from a byte buffer, specifying the maximum amount of
bytes to retrieve. Call this from an ISR.
|
| xRingbufferRemoveFromQueueSetRead⚠ | @brief Remove the ring buffer's read semaphore from a queue set.
|
| xRingbufferRemoveFromQueueSetWrite⚠ | |
| xRingbufferSend⚠ | @brief Insert an item into the ring buffer
|
| xRingbufferSendFromISR⚠ | @brief Insert an item into the ring buffer in an ISR
|
| xTaskCallApplicationTaskHook⚠ | Calls the hook function associated with xTask. Passing xTask as NULL has
the effect of calling the Running tasks (the calling task) hook function.
|
| xTaskCheckForTimeOut⚠ | |
| xTaskCreatePinnedToCore⚠ | |
| xTaskCreateRestricted⚠ | |
| xTaskGetAffinity⚠ | |
| xTaskGetCurrentTaskHandle⚠ | |
| xTaskGetCurrentTaskHandleForCPU⚠ | |
| xTaskGetIdleTaskHandle⚠ | Get the handle of idle task for the current CPU.
|
| xTaskGetIdleTaskHandleForCPU⚠ | Get the handle of idle task for the given CPU.
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| xTaskGetSchedulerState⚠ | |
| xTaskGetTickCount⚠ | Get tick count
|
| xTaskGetTickCountFromISR⚠ | Get tick count from ISR
|
| xTaskIncrementTick⚠ | @cond
|
| xTaskNotify⚠ | Send task notification.
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| xTaskNotifyFromISR⚠ | Send task notification from an ISR.
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| xTaskNotifyWait⚠ | Wait for task notification
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| xTaskPriorityDisinherit⚠ | |
| xTaskRemoveFromEventList⚠ | |
| xTaskRemoveFromUnorderedEventList⚠ | |
| xTaskResumeAll⚠ | Resumes scheduler activity after it was suspended by a call to
vTaskSuspendAll().
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| xTaskResumeFromISR⚠ | An implementation of vTaskResume() that can be called from within an ISR.
|
| xt_clock_freq⚠ | This function is defined to provide a deprecation warning whenever
XT_CLOCK_FREQ macro is used.
Update the code to use esp_clk_cpu_freq function instead.
@return current CPU clock frequency, in Hz
|
| xt_get_interrupt_handler_arg⚠ | |
| xt_ints_off⚠ | |
| xt_ints_on⚠ | |
| xt_set_exception_handler⚠ | |
| xt_set_interrupt_handler⚠ | |
| xthal_bcopy⚠ | |
| xthal_cache_coherence_off⚠ | |
| xthal_cache_coherence_on⚠ | |
| xthal_cache_coherence_optin⚠ | |
| xthal_cache_coherence_optout⚠ | |
| xthal_clear_regcached_code⚠ | |
| xthal_compare_and_set⚠ | |
| xthal_dcache_all_invalidate⚠ | |
| xthal_dcache_all_unlock⚠ | |
| xthal_dcache_all_writeback⚠ | |
| xthal_dcache_all_writeback_inv⚠ | |
| xthal_dcache_disable⚠ | |
| xthal_dcache_enable⚠ | |
| xthal_dcache_get_ways⚠ | |
| xthal_dcache_line_invalidate⚠ | |
| xthal_dcache_line_lock⚠ | |
| xthal_dcache_line_unlock⚠ | |
| xthal_dcache_line_writeback⚠ | |
| xthal_dcache_line_writeback_inv⚠ | |
| xthal_dcache_region_invalidate⚠ | |
| xthal_dcache_region_lock⚠ | |
| xthal_dcache_region_unlock⚠ | |
| xthal_dcache_region_writeback⚠ | |
| xthal_dcache_region_writeback_inv⚠ | |
| xthal_dcache_set_ways⚠ | |
| xthal_dcache_sync⚠ | |
| xthal_disassemble⚠ | |
| xthal_disassemble_size⚠ | |
| xthal_get_cache_prefetch⚠ | |
| xthal_get_cacheattr⚠ | |
| xthal_get_ccompare⚠ | |
| xthal_get_ccount⚠ | |
| xthal_get_cpenable⚠ | |
| xthal_get_dcacheattr⚠ | |
| xthal_get_icacheattr⚠ | |
| xthal_get_int_vpri⚠ | |
| xthal_get_intenable⚠ | |
| xthal_get_interrupt⚠ | |
| xthal_get_prid⚠ | |
| xthal_get_vpri⚠ | |
| xthal_get_vpri_locklevel⚠ | |
| xthal_icache_all_invalidate⚠ | |
| xthal_icache_all_unlock⚠ | |
| xthal_icache_disable⚠ | |
| xthal_icache_enable⚠ | |
| xthal_icache_get_ways⚠ | |
| xthal_icache_line_invalidate⚠ | |
| xthal_icache_line_lock⚠ | |
| xthal_icache_line_unlock⚠ | |
| xthal_icache_region_invalidate⚠ | |
| xthal_icache_region_lock⚠ | |
| xthal_icache_region_unlock⚠ | |
| xthal_icache_set_ways⚠ | |
| xthal_icache_sync⚠ | |
| xthal_init_mem_cp⚠ | |
| xthal_init_mem_extra⚠ | |
| xthal_int_disable⚠ | |
| xthal_int_enable⚠ | |
| xthal_intlevel_to_vpri⚠ | |
| xthal_invalidate_cp⚠ | |
| xthal_invalidate_region⚠ | |
| xthal_memcpy⚠ | |
| xthal_memep_inject_error⚠ | |
| xthal_remove_soft_break⚠ | |
| xthal_restore_cp0⚠ | |
| xthal_restore_cp1⚠ | |
| xthal_restore_cp2⚠ | |
| xthal_restore_cp3⚠ | |
| xthal_restore_cp4⚠ | |
| xthal_restore_cp5⚠ | |
| xthal_restore_cp6⚠ | |
| xthal_restore_cp7⚠ | |
| xthal_restore_cpregs⚠ | |
| xthal_restore_extra⚠ | |
| xthal_save_cp0⚠ | |
| xthal_save_cp1⚠ | |
| xthal_save_cp2⚠ | |
| xthal_save_cp3⚠ | |
| xthal_save_cp4⚠ | |
| xthal_save_cp5⚠ | |
| xthal_save_cp6⚠ | |
| xthal_save_cp7⚠ | |
| xthal_save_cpregs⚠ | |
| xthal_save_extra⚠ | |
| xthal_set_cache_prefetch⚠ | |
| xthal_set_cache_prefetch_long⚠ | |
| xthal_set_cacheattr⚠ | |
| xthal_set_ccompare⚠ | |
| xthal_set_cpenable⚠ | |
| xthal_set_dcacheattr⚠ | |
| xthal_set_icacheattr⚠ | |
| xthal_set_int_vpri⚠ | |
| xthal_set_intclear⚠ | |
| xthal_set_intenable⚠ | |
| xthal_set_intset⚠ | |
| xthal_set_region_attribute⚠ | |
| xthal_set_region_translation⚠ | |
| xthal_set_region_translation_raw⚠ | |
| xthal_set_soft_break⚠ | |
| xthal_set_tram_trigger_func⚠ | |
| xthal_set_vpri⚠ | |
| xthal_set_vpri_intlevel⚠ | |
| xthal_set_vpri_lock⚠ | |
| xthal_set_vpri_locklevel⚠ | |
| xthal_static_p2v⚠ | |
| xthal_static_v2p⚠ | WARNING: these two functions may go away in a future release; don't depend on them!
|
| xthal_tram_done⚠ | |
| xthal_tram_pending_to_service⚠ | |
| xthal_tram_set_sync⚠ | |
| xthal_v2p⚠ | |
| xthal_validate_cp⚠ | |
| xthal_vpri_to_intlevel⚠ | |
| xthal_window_spill⚠ | |