Struct XtensaCommunicationInterface

pub struct XtensaCommunicationInterface<'probe> { /* private fields */ }

The higher level of the XDM functionality.

Implementations

impl<'probe> XtensaCommunicationInterface<'probe>

pub fn new( probe: &'probe mut dyn JTAGAccess, state: &'probe mut XtensaDebugInterfaceState, ) -> Self

Create the Xtensa communication interface using the underlying probe driver

pub fn add_slow_memory_access_range(&mut self, range: Range<u64>)

Set the range of addresses for which we should not use LDDR32.P/SDDR32.P instructions.

pub fn read_idcode(&mut self) -> Result<u32, XtensaError>

Read the targets IDCODE.

pub fn enter_debug_mode(&mut self) -> Result<(), XtensaError>

Enter debug mode.

pub fn available_breakpoint_units(&self) -> u32

Returns the number of hardware breakpoints the target supports.

On the Xtensa architecture this is the NIBREAK configuration parameter.

pub fn core_halted(&mut self) -> Result<bool, XtensaError>

Returns whether the core is halted.

pub fn wait_for_core_halted( &mut self, timeout: Duration, ) -> Result<(), XtensaError>

Waits until the core is halted.

This function lowers the interrupt level to allow halting on debug exceptions.

pub fn halted_access<R>( &mut self, op: impl FnOnce(&mut Self) -> Result<R, XtensaError>, ) -> Result<R, XtensaError>

Executes a closure while ensuring the core is halted.

pub fn step(&mut self) -> Result<(), XtensaError>

Steps the core by one instruction.

pub fn resume_core(&mut self) -> Result<(), XtensaError>

Resumes program execution.

pub fn read_register<R: TypedRegister>(&mut self) -> Result<R, XtensaError>

Read a register.

pub fn schedule_read_register<R: TypedRegister>( &mut self, ) -> Result<DeferredResultIndex, XtensaError>

Schedules reading a register.

pub fn write_register<R: TypedRegister>( &mut self, reg: R, ) -> Result<(), XtensaError>

Write a register.

pub fn schedule_write_register<R: TypedRegister>( &mut self, reg: R, ) -> Result<(), XtensaError>

Schedules writing a register.

pub fn schedule_read_register_untyped( &mut self, register: impl Into<Register>, ) -> Result<DeferredResultIndex, XtensaError>

Schedules reading a register.

pub fn read_register_untyped( &mut self, register: impl Into<Register>, ) -> Result<u32, XtensaError>

Read a register.

pub fn schedule_write_register_untyped( &mut self, register: impl Into<Register>, value: u32, ) -> Result<(), XtensaError>

Schedules writing a register.

pub fn write_register_untyped( &mut self, register: impl Into<Register>, value: u32, ) -> Result<(), XtensaError>

Write a register.

Trait Implementations

impl MemoryInterface for XtensaCommunicationInterface<'_>

fn read(&mut self, address: u64, dst: &mut [u8]) -> Result<(), Error>

Read data from address.

fn supports_native_64bit_access(&mut self) -> bool

Does this interface support native 64-bit wide accesses

fn read_word_64(&mut self, address: u64) -> Result<u64, Error>

Read a 64bit word of at address.

fn read_word_32(&mut self, address: u64) -> Result<u32, Error>

Read a 32bit word of at address.

fn read_word_16(&mut self, address: u64) -> Result<u16, Error>

Read a 16bit word of at address.

fn read_word_8(&mut self, address: u64) -> Result<u8, Error>

Read an 8bit word of at address.

fn read_64(&mut self, address: u64, data: &mut [u64]) -> Result<(), Error>

Read a block of 64bit words at address.

fn read_32(&mut self, address: u64, data: &mut [u32]) -> Result<(), Error>

Read a block of 32bit words at address.

fn read_16(&mut self, address: u64, data: &mut [u16]) -> Result<(), Error>

Read a block of 16bit words at address.

fn read_8(&mut self, address: u64, data: &mut [u8]) -> Result<(), Error>

Read a block of 8bit words at address.

fn write(&mut self, address: u64, data: &[u8]) -> Result<(), Error>

Write a block of 8bit words at address. May use 64 bit memory access, so should only be used if reading memory locations that don’t have side effects. Generally faster than MemoryInterface::write_8.

fn write_word_64(&mut self, address: u64, data: u64) -> Result<(), Error>

Write a 64bit word at address.

fn write_word_32(&mut self, address: u64, data: u32) -> Result<(), Error>

Write a 32bit word at address.

fn write_word_16(&mut self, address: u64, data: u16) -> Result<(), Error>

Write a 16bit word at address.

fn write_word_8(&mut self, address: u64, data: u8) -> Result<(), Error>

Write an 8bit word at address.

fn write_64(&mut self, address: u64, data: &[u64]) -> Result<(), Error>

Write a block of 64bit words at address.

fn write_32(&mut self, address: u64, data: &[u32]) -> Result<(), Error>

Write a block of 32bit words at address.

fn write_16(&mut self, address: u64, data: &[u16]) -> Result<(), Error>

Write a block of 16bit words at address.

fn write_8(&mut self, address: u64, data: &[u8]) -> Result<(), Error>

Write a block of 8bit words at address.

fn supports_8bit_transfers(&self) -> Result<bool, Error>

Returns whether the current platform supports native 8bit transfers.

fn flush(&mut self) -> Result<(), Error>

Flush any outstanding operations.

fn read_mem_64bit(&mut self, address: u64, data: &mut [u8]) -> Result<(), ERR>

Reads bytes using 64 bit memory access.

fn read_mem_32bit(&mut self, address: u64, data: &mut [u8]) -> Result<(), ERR>

Reads bytes using 32 bit memory access.

fn write_mem_64bit(&mut self, address: u64, data: &[u8]) -> Result<(), ERR>

Writes bytes using 64 bit memory access. Address must be 64 bit aligned and data must be an exact multiple of 8.

fn write_mem_32bit(&mut self, address: u64, data: &[u8]) -> Result<(), ERR>

Writes bytes using 32 bit memory access. Address must be 32 bit aligned and data must be an exact multiple of 8.