Module communication_interface

Debug Module Communication

This module implements communication with a Debug Module, as described in the RISC-V debug specification v0.13.2 .

Structs

• Abstractauto
  Abstract Command Autoexec (see 3.12.8) A bitfield::bitfield! register mapping for the register abstractauto located at address 0x18.
• AccessMemoryCommand
  Abstract command register, located at address 0x17 This is not for all commands, only for the ones from the debug spec. (see 3.6.1.3) A bitfield::bitfield! register mapping for the register command located at address 0x17.
• AccessRegisterCommand
  Abstract command register, located at address 0x17 This is not for all commands, only for the ones from the debug spec. A bitfield::bitfield! register mapping for the register command located at address 0x17.
• Confstrptr0
  A bitfield::bitfield! register mapping for the register confstrptr0 located at address 0x19.
• Confstrptr1
  A bitfield::bitfield! register mapping for the register confstrptr1 located at address 0x1a.
• Confstrptr2
  A bitfield::bitfield! register mapping for the register confstrptr2 located at address 0x1b.
• Confstrptr3
  A bitfield::bitfield! register mapping for the register confstrptr3 located at address 0x1c.
• RiscvCommunicationInterface
  A interface that implements controls for RISC-V cores.
• RiscvCommunicationInterfaceState
  A state to carry all the state data across multiple core switches in a session.
• RiscvDebugInterfaceState
  The combined state of a RISC-V debug module and its transport interface.
• Sbaddress0
  A bitfield::bitfield! register mapping for the register sbaddress0 located at address 0x39.
• Sbaddress1
  A bitfield::bitfield! register mapping for the register sbaddress1 located at address 0x3a.
• Sbaddress2
  A bitfield::bitfield! register mapping for the register sbaddress2 located at address 0x3b.
• Sbaddress3
  A bitfield::bitfield! register mapping for the register sbaddress3 located at address 0x37.
• Sbcs
  System Bus Access Control and Status (see 3.12.18) A bitfield::bitfield! register mapping for the register sbcs located at address 0x38.
• Sbdata0
  A bitfield::bitfield! register mapping for the register sbdata0 located at address 0x3c.
• Sbdata1
  A bitfield::bitfield! register mapping for the register sbdata1 located at address 0x3d.
• Sbdata2
  A bitfield::bitfield! register mapping for the register sbdata2 located at address 0x3e.
• Sbdata3
  A bitfield::bitfield! register mapping for the register sbdata3 located at address 0x3f.

Enums

• AbstractCommandErrorKind
  Errors which can occur while executing an abstract command.
• DebugModuleVersion
  List of all debug module versions.
• RiscvBusAccess
  Access width for bus access. This is used both for system bus access (sbcs register), as well for abstract commands.
• RiscvError
  Some error occurred when working with the RISC-V core.

Traits

• RiscvInterfaceBuilder
  A single-use factory for creating RISC-V communication interfaces and their states.