Struct FakeProbe

pub struct FakeProbe { /* private fields */ }

This is a mock probe which can be used for mocking things in tests or for dry runs.

Implementations

impl FakeProbe

pub fn new() -> Self

Creates a new FakeProbe for mocking.

pub fn with_mocked_core() -> Self

Fake probe with a mocked core

pub fn set_dap_register_read_handler( &mut self, handler: Box<dyn Fn(PortType, u8) -> Result<u32, ArmError> + Send>, )

This sets the read handler for DAP register reads. Can be used to hook into the read.

pub fn set_dap_register_write_handler( &mut self, handler: Box<dyn Fn(PortType, u8, u32) -> Result<(), ArmError> + Send>, )

This sets the write handler for DAP register writes. Can be used to hook into the write.

pub fn into_probe(self) -> Probe

Makes a generic probe out of the FakeProbe

pub fn expect_operation(&self, operation: Operation)

Trait Implementations

impl Debug for FakeProbe

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl DebugProbe for FakeProbe

fn get_name(&self) -> &str

Get human readable name for the probe

fn detach(&mut self) -> Result<(), Error>

Leave debug mode

fn target_reset(&mut self) -> Result<(), DebugProbeError>

Resets the target device.

fn speed_khz(&self) -> u32

Get the currently used maximum speed for the debug protocol in kHz.

fn set_scan_chain( &mut self, scan_chain: Vec<ScanChainElement>, ) -> Result<(), DebugProbeError>

Set the JTAG scan chain information for the target under debug.

fn scan_chain(&self) -> Result<&[ScanChainElement], DebugProbeError>

Returns the JTAG scan chain

fn set_speed(&mut self, speed_khz: u32) -> Result<u32, DebugProbeError>

Set the speed in kHz used for communication with the target device.

fn attach(&mut self) -> Result<(), DebugProbeError>

Attach to the chip.

fn select_protocol( &mut self, protocol: WireProtocol, ) -> Result<(), DebugProbeError>

Selects the transport protocol to be used by the debug probe.

fn active_protocol(&self) -> Option<WireProtocol>

Get the transport protocol currently in active use by the debug probe.

fn target_reset_assert(&mut self) -> Result<(), DebugProbeError>

This should assert the reset pin of the target via debug probe.

fn target_reset_deassert(&mut self) -> Result<(), DebugProbeError>

This should deassert the reset pin of the target via debug probe.

fn into_probe(self: Box<Self>) -> Box<dyn DebugProbe>

Boxes itself.

fn try_get_arm_interface<'probe>( self: Box<Self>, ) -> Result<Box<dyn UninitializedArmProbe + 'probe>, (Box<dyn DebugProbe>, DebugProbeError)>

Get the dedicated interface to debug ARM chips. To check that the probe actually supports this, call DebugProbe::has_arm_interface first.

fn has_arm_interface(&self) -> bool

Check if the probe offers an interface to debug ARM chips.

fn select_jtag_tap(&mut self, index: usize) -> Result<(), DebugProbeError>

Selects the JTAG TAP to be used for communication.

fn try_get_riscv_interface_builder<'probe>( &'probe mut self, ) -> Result<Box<dyn RiscvInterfaceBuilder<'probe> + 'probe>, DebugProbeError>

Try to get a RiscvInterfaceBuilder object, which can be used to set up a communication interface with chips using the RISC-V architecture.

fn has_riscv_interface(&self) -> bool

Check if the probe offers an interface to debug RISC-V chips.

fn try_get_xtensa_interface<'probe>( &'probe mut self, _state: &'probe mut XtensaDebugInterfaceState, ) -> Result<XtensaCommunicationInterface<'probe>, DebugProbeError>

Get the dedicated interface to debug Xtensa chips. Ensure that the probe actually supports this by calling DebugProbe::has_xtensa_interface first.

fn has_xtensa_interface(&self) -> bool

Check if the probe offers an interface to debug Xtensa chips.

fn get_swo_interface(&self) -> Option<&dyn SwoAccess>

Get a SWO interface from the debug probe.

fn get_swo_interface_mut(&mut self) -> Option<&mut dyn SwoAccess>

Get a mutable SWO interface from the debug probe.

fn try_as_dap_probe(&mut self) -> Option<&mut dyn DapProbe>

Try creating a DAP interface for the given probe.

fn get_target_voltage(&mut self) -> Result<Option<f32>, DebugProbeError>

Reads the target voltage in Volts, if possible. Returns Ok(None) if the probe doesn’t support reading the target voltage.

fn try_into_jlink(&mut self) -> Result<&mut JLink, DebugProbeError>

Try to get a J-Link interface from the debug probe.

impl Default for FakeProbe

fn default() -> Self

Returns the “default value” for a type.

impl RawDapAccess for FakeProbe

fn raw_read_register( &mut self, port: PortType, addr: u8, ) -> Result<u32, ArmError>

Reads the DAP register on the specified port and address

fn raw_write_register( &mut self, port: PortType, addr: u8, value: u32, ) -> Result<(), ArmError>

Writes a value to the DAP register on the specified port and address

fn jtag_sequence( &mut self, _cycles: u8, _tms: bool, _tdi: u64, ) -> Result<(), DebugProbeError>

Send a specific output sequence over JTAG.

fn swj_sequence( &mut self, _bit_len: u8, _bits: u64, ) -> Result<(), DebugProbeError>

Send a specific output sequence over JTAG or SWD.

fn swj_pins( &mut self, _pin_out: u32, _pin_select: u32, _pin_wait: u32, ) -> Result<u32, DebugProbeError>

Set the state of debugger output pins directly.

fn into_probe(self: Box<Self>) -> Box<dyn DebugProbe>

Cast this interface into a generic DebugProbe.

fn core_status_notification( &mut self, _: CoreStatus, ) -> Result<(), DebugProbeError>

Inform the probe of the CoreStatus of the chip attached to the probe.

fn raw_read_block( &mut self, port: PortType, addr: u8, values: &mut [u32], ) -> Result<(), ArmError>

Read multiple values from the same DAP register.

fn raw_write_block( &mut self, port: PortType, addr: u8, values: &[u32], ) -> Result<(), ArmError>

Write multiple values to the same DAP register.

fn raw_flush(&mut self) -> Result<(), ArmError>

Flush any outstanding writes.

fn configure_jtag(&mut self, _skip_scan: bool) -> Result<(), DebugProbeError>

Configures the probe for JTAG use (specifying IR lengths of each DAP).