Trait CoreInterface

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pub trait CoreInterface: MemoryInterface + CoreMemoryInterfaceShim {
Show 34 methods    // Required methods
    fn wait_for_core_halted(&mut self, timeout: Duration) -> Result<(), Error>;
    fn core_halted(&mut self) -> Result<bool, Error>;
    fn status(&mut self) -> Result<CoreStatus, Error>;
    fn halt(&mut self, timeout: Duration) -> Result<CoreInformation, Error>;
    fn run(&mut self) -> Result<(), Error>;
    fn reset(&mut self) -> Result<(), Error>;
    fn reset_and_halt(
        &mut self,
        timeout: Duration,
    ) -> Result<CoreInformation, Error>;
    fn step(&mut self) -> Result<CoreInformation, Error>;
    fn read_core_reg(
        &mut self,
        address: RegisterId,
    ) -> Result<RegisterValue, Error>;
    fn write_core_reg(
        &mut self,
        address: RegisterId,
        value: RegisterValue,
    ) -> Result<(), Error>;
    fn available_breakpoint_units(&mut self) -> Result<u32, Error>;
    fn hw_breakpoints(&mut self) -> Result<Vec<Option<u64>>, Error>;
    fn enable_breakpoints(&mut self, state: bool) -> Result<(), Error>;
    fn set_hw_breakpoint(
        &mut self,
        unit_index: usize,
        addr: u64,
    ) -> Result<(), Error>;
    fn clear_hw_breakpoint(&mut self, unit_index: usize) -> Result<(), Error>;
    fn registers(&self) -> &'static CoreRegisters;
    fn program_counter(&self) -> &'static CoreRegister;
    fn frame_pointer(&self) -> &'static CoreRegister;
    fn stack_pointer(&self) -> &'static CoreRegister;
    fn return_address(&self) -> &'static CoreRegister;
    fn hw_breakpoints_enabled(&self) -> bool;
    fn architecture(&self) -> Architecture;
    fn core_type(&self) -> CoreType;
    fn instruction_set(&mut self) -> Result<InstructionSet, Error>;
    fn fpu_support(&mut self) -> Result<bool, Error>;
    fn floating_point_register_count(&mut self) -> Result<usize, Error>;
    fn reset_catch_set(&mut self) -> Result<(), Error>;
    fn reset_catch_clear(&mut self) -> Result<(), Error>;
    fn debug_core_stop(&mut self) -> Result<(), Error>;

    // Provided methods
    fn debug_on_sw_breakpoint(&mut self, _enabled: bool) -> Result<(), Error> { ... }
    fn on_session_stop(&mut self) -> Result<(), Error> { ... }
    fn enable_vector_catch(
        &mut self,
        _condition: VectorCatchCondition,
    ) -> Result<(), Error> { ... }
    fn disable_vector_catch(
        &mut self,
        _condition: VectorCatchCondition,
    ) -> Result<(), Error> { ... }
    fn is_64_bit(&self) -> bool { ... }
}

Expand description

A generic interface to control a MCU core.

Required Methods§

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fn wait_for_core_halted(&mut self, timeout: Duration) -> Result<(), Error>

Wait until the core is halted. If the core does not halt on its own, a DebugProbeError::Timeout error will be returned.

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fn core_halted(&mut self) -> Result<bool, Error>

Check if the core is halted. If the core does not halt on its own, a DebugProbeError::Timeout error will be returned.

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fn status(&mut self) -> Result<CoreStatus, Error>

Returns the current status of the core.

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fn halt(&mut self, timeout: Duration) -> Result<CoreInformation, Error>

Try to halt the core. This function ensures the core is actually halted, and returns a DebugProbeError::Timeout otherwise.

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fn run(&mut self) -> Result<(), Error>

Continue to execute instructions.

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fn reset(&mut self) -> Result<(), Error>

Reset the core, and then continue to execute instructions. If the core should be halted after reset, use the reset_and_halt function.

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fn reset_and_halt( &mut self, timeout: Duration, ) -> Result<CoreInformation, Error>

Reset the core, and then immediately halt. To continue execution after reset, use the reset function.

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fn step(&mut self) -> Result<CoreInformation, Error>

Steps one instruction and then enters halted state again.

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fn read_core_reg(&mut self, address: RegisterId) -> Result<RegisterValue, Error>

Read the value of a core register.

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fn write_core_reg( &mut self, address: RegisterId, value: RegisterValue, ) -> Result<(), Error>

Write the value of a core register.

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fn available_breakpoint_units(&mut self) -> Result<u32, Error>

Returns all the available breakpoint units of the core.

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fn hw_breakpoints(&mut self) -> Result<Vec<Option<u64>>, Error>

Read the hardware breakpoints from FpComp registers, and adds them to the Result Vector. A value of None in any position of the Vector indicates that the position is unset/available. We intentionally return all breakpoints, irrespective of whether they are enabled or not.

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